OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [PIC24_MPLAB/] [serial/] [serial.c] - Blame information for rev 867

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 587 jeremybenn
/*
2
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
3
 
4
    ***************************************************************************
5
    *                                                                         *
6
    * If you are:                                                             *
7
    *                                                                         *
8
    *    + New to FreeRTOS,                                                   *
9
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
10
    *    + Looking for basic training,                                        *
11
    *    + Wanting to improve your FreeRTOS skills and productivity           *
12
    *                                                                         *
13
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
14
    *                                                                         *
15
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
16
    *                  http://www.FreeRTOS.org/Documentation                  *
17
    *                                                                         *
18
    * A pdf reference manual is also available.  Both are usually delivered   *
19
    * to your inbox within 20 minutes to two hours when purchased between 8am *
20
    * and 8pm GMT (although please allow up to 24 hours in case of            *
21
    * exceptional circumstances).  Thank you for your support!                *
22
    *                                                                         *
23
    ***************************************************************************
24
 
25
    This file is part of the FreeRTOS distribution.
26
 
27
    FreeRTOS is free software; you can redistribute it and/or modify it under
28
    the terms of the GNU General Public License (version 2) as published by the
29
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
30
    ***NOTE*** The exception to the GPL is included to allow you to distribute
31
    a combined work that includes FreeRTOS without being obliged to provide the
32
    source code for proprietary components outside of the FreeRTOS kernel.
33
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
34
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
35
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
36
    more details. You should have received a copy of the GNU General Public
37
    License and the FreeRTOS license exception along with FreeRTOS; if not it
38
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
39
    by writing to Richard Barry, contact details for whom are available on the
40
    FreeRTOS WEB site.
41
 
42
    1 tab == 4 spaces!
43
 
44
    http://www.FreeRTOS.org - Documentation, latest information, license and
45
    contact details.
46
 
47
    http://www.SafeRTOS.com - A version that is certified for use in safety
48
    critical systems.
49
 
50
    http://www.OpenRTOS.com - Commercial support, development, porting,
51
    licensing and training services.
52
*/
53
 
54
 
55
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
56
 
57
NOTE:  This driver is primarily to test the scheduler functionality.  It does
58
not effectively use the buffers or DMA and is therefore not intended to be
59
an example of an efficient driver. */
60
 
61
/* Standard include file. */
62
#include <stdlib.h>
63
 
64
/* Scheduler include files. */
65
#include "FreeRTOS.h"
66
#include "queue.h"
67
#include "task.h"
68
 
69
/* Demo app include files. */
70
#include "serial.h"
71
 
72
/* Hardware setup. */
73
#define serOUTPUT                                               0
74
#define serINPUT                                                1
75
#define serLOW_SPEED                                    0
76
#define serONE_STOP_BIT                                 0
77
#define serEIGHT_DATA_BITS_NO_PARITY    0
78
#define serNORMAL_IDLE_STATE                    0
79
#define serAUTO_BAUD_OFF                                0
80
#define serLOOPBACK_OFF                                 0
81
#define serWAKE_UP_DISABLE                              0
82
#define serNO_HARDWARE_FLOW_CONTROL             0
83
#define serSTANDARD_IO                                  0
84
#define serNO_IRDA                                              0
85
#define serCONTINUE_IN_IDLE_MODE                0
86
#define serUART_ENABLED                                 1
87
#define serINTERRUPT_ON_SINGLE_CHAR             0
88
#define serTX_ENABLE                                    1
89
#define serINTERRUPT_ENABLE                             1
90
#define serINTERRUPT_DISABLE                    0
91
#define serCLEAR_FLAG                                   0
92
#define serSET_FLAG                                             1
93
 
94
 
95
/* The queues used to communicate between tasks and ISR's. */
96
static xQueueHandle xRxedChars;
97
static xQueueHandle xCharsForTx;
98
 
99
static portBASE_TYPE xTxHasEnded;
100
/*-----------------------------------------------------------*/
101
 
102
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
103
{
104
char cChar;
105
 
106
        /* Create the queues used by the com test task. */
107
        xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
108
        xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
109
 
110
        /* Setup the UART. */
111
        U2MODEbits.BRGH         = serLOW_SPEED;
112
        U2MODEbits.STSEL        = serONE_STOP_BIT;
113
        U2MODEbits.PDSEL        = serEIGHT_DATA_BITS_NO_PARITY;
114
        U2MODEbits.RXINV        = serNORMAL_IDLE_STATE;
115
        U2MODEbits.ABAUD        = serAUTO_BAUD_OFF;
116
        U2MODEbits.LPBACK       = serLOOPBACK_OFF;
117
        U2MODEbits.WAKE         = serWAKE_UP_DISABLE;
118
        U2MODEbits.UEN          = serNO_HARDWARE_FLOW_CONTROL;
119
        U2MODEbits.IREN         = serNO_IRDA;
120
        U2MODEbits.USIDL        = serCONTINUE_IN_IDLE_MODE;
121
        U2MODEbits.UARTEN       = serUART_ENABLED;
122
 
123
        U2BRG = (unsigned short)(( (float)configCPU_CLOCK_HZ / ( (float)16 * (float)ulWantedBaud ) ) - (float)0.5);
124
 
125
        U2STAbits.URXISEL       = serINTERRUPT_ON_SINGLE_CHAR;
126
        U2STAbits.UTXEN         = serTX_ENABLE;
127
        U2STAbits.UTXINV        = serNORMAL_IDLE_STATE;
128
        U2STAbits.UTXISEL0      = serINTERRUPT_ON_SINGLE_CHAR;
129
        U2STAbits.UTXISEL1      = serINTERRUPT_ON_SINGLE_CHAR;
130
 
131
        /* It is assumed that this function is called prior to the scheduler being
132
        started.  Therefore interrupts must not be allowed to occur yet as they
133
        may attempt to perform a context switch. */
134
        portDISABLE_INTERRUPTS();
135
 
136
        IFS1bits.U2RXIF = serCLEAR_FLAG;
137
        IFS1bits.U2TXIF = serCLEAR_FLAG;
138
        IPC7bits.U2RXIP = configKERNEL_INTERRUPT_PRIORITY;
139
        IPC7bits.U2TXIP = configKERNEL_INTERRUPT_PRIORITY;
140
        IEC1bits.U2TXIE = serINTERRUPT_ENABLE;
141
        IEC1bits.U2RXIE = serINTERRUPT_ENABLE;
142
 
143
        /* Clear the Rx buffer. */
144
        while( U2STAbits.URXDA == serSET_FLAG )
145
        {
146
                cChar = U2RXREG;
147
        }
148
 
149
        xTxHasEnded = pdTRUE;
150
 
151
        return NULL;
152
}
153
/*-----------------------------------------------------------*/
154
 
155
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
156
{
157
        /* Only one port is supported. */
158
        ( void ) pxPort;
159
 
160
        /* Get the next character from the buffer.  Return false if no characters
161
        are available or arrive before xBlockTime expires. */
162
        if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
163
        {
164
                return pdTRUE;
165
        }
166
        else
167
        {
168
                return pdFALSE;
169
        }
170
}
171
/*-----------------------------------------------------------*/
172
 
173
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
174
{
175
        /* Only one port is supported. */
176
        ( void ) pxPort;
177
 
178
        /* Return false if after the block time there is no room on the Tx queue. */
179
        if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
180
        {
181
                return pdFAIL;
182
        }
183
 
184
        /* A critical section should not be required as xTxHasEnded will not be
185
        written to by the ISR if it is already 0 (is this correct?). */
186
        if( xTxHasEnded )
187
        {
188
                xTxHasEnded = pdFALSE;
189
                IFS1bits.U2TXIF = serSET_FLAG;
190
        }
191
 
192
        return pdPASS;
193
}
194
/*-----------------------------------------------------------*/
195
 
196
void vSerialClose( xComPortHandle xPort )
197
{
198
}
199
/*-----------------------------------------------------------*/
200
 
201
void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
202
{
203
char cChar;
204
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
205
 
206
        /* Get the character and post it on the queue of Rxed characters.
207
        If the post causes a task to wake force a context switch as the woken task
208
        may have a higher priority than the task we have interrupted. */
209
        IFS1bits.U2RXIF = serCLEAR_FLAG;
210
        while( U2STAbits.URXDA )
211
        {
212
                cChar = U2RXREG;
213
                xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
214
        }
215
 
216
        if( xHigherPriorityTaskWoken != pdFALSE )
217
        {
218
                taskYIELD();
219
        }
220
}
221
/*-----------------------------------------------------------*/
222
 
223
void __attribute__((__interrupt__, auto_psv)) _U2TXInterrupt( void )
224
{
225
signed char cChar;
226
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
227
 
228
        /* If the transmit buffer is full we cannot get the next character.
229
        Another interrupt will occur the next time there is space so this does
230
        not matter. */
231
        IFS1bits.U2TXIF = serCLEAR_FLAG;
232
        while( !( U2STAbits.UTXBF ) )
233
        {
234
                if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
235
                {
236
                        /* Send the next character queued for Tx. */
237
                        U2TXREG = cChar;
238
                }
239
                else
240
                {
241
                        /* Queue empty, nothing to send. */
242
                        xTxHasEnded = pdTRUE;
243
                        break;
244
                }
245
        }
246
 
247
        if( xHigherPriorityTaskWoken != pdFALSE )
248
        {
249
                taskYIELD();
250
        }
251
}
252
 
253
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.