OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [RX600_RX62N-RDK_GNURX/] [RTOSDemo/] [webserver/] [phy.c] - Blame information for rev 675

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 585 jeremybenn
/******************************************************************************
2
* DISCLAIMER
3
 
4
* This software is supplied by Renesas Technology Corp. and is only
5
* intended for use with Renesas products. No other uses are authorized.
6
 
7
* This software is owned by Renesas Technology Corp. and is protected under
8
* all applicable laws, including copyright laws.
9
 
10
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
11
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
12
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
13
* PARTICULAR PURPOSE AND NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY
14
* DISCLAIMED.
15
 
16
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
17
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
18
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
19
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
20
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
21
 
22
* Renesas reserves the right, without notice, to make changes to this
23
* software and to discontinue the availability of this software.
24
* By using this software, you agree to the additional terms and
25
* conditions found by accessing the following link:
26
* http://www.renesas.com/disclaimer
27
******************************************************************************
28
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
29
*******************************************************************************
30
* File Name    : phy.c
31
* Version      : 1.01
32
* Description  : Ethernet PHY device driver
33
******************************************************************************
34
* History : DD.MM.YYYY Version Description
35
*         : 15.02.2010 1.00    First Release
36
*         : 06.04.2010 1.01    RX62N changes
37
******************************************************************************/
38
 
39
 
40
/******************************************************************************
41
Includes   <System Includes> , "Project Includes"
42
******************************************************************************/
43
#include <iodefine.h>
44
#include "r_ether.h"
45
#include "phy.h"
46
 
47
#include "FreeRTOS.h"
48
#include "task.h"
49
/******************************************************************************
50
Typedef definitions
51
******************************************************************************/
52
 
53
/******************************************************************************
54
Macro definitions
55
******************************************************************************/
56
 
57
/******************************************************************************
58
Imported global variables and functions (from other files)
59
******************************************************************************/
60
 
61
/******************************************************************************
62
Exported global variables and functions (to be accessed by other files)
63
******************************************************************************/
64
 
65
/******************************************************************************
66
Private global variables and functions
67
******************************************************************************/
68
unsigned short  _phy_read( unsigned short reg_addr );
69
void  _phy_write( unsigned short reg_addr, unsigned short data );
70
void  _phy_preamble( void );
71
void  _phy_reg_set( unsigned short reg_addr, long option );
72
void  _phy_reg_read( unsigned short *data );
73
void  _phy_reg_write( unsigned short data );
74
void  _phy_ta_z0( void );
75
void  _phy_ta_10( void );
76
void  _phy_mii_write_1( void );
77
void  _phy_mii_write_0( void );
78
 
79
/**
80
 * External functions
81
 */
82
 
83
/******************************************************************************
84
* Function Name: phy_init
85
* Description  : Resets Ethernet PHY device
86
* Arguments    : none
87
* Return Value : none
88
******************************************************************************/
89
short  phy_init( void )
90
{
91
  unsigned short reg;
92
  unsigned long count;
93
 
94
  /* Reset PHY */
95
  _phy_write(BASIC_MODE_CONTROL_REG, 0x8000);
96
 
97
  count = 0;
98
 
99
  do
100
  {
101
          vTaskDelay( 2 / portTICK_RATE_MS );
102
      reg = _phy_read(BASIC_MODE_CONTROL_REG);
103
          count++;
104
  } while (reg & 0x8000 && count < PHY_RESET_WAIT);
105
 
106
  if( count < PHY_RESET_WAIT )
107
  {
108
        return R_PHY_OK;
109
  }
110
 
111
  return R_PHY_ERROR;
112
}
113
 
114
/******************************************************************************
115
* Function Name: phy_set_100full
116
* Description  : Set Ethernet PHY device to 100 Mbps full duplex
117
* Arguments    : none
118
* Return Value : none
119
******************************************************************************/
120
void phy_set_100full( void )
121
{
122
        _phy_write(BASIC_MODE_CONTROL_REG, 0x2100);
123
}
124
 
125
/******************************************************************************
126
* Function Name: phy_set_10half
127
* Description  : Sets Ethernet PHY device to 10 Mbps half duplexR
128
* Arguments    : none
129
* Return Value : none
130
******************************************************************************/
131
void phy_set_10half( void )
132
{
133
        _phy_write(BASIC_MODE_CONTROL_REG, 0x0000);
134
}
135
 
136
/******************************************************************************
137
* Function Name: phy_set_autonegotiate
138
* Description  : Starts autonegotiate and reports the other side's
139
*              : physical capability
140
* Arguments    : none
141
* Return Value : bit 8 - Full duplex 100 mbps
142
*              : bit 7 - Half duplex 100 mbps
143
*              : bit 6 - Full duplex 10 mbps
144
*              : bit 5 - Half duplex 10 mbps
145
*              : bit 4:0 - Always set to 00001 (IEEE 802.3)
146
*              : -1 if error
147
******************************************************************************/
148
short phy_set_autonegotiate( void )
149
{
150
  unsigned short reg;
151
  unsigned long count;
152
 
153
  _phy_write(AN_ADVERTISEMENT_REG, 0x01E1);
154
  _phy_write(BASIC_MODE_CONTROL_REG, 0x1200);
155
 
156
  count = 0;
157
 
158
  do
159
  {
160
      reg = _phy_read(BASIC_MODE_STATUS_REG);
161
      count++;
162
          vTaskDelay( 100 / portTICK_RATE_MS );
163
 
164
          /* Make sure we don't break out if reg just contains 0xffff. */
165
          if( reg == 0xffff )
166
          {
167
                reg = 0;
168
          }
169
 
170
  } while (!(reg & 0x0020) && (count < PHY_AUTO_NEGOTIATON_WAIT));
171
 
172
  if (count >= PHY_AUTO_NEGOTIATON_WAIT)
173
  {
174
      return R_PHY_ERROR;
175
  }
176
  else
177
  {
178
          /* National DP83640 fix */
179
          _phy_write(0x13, 0x0006);
180
          reg = _phy_read(0x14);
181
          _phy_write(0x14, (reg&0x7FFF));
182
      _phy_write(0x13, 0x0000);
183
 
184
      /* Get the link partner response */
185
          reg = (short)_phy_read(AN_LINK_PARTNER_ABILITY_REG);
186
 
187
          if (reg & ( 1 << 8 ) )
188
          {
189
                  return PHY_LINK_100F;
190
          }
191
          if (reg & ( 1 << 7 ) )
192
          {
193
                  return PHY_LINK_100H;
194
          }
195
          if (reg & ( 1 << 6 ) )
196
          {
197
                  return PHY_LINK_10F;
198
          }
199
          if (reg & 1 << 5 )
200
          {
201
                  return PHY_LINK_10H;
202
          }
203
 
204
          return (-1);
205
  }
206
}
207
 
208
 
209
/**
210
 * Internal functions
211
 */
212
 
213
/******************************************************************************
214
* Function Name: _phy_read
215
* Description  : Reads a PHY register
216
* Arguments    : reg_addr - address of the PHY register
217
* Return Value : read value
218
******************************************************************************/
219
unsigned short _phy_read( unsigned short reg_addr )
220
{
221
  unsigned short data;
222
 
223
  _phy_preamble();
224
  _phy_reg_set( reg_addr, PHY_READ );
225
  _phy_ta_z0();
226
  _phy_reg_read( &data );
227
  _phy_ta_z0();
228
 
229
  return( data );
230
}
231
 
232
/******************************************************************************
233
* Function Name: _phy_write
234
* Description  : Writes to a PHY register
235
* Arguments    : reg_addr - address of the PHY register
236
*              : data - value
237
* Return Value : none
238
******************************************************************************/
239
void  _phy_write( unsigned short reg_addr, unsigned short data )
240
{
241
  _phy_preamble();
242
  _phy_reg_set( reg_addr, PHY_WRITE );
243
  _phy_ta_10();
244
  _phy_reg_write( data );
245
  _phy_ta_z0();
246
}
247
 
248
/******************************************************************************
249
* Function Name: _phy_preamble
250
* Description  : As preliminary preparation for access to the PHY module register,
251
*                "1" is output via the MII management interface.
252
* Arguments    : none
253
* Return Value : none
254
******************************************************************************/
255
void  _phy_preamble( void )
256
{
257
  short i;
258
 
259
  i = 32;
260
  while( i > 0 )
261
  {
262
    _phy_mii_write_1();
263
    i--;
264
  }
265
}
266
 
267
/******************************************************************************
268
* Function Name: _phy_reg_set
269
* Description  : Sets a PHY device to read or write mode
270
* Arguments    : reg_addr - address of the PHY register
271
*              : option - mode
272
* Return Value : none
273
******************************************************************************/
274
void  _phy_reg_set( unsigned short reg_addr, long option )
275
{
276
  long    i;
277
  unsigned short data;
278
 
279
  data = 0;
280
  data = (PHY_ST << 14);        /* ST code    */
281
 
282
  if( option == PHY_READ )
283
  {
284
    data |= (PHY_READ << 12);  /* OP code(RD)  */
285
  }
286
  else
287
  {
288
    data |= (PHY_WRITE << 12);  /* OP code(WT)  */
289
  }
290
 
291
  data |= (PHY_ADDR << 7);    /* PHY Address  */
292
  data |= (reg_addr << 2);    /* Reg Address  */
293
 
294
  i = 14;
295
  while( i > 0 )
296
  {
297
    if( (data & 0x8000) == 0 )
298
    {
299
      _phy_mii_write_0();
300
    }
301
    else
302
    {
303
      _phy_mii_write_1();
304
    }
305
    data <<= 1;
306
    i--;
307
  }
308
}
309
 
310
/******************************************************************************
311
* Function Name: _phy_reg_read
312
* Description  : Reads PHY register through MII interface
313
* Arguments    : data - pointer to store the data read
314
* Return Value : none
315
******************************************************************************/
316
void  _phy_reg_read( unsigned short *data )
317
{
318
  long      i, j;
319
  unsigned short   reg_data;
320
 
321
  reg_data = 0;
322
  i = 16;
323
  while( i > 0 )
324
  {
325
    for(j = MDC_WAIT; j > 0; j--)
326
        {
327
        ETHERC.PIR.LONG = 0x00000000;
328
    }
329
    for(j = MDC_WAIT; j > 0; j--)
330
        {
331
        ETHERC.PIR.LONG = 0x00000001;
332
    }
333
 
334
        reg_data <<= 1;
335
    reg_data |= (unsigned short)((ETHERC.PIR.LONG & 0x00000008) >> 3);  /* MDI read  */
336
 
337
    for(j = MDC_WAIT; j > 0; j--)
338
        {
339
        ETHERC.PIR.LONG = 0x00000001;
340
    }
341
    for(j = MDC_WAIT; j > 0; j--)
342
        {
343
        ETHERC.PIR.LONG = 0x00000000;
344
    }
345
    i--;
346
  }
347
  *data = reg_data;
348
}
349
 
350
/******************************************************************************
351
* Function Name: _phy_reg_write
352
* Description  : Writes to PHY register through MII interface
353
* Arguments    : data - value to write
354
* Return Value : none
355
******************************************************************************/
356
void  _phy_reg_write( unsigned short data )
357
{
358
  long  i;
359
 
360
  i = 16;
361
  while( i > 0 )
362
  {
363
    if( (data & 0x8000) == 0 )
364
    {
365
      _phy_mii_write_0();
366
    }
367
    else
368
    {
369
      _phy_mii_write_1();
370
    }
371
    i--;
372
    data <<= 1;
373
  }
374
}
375
 
376
/******************************************************************************
377
* Function Name: _phy_ta_z0
378
* Description  : Performs bus release so that PHY can drive data
379
*              : for read operation
380
* Arguments    : none
381
* Return Value : none
382
******************************************************************************/
383
void  _phy_ta_z0( void )
384
{
385
    long j;
386
 
387
    for(j = MDC_WAIT; j > 0; j--)
388
        {
389
        ETHERC.PIR.LONG = 0x00000000;
390
    }
391
    for(j = MDC_WAIT; j > 0; j--)
392
        {
393
        ETHERC.PIR.LONG = 0x00000001;
394
    }
395
    for(j = MDC_WAIT; j > 0; j--)
396
        {
397
        ETHERC.PIR.LONG = 0x00000001;
398
    }
399
    for(j = MDC_WAIT; j > 0; j--)
400
        {
401
        ETHERC.PIR.LONG = 0x00000000;
402
    }
403
}
404
 
405
/******************************************************************************
406
* Function Name: _phy_ta_10
407
* Description  : Switches data bus so MII interface can drive data
408
*              : for write operation
409
* Arguments    : none
410
* Return Value : none
411
******************************************************************************/
412
void _phy_ta_10(void)
413
{
414
    _phy_mii_write_1();
415
    _phy_mii_write_0();
416
}
417
 
418
/******************************************************************************
419
* Function Name: _phy_mii_write_1
420
* Description  : Outputs 1 to the MII interface
421
* Arguments    : none
422
* Return Value : none
423
******************************************************************************/
424
void  _phy_mii_write_1( void )
425
{
426
    long j;
427
 
428
    for(j = MDC_WAIT; j > 0; j--)
429
        {
430
        ETHERC.PIR.LONG = 0x00000006;
431
    }
432
    for(j = MDC_WAIT; j > 0; j--)
433
        {
434
        ETHERC.PIR.LONG = 0x00000007;
435
    }
436
    for(j = MDC_WAIT; j > 0; j--)
437
        {
438
        ETHERC.PIR.LONG = 0x00000007;
439
    }
440
    for(j = MDC_WAIT; j > 0; j--)
441
        {
442
        ETHERC.PIR.LONG = 0x00000006;
443
    }
444
}
445
 
446
/******************************************************************************
447
* Function Name: _phy_mii_write_0
448
* Description  : Outputs 0 to the MII interface
449
* Arguments    : none
450
* Return Value : none
451
******************************************************************************/
452
void  _phy_mii_write_0( void )
453
{
454
    long j;
455
 
456
    for(j = MDC_WAIT; j > 0; j--)
457
        {
458
        ETHERC.PIR.LONG = 0x00000002;
459
    }
460
    for(j = MDC_WAIT; j > 0; j--)
461
        {
462
        ETHERC.PIR.LONG = 0x00000003;
463
    }
464
    for(j = MDC_WAIT; j > 0; j--)
465
        {
466
        ETHERC.PIR.LONG = 0x00000003;
467
    }
468
    for(j = MDC_WAIT; j > 0; j--)
469
        {
470
        ETHERC.PIR.LONG = 0x00000002;
471
    }
472
}
473
 
474
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.