OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [RX600_RX62N-RDK_IAR/] [RegTest.s] - Blame information for rev 615

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 585 jeremybenn
/*
2
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
3
 
4
    ***************************************************************************
5
    *                                                                         *
6
    * If you are:                                                             *
7
    *                                                                         *
8
    *    + New to FreeRTOS,                                                   *
9
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
10
    *    + Looking for basic training,                                        *
11
    *    + Wanting to improve your FreeRTOS skills and productivity           *
12
    *                                                                         *
13
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
14
    *                                                                         *
15
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
16
    *                  http://www.FreeRTOS.org/Documentation                  *
17
    *                                                                         *
18
    * A pdf reference manual is also available.  Both are usually delivered   *
19
    * to your inbox within 20 minutes to two hours when purchased between 8am *
20
    * and 8pm GMT (although please allow up to 24 hours in case of            *
21
    * exceptional circumstances).  Thank you for your support!                *
22
    *                                                                         *
23
    ***************************************************************************
24
 
25
    This file is part of the FreeRTOS distribution.
26
 
27
    FreeRTOS is free software; you can redistribute it and/or modify it under
28
    the terms of the GNU General Public License (version 2) as published by the
29
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
30
    ***NOTE*** The exception to the GPL is included to allow you to distribute
31
    a combined work that includes FreeRTOS without being obliged to provide the
32
    source code for proprietary components outside of the FreeRTOS kernel.
33
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
34
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
35
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
36
    more details. You should have received a copy of the GNU General Public
37
    License and the FreeRTOS license exception along with FreeRTOS; if not it
38
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
39
    by writing to Richard Barry, contact details for whom are available on the
40
    FreeRTOS WEB site.
41
 
42
    1 tab == 4 spaces!
43
 
44
    http://www.FreeRTOS.org - Documentation, latest information, license and
45
    contact details.
46
 
47
    http://www.SafeRTOS.com - A version that is certified for use in safety
48
    critical systems.
49
 
50
    http://www.OpenRTOS.com - Commercial support, development, porting,
51
    licensing and training services.
52
*/
53
 
54
        PUBLIC _prvRegTest1Implementation
55
        PUBLIC _prvRegTest2Implementation
56
 
57
        EXTERN _ulRegTest1CycleCount
58
        EXTERN _ulRegTest2CycleCount
59
 
60
        RSEG CODE:CODE(4)
61
 
62
/* This function is explained in the comments at the top of main.c. */
63
_prvRegTest1Implementation:
64
 
65
        /* Put a known value in each register. */
66
        MOV     #1, R1
67
        MOV     #2, R2
68
        MOV     #3, R3
69
        MOV     #4, R4
70
        MOV     #5, R5
71
        MOV     #6, R6
72
        MOV     #7, R7
73
        MOV     #8, R8
74
        MOV     #9, R9
75
        MOV     #10, R10
76
        MOV     #11, R11
77
        MOV     #12, R12
78
        MOV     #13, R13
79
        MOV     #14, R14
80
        MOV     #15, R15
81
 
82
        /* Loop, checking each itteration that each register still contains the
83
        expected value. */
84
TestLoop1:
85
 
86
        /* Push the registers that are going to get clobbered. */
87
        PUSHM   R14-R15
88
 
89
        /* Increment the loop counter to show this task is still getting CPU time. */
90
        MOV     #_ulRegTest1CycleCount, R14
91
        MOV     [ R14 ], R15
92
        ADD     #1, R15
93
        MOV     R15, [ R14 ]
94
 
95
        /* Yield to extend the text coverage.  Set the bit in the ITU SWINTR register. */
96
        MOV     #1, R14
97
        MOV     #0872E0H, R15
98
        MOV.B   R14, [R15]
99
        NOP
100
        NOP
101
 
102
        /* Restore the clobbered registers. */
103
        POPM    R14-R15
104
 
105
        /* Now compare each register to ensure it still contains the value that was
106
        set before this loop was entered. */
107
        CMP     #1, R1
108
        BNE     RegTest1Error
109
        CMP     #2, R2
110
        BNE     RegTest1Error
111
        CMP     #3, R3
112
        BNE     RegTest1Error
113
        CMP     #4, R4
114
        BNE     RegTest1Error
115
        CMP     #5, R5
116
        BNE     RegTest1Error
117
        CMP     #6, R6
118
        BNE     RegTest1Error
119
        CMP     #7, R7
120
        BNE     RegTest1Error
121
        CMP     #8, R8
122
        BNE     RegTest1Error
123
        CMP     #9, R9
124
        BNE     RegTest1Error
125
        CMP     #10, R10
126
        BNE     RegTest1Error
127
        CMP     #11, R11
128
        BNE     RegTest1Error
129
        CMP     #12, R12
130
        BNE     RegTest1Error
131
        CMP     #13, R13
132
        BNE     RegTest1Error
133
        CMP     #14, R14
134
        BNE     RegTest1Error
135
        CMP     #15, R15
136
        BNE     RegTest1Error
137
 
138
        /* All comparisons passed, start a new itteratio of this loop. */
139
        BRA             TestLoop1
140
 
141
RegTest1Error:
142
        /* A compare failed, just loop here so the loop counter stops incrementing
143
        - causing the check task to indicate the error. */
144
        BRA RegTest1Error
145
/*-----------------------------------------------------------*/
146
 
147
/* This function is explained in the comments at the top of main.c. */
148
_prvRegTest2Implementation:
149
 
150
        /* Put a known value in each register. */
151
        MOV     #10H, R1
152
        MOV     #20H, R2
153
        MOV     #30H, R3
154
        MOV     #40H, R4
155
        MOV     #50H, R5
156
        MOV     #60H, R6
157
        MOV     #70H, R7
158
        MOV     #80H, R8
159
        MOV     #90H, R9
160
        MOV     #100H, R10
161
        MOV     #110H, R11
162
        MOV     #120H, R12
163
        MOV     #130H, R13
164
        MOV     #140H, R14
165
        MOV     #150H, R15
166
 
167
        /* Loop, checking each itteration that each register still contains the
168
        expected value. */
169
TestLoop2:
170
 
171
        /* Push the registers that are going to get clobbered. */
172
        PUSHM   R14-R15
173
 
174
        /* Increment the loop counter to show this task is still getting CPU time. */
175
        MOV     #_ulRegTest2CycleCount, R14
176
        MOV     [ R14 ], R15
177
        ADD     #1, R15
178
        MOV     R15, [ R14 ]
179
 
180
        /* Restore the clobbered registers. */
181
        POPM    R14-R15
182
 
183
        /* Now compare each register to ensure it still contains the value that was
184
        set before this loop was entered. */
185
        CMP     #10H, R1
186
        BNE     RegTest2Error
187
        CMP     #20H, R2
188
        BNE     RegTest2Error
189
        CMP     #30H, R3
190
        BNE     RegTest2Error
191
        CMP     #40H, R4
192
        BNE     RegTest2Error
193
        CMP     #50H, R5
194
        BNE     RegTest2Error
195
        CMP     #60H, R6
196
        BNE     RegTest2Error
197
        CMP     #70H, R7
198
        BNE     RegTest2Error
199
        CMP     #80H, R8
200
        BNE     RegTest2Error
201
        CMP     #90H, R9
202
        BNE     RegTest2Error
203
        CMP     #100H, R10
204
        BNE     RegTest2Error
205
        CMP     #110H, R11
206
        BNE     RegTest2Error
207
        CMP     #120H, R12
208
        BNE     RegTest2Error
209
        CMP     #130H, R13
210
        BNE     RegTest2Error
211
        CMP     #140H, R14
212
        BNE     RegTest2Error
213
        CMP     #150H, R15
214
        BNE     RegTest2Error
215
 
216
        /* All comparisons passed, start a new itteratio of this loop. */
217
        BRA     TestLoop2
218
 
219
RegTest2Error:
220
        /* A compare failed, just loop here so the loop counter stops incrementing
221
        - causing the check task to indicate the error. */
222
        BRA RegTest2Error
223
 
224
 
225
        END

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.