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/******************************************************************************
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* DISCLAIMER
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* Please refer to http://www.renesas.com/disclaimer
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******************************************************************************
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Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
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*******************************************************************************
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* File Name : phy.h
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* Version : 1.02
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* Description : Ethernet PHY device driver
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******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 15.02.2010 1.00 First Release
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* : 17.03.2010 1.01 Modification of macro definitions for access timing
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* : 06.04.2010 1.02 RX62N changes
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******************************************************************************/
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#ifndef PHY_H
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#define PHY_H
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/******************************************************************************
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Includes <System Includes> , "Project Includes"
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******************************************************************************/
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/******************************************************************************
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Typedef definitions
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******************************************************************************/
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/******************************************************************************
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Macro definitions
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******************************************************************************/
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/* Standard PHY Registers */
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#define BASIC_MODE_CONTROL_REG 0
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#define BASIC_MODE_STATUS_REG 1
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#define PHY_IDENTIFIER1_REG 2
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#define PHY_IDENTIFIER2_REG 3
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#define AN_ADVERTISEMENT_REG 4
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#define AN_LINK_PARTNER_ABILITY_REG 5
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#define AN_EXPANSION_REG 6
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/* Media Independent Interface */
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#define PHY_ST 1
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#define PHY_READ 2
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#define PHY_WRITE 1
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#define PHY_ADDR 0x1F
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#define MDC_WAIT 2
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/* PHY return definitions */
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#define R_PHY_OK 0
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#define R_PHY_ERROR -1
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/* Auto-Negotiation Link Partner Status */
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#define PHY_AN_LINK_PARTNER_100BASE 0x0180
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#define PHY_AN_LINK_PARTNER_FULL 0x0140
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#define PHY_AN_COMPLETE ( 1 << 5 )
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/*
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* Wait counter definitions of PHY-LSI initialization
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* ICLK = 96MHz
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*/
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#define PHY_RESET_WAIT 0x00000020L
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#define PHY_AUTO_NEGOTIATON_WAIT 75
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#define PHY_AN_ENABLE 0x1200
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#define PHY_AN_10_100_F_H 0xde1
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/******************************************************************************
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Variable Externs
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******************************************************************************/
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/******************************************************************************
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Functions Prototypes
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******************************************************************************/
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/**
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* External prototypes
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**/
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short phy_init( void );
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void phy_set_100full( void );
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void phy_set_10half( void );
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short phy_set_autonegotiate( void );
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#endif /* PHY_H */
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