OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [RX600_RX62N-RSK_IAR/] [include/] [inthandler.h] - Blame information for rev 585

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 585 jeremybenn
/***********************************************************************/
2
/*                                                                     */
3
/*  FILE        :inthandler.h                                          */
4
/*  DATE        :Wed, Aug 25, 2010                                     */
5
/*  DESCRIPTION :Interrupt Handler Declarations                        */
6
/*  CPU TYPE    :Other                                                 */
7
/*                                                                     */
8
/*  This file is generated by KPIT GNU Project Generator.              */
9
/*                                                                     */
10
/***********************************************************************/
11
 
12
 
13
 
14
#ifndef INTHANDLER_H
15
#define INTHANDLER_H
16
 
17
// Exception(Supervisor Instruction)
18
void INT_Excep_SuperVisorInst(void) __attribute__ ((interrupt));
19
 
20
// Exception(Undefined Instruction)
21
void INT_Excep_UndefinedInst(void) __attribute__ ((interrupt));
22
 
23
// Exception(Floating Point)
24
void INT_Excep_FloatingPoint(void) __attribute__ ((interrupt));
25
 
26
// NMI
27
void INT_NonMaskableInterrupt(void) __attribute__ ((interrupt));
28
 
29
// Dummy
30
void Dummy (void) __attribute__ ((interrupt));
31
 
32
// BRK
33
void INT_Excep_BRK(void) __attribute__ ((interrupt));
34
 
35
// vector  1 reserved
36
// vector  2 reserved
37
// vector  3 reserved
38
// vector  4 reserved
39
// vector  5 reserved
40
// vector  6 reserved
41
// vector  7 reserved
42
// vector  8 reserved
43
// vector  9 reserved
44
// vector 10 reserved
45
// vector 11 reserved
46
// vector 12 reserved
47
// vector 13 reserved
48
// vector 14 reserved
49
// vector 15 reserved
50
 
51
// BUSERR
52
 
53
void INT_Excep_BUSERR(void) __attribute__ ((interrupt));
54
 
55
// vector 17 reserved
56
// vector 18 reserved
57
// vector 19 reserved
58
// vector 20 reserved
59
 
60
// FCU_FCUERR
61
 
62
void INT_Excep_FCU_FCUERR(void) __attribute__ ((interrupt));
63
 
64
// vector 22 reserved
65
 
66
// FCU_FRDYI
67
 
68
void INT_Excep_FCU_FRDYI(void) __attribute__ ((interrupt));
69
 
70
// vector 24 reserved
71
// vector 25 reserved
72
// vector 26 reserved
73
// vector 27 reserved
74
 
75
// CMTU0_CMT0
76
 
77
void INT_Excep_CMTU0_CMT0(void) __attribute__ ((interrupt));
78
 
79
// CMTU0_CMT1
80
 
81
void INT_Excep_CMTU0_CMT1(void) __attribute__ ((interrupt));
82
 
83
// CMTU1_CMT2
84
 
85
void INT_Excep_CMTU1_CMT2(void) __attribute__ ((interrupt));
86
 
87
// CMTU1_CMT3
88
 
89
void INT_Excep_CMTU1_CMT3(void) __attribute__ ((interrupt));
90
 
91
// vector 32 reserved
92
// vector 33 reserved
93
// vector 34 reserved
94
// vector 35 reserved
95
// vector 36 reserved
96
// vector 37 reserved
97
// vector 38 reserved
98
// vector 39 reserved
99
// vector 40 reserved
100
// vector 41 reserved
101
// vector 42 reserved
102
// vector 43 reserved
103
// vector 44 reserved
104
// vector 45 reserved
105
// vector 46 reserved
106
// vector 47 reserved
107
// vector 48 reserved
108
// vector 49 reserved
109
// vector 50 reserved
110
// vector 51 reserved
111
// vector 52 reserved
112
// vector 53 reserved
113
// vector 54 reserved
114
// vector 55 reserved
115
// vector 56 reserved
116
// vector 57 reserved
117
// vector 58 reserved
118
// vector 59 reserved
119
// vector 60 reserved
120
// vector 61 reserved
121
// vector 62 reserved
122
// vector 63 reserved
123
 
124
// IRQ0
125
 
126
void INT_Excep_IRQ0(void) __attribute__ ((interrupt));
127
 
128
// IRQ1
129
 
130
void INT_Excep_IRQ1(void) __attribute__ ((interrupt));
131
 
132
// IRQ2
133
 
134
void INT_Excep_IRQ2(void) __attribute__ ((interrupt));
135
 
136
// IRQ3
137
 
138
void INT_Excep_IRQ3(void) __attribute__ ((interrupt));
139
 
140
// IRQ4
141
 
142
void INT_Excep_IRQ4(void) __attribute__ ((interrupt));
143
 
144
// IRQ5
145
 
146
void INT_Excep_IRQ5(void) __attribute__ ((interrupt));
147
 
148
// IRQ6
149
 
150
void INT_Excep_IRQ6(void) __attribute__ ((interrupt));
151
 
152
// IRQ7
153
 
154
void INT_Excep_IRQ7(void) __attribute__ ((interrupt));
155
 
156
// IRQ8
157
 
158
void INT_Excep_IRQ8(void) __attribute__ ((interrupt));
159
 
160
// IRQ9
161
 
162
void INT_Excep_IRQ9(void) __attribute__ ((interrupt));
163
 
164
// IRQ10
165
 
166
void INT_Excep_IRQ10(void) __attribute__ ((interrupt));
167
 
168
// IRQ11
169
 
170
void INT_Excep_IRQ11(void) __attribute__ ((interrupt));
171
 
172
// IRQ12
173
 
174
void INT_Excep_IRQ12(void) __attribute__ ((interrupt));
175
 
176
// IRQ13
177
 
178
void INT_Excep_IRQ13(void) __attribute__ ((interrupt));
179
 
180
// IRQ14
181
 
182
void INT_Excep_IRQ14(void) __attribute__ ((interrupt));
183
 
184
// IRQ15
185
 
186
void INT_Excep_IRQ15(void) __attribute__ ((interrupt));
187
 
188
// vector 80 reserved
189
// vector 81 reserved
190
// vector 82 reserved
191
// vector 83 reserved
192
// vector 84 reserved
193
// vector 85 reserved
194
// vector 86 reserved
195
// vector 87 reserved
196
// vector 88 reserved
197
// vector 89 reserved
198
// vector 90 reserved
199
// vector 91 reserved
200
// vector 92 reserved
201
// vector 93 reserved
202
// vector 94 reserved
203
// vector 95 reserved
204
 
205
// WDT_WOVI
206
 
207
void INT_Excep_WDT_WOVI(void) __attribute__ ((interrupt));
208
 
209
// vector 97 reserved
210
 
211
// AD0_ADI0
212
 
213
void INT_Excep_AD0_ADI0(void) __attribute__ ((interrupt));
214
 
215
// AD1_ADI1
216
 
217
void INT_Excep_AD1_ADI1(void) __attribute__ ((interrupt));
218
 
219
// AD2_ADI2
220
 
221
void INT_Excep_AD2_ADI2(void) __attribute__ ((interrupt));
222
 
223
// AD3_ADI3
224
 
225
void INT_Excep_AD3_ADI3(void) __attribute__ ((interrupt));
226
 
227
// vector 102 reserved
228
// vector 103 reserved
229
 
230
// TPU0_TGI0A
231
 
232
void INT_Excep_TPU0_TGI0A(void) __attribute__ ((interrupt));
233
 
234
// TPU0_TGI0B
235
 
236
void INT_Excep_TPU0_TGI0B(void) __attribute__ ((interrupt));
237
 
238
// TPU0_TGI0C
239
 
240
void INT_Excep_TPU0_TGI0C(void) __attribute__ ((interrupt));
241
 
242
// TPU0_TGI0D
243
 
244
void INT_Excep_TPU0_TGI0D(void) __attribute__ ((interrupt));
245
 
246
// TPU0_TCI0V
247
 
248
void INT_Excep_TPU0_TCI0V(void) __attribute__ ((interrupt));
249
 
250
// vector 109 reserved
251
// vector 110 reserved
252
 
253
// TPU1_TGI1A
254
 
255
void INT_Excep_TPU1_TGI1A(void) __attribute__ ((interrupt));
256
 
257
// TPU1_TGI1B
258
 
259
void INT_Excep_TPU1_TGI1B(void) __attribute__ ((interrupt));
260
 
261
// vector 113 reserved
262
// vector 114 reserved
263
 
264
// TPU1_TCI1V
265
 
266
void INT_Excep_TPU1_TCI1V(void) __attribute__ ((interrupt));
267
 
268
// TPU1_TCI1U
269
 
270
void INT_Excep_TPU1_TCI1U(void) __attribute__ ((interrupt));
271
 
272
// TPU2_TGI2A
273
 
274
void INT_Excep_TPU2_TGI2A(void) __attribute__ ((interrupt));
275
 
276
// TPU2_TGI2B
277
 
278
void INT_Excep_TPU2_TGI2B(void) __attribute__ ((interrupt));
279
 
280
// vector 119 reserved
281
 
282
// TPU2_TCI2V
283
 
284
void INT_Excep_TPU2_TCI2V(void) __attribute__ ((interrupt));
285
 
286
// TPU2_TCI2U
287
 
288
void INT_Excep_TPU2_TCI2U(void) __attribute__ ((interrupt));
289
 
290
// TPU3_TGI3A
291
 
292
void INT_Excep_TPU3_TGI3A(void) __attribute__ ((interrupt));
293
 
294
// TPU3_TGI3B
295
 
296
void INT_Excep_TPU3_TGI3B(void) __attribute__ ((interrupt));
297
 
298
// TPU3_TGI3C
299
 
300
void INT_Excep_TPU3_TGI3C(void) __attribute__ ((interrupt));
301
 
302
// TPU3_TGI3D
303
 
304
void INT_Excep_TPU3_TGI3D(void) __attribute__ ((interrupt));
305
 
306
// TPU3_TCI3V
307
 
308
void INT_Excep_TPU3_TCI3V(void) __attribute__ ((interrupt));
309
 
310
// TPU4_TGI4A
311
 
312
void INT_Excep_TPU4_TGI4A(void) __attribute__ ((interrupt));
313
 
314
// TPU4_TGI4B
315
 
316
void INT_Excep_TPU4_TGI4B(void) __attribute__ ((interrupt));
317
 
318
// vector 129 reserved
319
// vector 130 reserved
320
 
321
// TPU4_TCI4V
322
 
323
void INT_Excep_TPU4_TCI4V(void) __attribute__ ((interrupt));
324
 
325
// TPU4_TCI4U
326
 
327
void INT_Excep_TPU4_TCI4U(void) __attribute__ ((interrupt));
328
 
329
// TPU5_TGI5A
330
 
331
void INT_Excep_TPU5_TGI5A(void) __attribute__ ((interrupt));
332
 
333
// TPU5_TGI5B
334
 
335
void INT_Excep_TPU5_TGI5B(void) __attribute__ ((interrupt));
336
 
337
// vector 135 reserved
338
 
339
// TPU5_TCI5V
340
 
341
void INT_Excep_TPU5_TCI5V(void) __attribute__ ((interrupt));
342
 
343
// TPU5_TCI5U
344
 
345
void INT_Excep_TPU5_TCI5U(void) __attribute__ ((interrupt));
346
 
347
// TPU6_TGI6A
348
 
349
void INT_Excep_TPU6_TGI6A(void) __attribute__ ((interrupt));
350
 
351
// TPU6_TGI6B
352
 
353
void INT_Excep_TPU6_TGI6B(void) __attribute__ ((interrupt));
354
 
355
// TPU6_TGI6C
356
 
357
void INT_Excep_TPU6_TGI6C(void) __attribute__ ((interrupt));
358
 
359
// TPU6_TGI6D
360
 
361
void INT_Excep_TPU6_TGI6D(void) __attribute__ ((interrupt));
362
 
363
// TPU6_TCI6V
364
 
365
void INT_Excep_TPU6_TCI6V(void) __attribute__ ((interrupt));
366
 
367
// vector 143 reserved
368
// vector 144 reserved
369
 
370
// TPU7_TGI7A
371
 
372
void INT_Excep_TPU7_TGI7A(void) __attribute__ ((interrupt));
373
 
374
// TPU7_TGI7B
375
 
376
void INT_Excep_TPU7_TGI7B(void) __attribute__ ((interrupt));
377
 
378
// vector 147 reserved
379
// vector 148 reserved
380
 
381
// TPU7_TCI7V
382
 
383
void INT_Excep_TPU7_TCI7V(void) __attribute__ ((interrupt));
384
 
385
// TPU7_TCI7U
386
 
387
void INT_Excep_TPU7_TCI7U(void) __attribute__ ((interrupt));
388
 
389
// TPU8_TGI8A
390
 
391
void INT_Excep_TPU8_TGI8A(void) __attribute__ ((interrupt));
392
 
393
// TPU8_TGI8B
394
 
395
void INT_Excep_TPU8_TGI8B(void) __attribute__ ((interrupt));
396
 
397
// vector 153 reserved
398
 
399
// TPU8_TCI8V
400
 
401
void INT_Excep_TPU8_TCI8V(void) __attribute__ ((interrupt));
402
 
403
// TPU8_TCI8U
404
 
405
void INT_Excep_TPU8_TCI8U(void) __attribute__ ((interrupt));
406
 
407
// TPU9_TGI9A
408
 
409
void INT_Excep_TPU9_TGI9A(void) __attribute__ ((interrupt));
410
 
411
// TPU9_TGI9B
412
 
413
void INT_Excep_TPU9_TGI9B(void) __attribute__ ((interrupt));
414
 
415
// TPU9_TGI9C
416
 
417
void INT_Excep_TPU9_TGI9C(void) __attribute__ ((interrupt));
418
 
419
// TPU9_TGI9D
420
 
421
void INT_Excep_TPU9_TGI9D(void) __attribute__ ((interrupt));
422
 
423
// TPU9_TCI9V
424
 
425
void INT_Excep_TPU9_TCI9V(void) __attribute__ ((interrupt));
426
 
427
// TPU10_TGI10A
428
 
429
void INT_Excep_TPU10_TGI10A(void) __attribute__ ((interrupt));
430
 
431
// TPU10_TGI10B
432
 
433
void INT_Excep_TPU10_TGI10B(void) __attribute__ ((interrupt));
434
 
435
// vector 163 reserved
436
// vector 164 reserved
437
 
438
// TPU10_TCI10V
439
 
440
void INT_Excep_TPU10_TCI10V(void) __attribute__ ((interrupt));
441
 
442
// TPU10_TCI10U
443
 
444
void INT_Excep_TPU10_TCI10U(void) __attribute__ ((interrupt));
445
 
446
// TPU11_TGI11A
447
 
448
void INT_Excep_TPU11_TGI11A(void) __attribute__ ((interrupt));
449
 
450
// TPU11_TGI11B
451
 
452
void INT_Excep_TPU11_TGI11B(void) __attribute__ ((interrupt));
453
 
454
// vector 169 reserved
455
 
456
// TPU11_TCI11V
457
 
458
void INT_Excep_TPU11_TCI11V(void) __attribute__ ((interrupt));
459
 
460
// TPU11_TCI11U
461
 
462
void INT_Excep_TPU11_TCI11U(void) __attribute__ ((interrupt));
463
 
464
// vector 172 reserved
465
// vector 173 reserved
466
 
467
// TMR0_CMI0A
468
 
469
void INT_Excep_TMR0_CMI0A(void) __attribute__ ((interrupt));
470
 
471
// TMR0_CMI0B
472
 
473
void INT_Excep_TMR0_CMI0B(void) __attribute__ ((interrupt));
474
 
475
// TMR0_OV0I
476
 
477
void INT_Excep_TMR0_OV0I(void) __attribute__ ((interrupt));
478
 
479
// TMR1_CMI1A
480
 
481
void INT_Excep_TMR1_CMI1A(void) __attribute__ ((interrupt));
482
 
483
// TMR1_CMI1B
484
 
485
void INT_Excep_TMR1_CMI1B(void) __attribute__ ((interrupt));
486
 
487
// TMR1_OV1I
488
 
489
void INT_Excep_TMR1_OV1I(void) __attribute__ ((interrupt));
490
 
491
// TMR2_CMI2A
492
 
493
void INT_Excep_TMR2_CMI2A(void) __attribute__ ((interrupt));
494
 
495
// TMR2_CMI2B
496
 
497
void INT_Excep_TMR2_CMI2B(void) __attribute__ ((interrupt));
498
 
499
// TMR2_OV2I
500
 
501
void INT_Excep_TMR2_OV2I(void) __attribute__ ((interrupt));
502
 
503
// TMR3_CMI3A
504
 
505
void INT_Excep_TMR3_CMI3A(void) __attribute__ ((interrupt));
506
 
507
// TMR3_CMI3B
508
 
509
void INT_Excep_TMR3_CMI3B(void) __attribute__ ((interrupt));
510
 
511
// TMR3_OV3I
512
 
513
void INT_Excep_TMR3_OV3I(void) __attribute__ ((interrupt));
514
 
515
// vector 186 reserved
516
// vector 187 reserved
517
// vector 188 reserved
518
// vector 189 reserved
519
// vector 190 reserved
520
// vector 191 reserved
521
// vector 192 reserved
522
// vector 193 reserved
523
// vector 194 reserved
524
// vector 195 reserved
525
// vector 196 reserved
526
// vector 197 reserved
527
 
528
// DMAC_DMTEND0
529
 
530
void INT_Excep_DMAC_DMTEND0(void);
531
 
532
// DMAC_DMTEND1
533
 
534
void INT_Excep_DMAC_DMTEND1(void) __attribute__ ((interrupt));
535
 
536
// DMAC_DMTEND2
537
 
538
void INT_Excep_DMAC_DMTEND2(void) __attribute__ ((interrupt));
539
 
540
// DMAC_DMTEND3
541
 
542
void INT_Excep_DMAC_DMTEND3(void) __attribute__ ((interrupt));
543
 
544
// vector 202 reserved
545
// vector 203 reserved
546
// vector 204 reserved
547
// vector 205 reserved
548
// vector 206 reserved
549
// vector 207 reserved
550
// vector 208 reserved
551
// vector 209 reserved
552
// vector 210 reserved
553
// vector 211 reserved
554
// vector 212 reserved
555
// vector 213 reserved
556
 
557
// SCI0_ERI0
558
 
559
void INT_Excep_SCI0_ERI0(void) __attribute__ ((interrupt));
560
 
561
// SCI0_RXI0
562
 
563
void INT_Excep_SCI0_RXI0(void) __attribute__ ((interrupt));
564
 
565
// SCI0_TXI0
566
 
567
void INT_Excep_SCI0_TXI0(void) __attribute__ ((interrupt));
568
 
569
// SCI0_TEI0
570
 
571
void INT_Excep_SCI0_TEI0(void) __attribute__ ((interrupt));
572
 
573
// SCI1_ERI1
574
 
575
void INT_Excep_SCI1_ERI1(void) __attribute__ ((interrupt));
576
 
577
// SCI1_RXI1
578
 
579
void INT_Excep_SCI1_RXI1(void) __attribute__ ((interrupt));
580
 
581
// SCI1_TXI1
582
 
583
void INT_Excep_SCI1_TXI1(void) __attribute__ ((interrupt));
584
 
585
// SCI1_TEI1
586
 
587
void INT_Excep_SCI1_TEI1(void) __attribute__ ((interrupt));
588
 
589
// SCI2_ERI2
590
 
591
void INT_Excep_SCI2_ERI2(void) __attribute__ ((interrupt));
592
 
593
// SCI2_RXI2
594
 
595
void INT_Excep_SCI2_RXI2(void) __attribute__ ((interrupt));
596
 
597
// SCI2_TXI2
598
 
599
void INT_Excep_SCI2_TXI2(void) __attribute__ ((interrupt));
600
 
601
// SCI2_TEI2
602
 
603
void INT_Excep_SCI2_TEI2(void) __attribute__ ((interrupt));
604
 
605
// SCI3_ERI3
606
 
607
void INT_Excep_SCI3_ERI3(void) __attribute__ ((interrupt));
608
 
609
// SCI3_RXI3
610
 
611
void INT_Excep_SCI3_RXI3(void) __attribute__ ((interrupt));
612
 
613
// SCI3_TXI3
614
 
615
void INT_Excep_SCI3_TXI3(void) __attribute__ ((interrupt));
616
 
617
// SCI3_TEI3
618
 
619
void INT_Excep_SCI3_TEI3(void) __attribute__ ((interrupt));
620
 
621
// SCI4_ERI4
622
 
623
void INT_Excep_SCI4_ERI4(void) __attribute__ ((interrupt));
624
 
625
// SCI4_RXI4
626
 
627
void INT_Excep_SCI4_RXI4(void) __attribute__ ((interrupt));
628
 
629
// SCI4_TXI4
630
 
631
void INT_Excep_SCI4_TXI4(void) __attribute__ ((interrupt));
632
 
633
// SCI4_TEI4
634
 
635
void INT_Excep_SCI4_TEI4(void) __attribute__ ((interrupt));
636
 
637
// SCI5_ERI5
638
 
639
void INT_Excep_SCI5_ERI5(void) __attribute__ ((interrupt));
640
 
641
// SCI5_RXI5
642
 
643
void INT_Excep_SCI5_RXI5(void) __attribute__ ((interrupt));
644
 
645
// SCI5_TXI5
646
 
647
void INT_Excep_SCI5_TXI5(void) __attribute__ ((interrupt));
648
 
649
// SCI5_TEI5
650
 
651
void INT_Excep_SCI5_TEI5(void) __attribute__ ((interrupt));
652
 
653
// SCI6_ERI6
654
 
655
void INT_Excep_SCI6_ERI6(void) __attribute__ ((interrupt));
656
 
657
// SCI6_RXI6
658
 
659
void INT_Excep_SCI6_RXI6(void) __attribute__ ((interrupt));
660
 
661
// SCI6_TXI6
662
 
663
void INT_Excep_SCI6_TXI6(void) __attribute__ ((interrupt));
664
 
665
// SCI6_TEI6
666
 
667
void INT_Excep_SCI6_TEI6(void) __attribute__ ((interrupt));
668
 
669
// vector 242 reserved
670
// vector 243 reserved
671
// vector 244 reserved
672
// vector 245 reserved
673
 
674
// RIIC0_EEI0
675
 
676
void INT_Excep_RIIC0_EEI0(void) __attribute__ ((interrupt));
677
 
678
// RIIC0_RXI0
679
 
680
void INT_Excep_RIIC0_RXI0(void) __attribute__ ((interrupt));
681
 
682
// RIIC0_TXI0
683
 
684
void INT_Excep_RIIC0_TXI0(void) __attribute__ ((interrupt));
685
 
686
// RIIC0_TEI0
687
 
688
void INT_Excep_RIIC0_TEI0(void) __attribute__ ((interrupt));
689
 
690
// RIIC1_EEI1
691
 
692
void INT_Excep_RIIC1_EEI1(void) __attribute__ ((interrupt));
693
 
694
// RIIC1_RXI1
695
 
696
void INT_Excep_RIIC1_RXI1(void) __attribute__ ((interrupt));
697
 
698
// RIIC1_TXI1
699
 
700
void INT_Excep_RIIC1_TXI1(void) __attribute__ ((interrupt));
701
 
702
// RIIC1_TEI1
703
 
704
void INT_Excep_RIIC1_TEI1(void) __attribute__ ((interrupt));
705
 
706
// vector 254 reserved
707
// vector 255 reserved
708
 
709
//;<<VECTOR DATA START (POWER ON RESET)>>
710
//;Power On Reset PC
711
extern void PowerON_Reset_PC(void) __attribute__ ((interrupt));
712
//;<<VECTOR DATA END (POWER ON RESET)>>
713
 
714
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.