| 1 |
585 |
jeremybenn |
/******************************************************************************
|
| 2 |
|
|
* DISCLAIMER
|
| 3 |
|
|
* Please refer to http://www.renesas.com/disclaimer
|
| 4 |
|
|
******************************************************************************
|
| 5 |
|
|
Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
|
| 6 |
|
|
*******************************************************************************
|
| 7 |
|
|
* File Name : phy.h
|
| 8 |
|
|
* Version : 1.02
|
| 9 |
|
|
* Description : Ethernet PHY device driver
|
| 10 |
|
|
******************************************************************************
|
| 11 |
|
|
* History : DD.MM.YYYY Version Description
|
| 12 |
|
|
* : 15.02.2010 1.00 First Release
|
| 13 |
|
|
* : 17.03.2010 1.01 Modification of macro definitions for access timing
|
| 14 |
|
|
* : 06.04.2010 1.02 RX62N changes
|
| 15 |
|
|
******************************************************************************/
|
| 16 |
|
|
|
| 17 |
|
|
#ifndef PHY_H
|
| 18 |
|
|
#define PHY_H
|
| 19 |
|
|
|
| 20 |
|
|
/******************************************************************************
|
| 21 |
|
|
Includes <System Includes> , "Project Includes"
|
| 22 |
|
|
******************************************************************************/
|
| 23 |
|
|
#include <stdint.h>
|
| 24 |
|
|
|
| 25 |
|
|
/******************************************************************************
|
| 26 |
|
|
Typedef definitions
|
| 27 |
|
|
******************************************************************************/
|
| 28 |
|
|
|
| 29 |
|
|
/******************************************************************************
|
| 30 |
|
|
Macro definitions
|
| 31 |
|
|
******************************************************************************/
|
| 32 |
|
|
/* Standard PHY Registers */
|
| 33 |
|
|
#define BASIC_MODE_CONTROL_REG 0
|
| 34 |
|
|
#define BASIC_MODE_STATUS_REG 1
|
| 35 |
|
|
#define PHY_IDENTIFIER1_REG 2
|
| 36 |
|
|
#define PHY_IDENTIFIER2_REG 3
|
| 37 |
|
|
#define AN_ADVERTISEMENT_REG 4
|
| 38 |
|
|
#define AN_LINK_PARTNER_ABILITY_REG 5
|
| 39 |
|
|
#define AN_EXPANSION_REG 6
|
| 40 |
|
|
|
| 41 |
|
|
/* Media Independent Interface */
|
| 42 |
|
|
#define PHY_ST 1
|
| 43 |
|
|
#define PHY_READ 2
|
| 44 |
|
|
#define PHY_WRITE 1
|
| 45 |
|
|
#define PHY_ADDR 0x1F
|
| 46 |
|
|
|
| 47 |
|
|
#define MDC_WAIT 2
|
| 48 |
|
|
|
| 49 |
|
|
/* PHY return definitions */
|
| 50 |
|
|
#define R_PHY_OK 0
|
| 51 |
|
|
#define R_PHY_ERROR -1
|
| 52 |
|
|
|
| 53 |
|
|
/* Auto-Negotiation Link Partner Status */
|
| 54 |
|
|
#define PHY_AN_LINK_PARTNER_100BASE 0x0180
|
| 55 |
|
|
#define PHY_AN_LINK_PARTNER_FULL 0x0140
|
| 56 |
|
|
#define PHY_AN_COMPLETE ( 1 << 5 )
|
| 57 |
|
|
|
| 58 |
|
|
/*
|
| 59 |
|
|
* Wait counter definitions of PHY-LSI initialization
|
| 60 |
|
|
* ICLK = 96MHz
|
| 61 |
|
|
*/
|
| 62 |
|
|
#define PHY_RESET_WAIT 0x00000020L
|
| 63 |
|
|
#define PHY_AUTO_NEGOTIATON_WAIT 75
|
| 64 |
|
|
|
| 65 |
|
|
#define PHY_AN_ENABLE 0x1200
|
| 66 |
|
|
#define PHY_AN_10_100_F_H 0xde1
|
| 67 |
|
|
|
| 68 |
|
|
/******************************************************************************
|
| 69 |
|
|
Variable Externs
|
| 70 |
|
|
******************************************************************************/
|
| 71 |
|
|
|
| 72 |
|
|
/******************************************************************************
|
| 73 |
|
|
Functions Prototypes
|
| 74 |
|
|
******************************************************************************/
|
| 75 |
|
|
/**
|
| 76 |
|
|
* External prototypes
|
| 77 |
|
|
**/
|
| 78 |
|
|
int16_t phy_init( void );
|
| 79 |
|
|
void phy_set_100full( void );
|
| 80 |
|
|
void phy_set_10half( void );
|
| 81 |
|
|
int16_t phy_set_autonegotiate( void );
|
| 82 |
|
|
|
| 83 |
|
|
#endif /* PHY_H */
|
| 84 |
|
|
|
