OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [SuperH_SH7216_Renesas/] [RTOSDemo/] [RTOSDemo.pgs] - Blame information for rev 623

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 585 jeremybenn
; Project Generator Setup Infomation
2
 
3
[PGS Version]
4
Version=1.0
5
 
6
[Toolchain]
7
Toolchain=Renesas SuperH Standard
8
Toolchain Name=Renesas SuperH RISC engine Standard Toolchain
9
Toolchain Version=9.3.2.0
10
 
11
[CPU]
12
CPU Family=SuperH RISC engine
13
CPU Series=SH2A-FPU
14
CPU Type=Other
15
Operating Mode=Not Support
16
Address Space=Not Support
17
Multiple=Not Support
18
Divide=Not Support
19
 
20
[Project]
21
Project Name=RTOSDemo
22
Project Type=Application
23
 
24
[Stack Settings]
25
Stack Pointer Address=H'FFFC0000
26
Stack Size=H'400
27
Stack Section Name=S
28
Stack Section Address=
29
Source File Name=stacksct.h
30
Description=#pragma stacksize 0x400         /* Do not modify this line. */
31
Default Stack Pointer Address=H'FFFC0000
32
Default Stack Size=H'400
33
 
34
[Initial Settings]
35
Simulator I/O=disable

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.