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jeremybenn |
/*
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FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS books - available as PDF or paperback *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "queue.h"
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#include "semphr.h"
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/* Application includes. */
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#include "i2c.h"
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/*-----------------------------------------------------------*/
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/* Bit definitions within the I2CONCLR register. */
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#define i2cSTA_BIT ( ( unsigned char ) 0x20 )
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#define i2cSI_BIT ( ( unsigned char ) 0x08 )
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#define i2cSTO_BIT ( ( unsigned char ) 0x10 )
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#define i2cAA_BIT ( ( unsigned char ) 0x04 )
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/* Status codes for the I2STAT register. */
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#define i2cSTATUS_START_TXED ( 0x08 )
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#define i2cSTATUS_REP_START_TXED ( 0x10 )
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#define i2cSTATUS_TX_ADDR_ACKED ( 0x18 )
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#define i2cSTATUS_DATA_TXED ( 0x28 )
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#define i2cSTATUS_RX_ADDR_ACKED ( 0x40 )
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#define i2cSTATUS_DATA_RXED ( 0x50 )
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#define i2cSTATUS_LAST_BYTE_RXED ( 0x58 )
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/* Constants for operation of the VIC. */
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#define i2cCLEAR_VIC_INTERRUPT ( 0 )
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/* Misc constants. */
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#define i2cJUST_ONE_BYTE_TO_RX ( 1 )
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#define i2cBUFFER_ADDRESS_BYTES ( 2 )
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/* End the current transmission and free the bus. */
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#define i2cEND_TRANSMISSION( lStatus ) \
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{ \
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I2C_I2CONCLR = i2cAA_BIT; \
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I2C_I2CONSET = i2cSTO_BIT; \
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eCurrentState = eSentStart; \
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lTransactionCompleted = lStatus; \
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}
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/*-----------------------------------------------------------*/
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/* Valid i2c communication states. */
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typedef enum
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{
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eSentStart, /*<< Last action was the transmission of a start bit. */
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eSentAddressForWrite, /*<< Last action was the transmission of the slave address we are to write to. */
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eSentAddressForRead, /*<< Last action was the transmission of the slave address we are to read from. */
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eSentData, /*<< Last action was the transmission of a data byte. */
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eReceiveData /*<< We expected data to be received. */
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} I2C_STATE;
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/*-----------------------------------------------------------*/
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/* Points to the message currently being sent. */
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volatile xI2CMessage *pxCurrentMessage = NULL;
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/* The queue of messages waiting to be transmitted. */
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static xQueueHandle xMessagesForTx;
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/* Flag used to indicate whether or not the ISR is amid sending a message. */
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unsigned long ulBusFree = ( unsigned long ) pdTRUE;
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/* Setting this to true will cause the TCP task to think a message is
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complete and thus restart. It can therefore be used under error states
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to force a restart. */
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volatile long lTransactionCompleted = pdTRUE;
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/*-----------------------------------------------------------*/
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void vI2CISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxTxMessages, unsigned long **ppulBusFree )
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{
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/* Create the queues used to hold Rx and Tx characters. */
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xMessagesForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( xI2CMessage * ) );
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/* Pass back a reference to the queue and bus free flag so the I2C API file
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can post messages. */
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*pxTxMessages = xMessagesForTx;
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*ppulBusFree = &ulBusFree;
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}
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/*-----------------------------------------------------------*/
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/* The ISR entry point. */
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void vI2C_ISR_Wrapper( void ) __attribute__ (( naked ));
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/* The ISR function to perform the actual work. This must be a separate
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function from the wrapper to ensure the correct stack frame is set up. */
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void vI2C_ISR_Handler( void );
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/*-----------------------------------------------------------*/
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void vI2C_ISR_Wrapper( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT();
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/* Call the handler to perform the actual work. This must be a
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separate function to ensure the correct stack frame is set up. */
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vI2C_ISR_Handler();
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/* Restore the context of whichever task is going to run next. */
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portRESTORE_CONTEXT();
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}
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/*-----------------------------------------------------------*/
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void vI2C_ISR_Handler( void )
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{
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/* Holds the current transmission state. */
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static I2C_STATE eCurrentState = eSentStart;
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static long lMessageIndex = -i2cBUFFER_ADDRESS_BYTES; /* There are two address bytes to send prior to the data. */
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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long lBytesLeft;
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/* The action taken for this interrupt depends on our current state. */
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switch( eCurrentState )
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{
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case eSentStart :
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/* We sent a start bit, if it was successful we can
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go on to send the slave address. */
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if( ( I2C_I2STAT == i2cSTATUS_START_TXED ) || ( I2C_I2STAT == i2cSTATUS_REP_START_TXED ) )
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{
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/* Send the slave address. */
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I2C_I2DAT = pxCurrentMessage->ucSlaveAddress;
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if( pxCurrentMessage->ucSlaveAddress & i2cREAD )
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{
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/* We are then going to read bytes back from the
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slave. */
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eCurrentState = eSentAddressForRead;
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/* Initialise the buffer index so the first byte goes
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into the first buffer position. */
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lMessageIndex = 0;
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}
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else
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{
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/* We are then going to write some data to the slave. */
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eCurrentState = eSentAddressForWrite;
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/* When writing bytes we first have to send the two
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byte buffer address so lMessageIndex is set negative,
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when it reaches 0 it is time to send the actual data. */
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lMessageIndex = -i2cBUFFER_ADDRESS_BYTES;
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}
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}
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else
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{
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/* Could not send the start bit so give up. */
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i2cEND_TRANSMISSION( pdFAIL );
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}
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I2C_I2CONCLR = i2cSTA_BIT;
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break;
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case eSentAddressForWrite :
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/* We sent the address of the slave we are going to write to.
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If this was acknowledged we can go on to send the data. */
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if( I2C_I2STAT == i2cSTATUS_TX_ADDR_ACKED )
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{
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/* Start the first byte transmitting which is the
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first byte of the buffer address to which the data will
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be sent. */
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I2C_I2DAT = pxCurrentMessage->ucBufferAddressHighByte;
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eCurrentState = eSentData;
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}
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else
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{
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/* Address was not acknowledged so give up. */
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i2cEND_TRANSMISSION( pdFAIL );
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}
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break;
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case eSentAddressForRead :
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/* We sent the address of the slave we are going to read from.
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If this was acknowledged we can go on to read the data. */
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if( I2C_I2STAT == i2cSTATUS_RX_ADDR_ACKED )
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{
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eCurrentState = eReceiveData;
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if( pxCurrentMessage->lMessageLength > i2cJUST_ONE_BYTE_TO_RX )
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{
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/* Don't ack the last byte of the message. */
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I2C_I2CONSET = i2cAA_BIT;
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}
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}
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else
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{
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/* Something unexpected happened - give up. */
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i2cEND_TRANSMISSION( pdFAIL );
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}
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break;
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case eReceiveData :
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/* We have just received a byte from the slave. */
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if( ( I2C_I2STAT == i2cSTATUS_DATA_RXED ) || ( I2C_I2STAT == i2cSTATUS_LAST_BYTE_RXED ) )
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{
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/* Buffer the byte just received then increment the index
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so it points to the next free space. */
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pxCurrentMessage->pucBuffer[ lMessageIndex ] = I2C_I2DAT;
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lMessageIndex++;
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/* How many more bytes are we expecting to receive? */
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lBytesLeft = pxCurrentMessage->lMessageLength - lMessageIndex;
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if( lBytesLeft == ( unsigned long ) 0 )
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{
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/* This was the last byte in the message. */
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i2cEND_TRANSMISSION( pdPASS );
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/* If xMessageCompleteSemaphore is not null then there
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is a task waiting for this message to complete and we
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must 'give' the semaphore so the task is woken.*/
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if( pxCurrentMessage->xMessageCompleteSemaphore )
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{
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xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );
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}
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/* Are there any other messages to transact? */
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if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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/* Start the next message - which was
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retrieved from the queue. */
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I2C_I2CONSET = i2cSTA_BIT;
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| 284 |
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}
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| 285 |
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else
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| 286 |
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{
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| 287 |
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/* No more messages were found to be waiting for
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| 288 |
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transaction so the bus is free. */
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| 289 |
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ulBusFree = ( unsigned long ) pdTRUE;
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| 290 |
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}
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| 291 |
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}
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| 292 |
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else
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| 293 |
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{
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| 294 |
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/* There are more bytes to receive but don't ack the
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| 295 |
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last byte. */
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| 296 |
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if( lBytesLeft <= i2cJUST_ONE_BYTE_TO_RX )
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| 297 |
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{
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| 298 |
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I2C_I2CONCLR = i2cAA_BIT;
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| 299 |
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}
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| 300 |
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}
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| 301 |
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}
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| 302 |
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else
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| 303 |
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{
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| 304 |
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/* Something unexpected happened - give up. */
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| 305 |
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i2cEND_TRANSMISSION( pdFAIL );
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| 306 |
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}
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| 307 |
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| 308 |
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break;
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| 309 |
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| 310 |
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case eSentData :
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| 311 |
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| 312 |
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/* We sent a data byte, if successful send the next byte in
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| 313 |
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the message. */
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| 314 |
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if( I2C_I2STAT == i2cSTATUS_DATA_TXED )
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| 315 |
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{
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| 316 |
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/* Index to the next byte to send. */
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| 317 |
|
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lMessageIndex++;
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| 318 |
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if( lMessageIndex < 0 )
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| 319 |
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{
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| 320 |
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/* lMessage index is still negative so we have so far
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| 321 |
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only sent the first byte of the buffer address. Send
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| 322 |
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the second byte now, then initialise the buffer index
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| 323 |
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to zero so the next byte sent comes from the actual
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| 324 |
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data buffer. */
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| 325 |
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I2C_I2DAT = pxCurrentMessage->ucBufferAddressLowByte;
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| 326 |
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}
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| 327 |
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else if( lMessageIndex < pxCurrentMessage->lMessageLength )
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| 328 |
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{
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| 329 |
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/* Simply send the next byte in the tx buffer. */
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| 330 |
|
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I2C_I2DAT = pxCurrentMessage->pucBuffer[ lMessageIndex ];
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| 331 |
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}
|
| 332 |
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else
|
| 333 |
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{
|
| 334 |
|
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/* No more bytes in this message to be send. Finished
|
| 335 |
|
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sending message - send a stop bit. */
|
| 336 |
|
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i2cEND_TRANSMISSION( pdPASS );
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| 337 |
|
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|
| 338 |
|
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/* If xMessageCompleteSemaphore is not null then there
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| 339 |
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is a task waiting for this message to be sent and the
|
| 340 |
|
|
semaphore must be 'given' to wake the task. */
|
| 341 |
|
|
if( pxCurrentMessage->xMessageCompleteSemaphore )
|
| 342 |
|
|
{
|
| 343 |
|
|
xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );
|
| 344 |
|
|
}
|
| 345 |
|
|
|
| 346 |
|
|
/* Are there any other messages to transact? */
|
| 347 |
|
|
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )
|
| 348 |
|
|
{
|
| 349 |
|
|
/* Start the next message from the Tx queue. */
|
| 350 |
|
|
I2C_I2CONSET = i2cSTA_BIT;
|
| 351 |
|
|
}
|
| 352 |
|
|
else
|
| 353 |
|
|
{
|
| 354 |
|
|
/* No more message were queues for transaction so
|
| 355 |
|
|
the bus is free. */
|
| 356 |
|
|
ulBusFree = ( unsigned long ) pdTRUE;
|
| 357 |
|
|
}
|
| 358 |
|
|
}
|
| 359 |
|
|
}
|
| 360 |
|
|
else
|
| 361 |
|
|
{
|
| 362 |
|
|
/* Something unexpected happened, give up. */
|
| 363 |
|
|
i2cEND_TRANSMISSION( pdFAIL );
|
| 364 |
|
|
}
|
| 365 |
|
|
break;
|
| 366 |
|
|
|
| 367 |
|
|
default :
|
| 368 |
|
|
|
| 369 |
|
|
/* Should never get here. */
|
| 370 |
|
|
eCurrentState = eSentStart;
|
| 371 |
|
|
break;
|
| 372 |
|
|
}
|
| 373 |
|
|
|
| 374 |
|
|
/* Clear the interrupt. */
|
| 375 |
|
|
I2C_I2CONCLR = i2cSI_BIT;
|
| 376 |
|
|
VICVectAddr = i2cCLEAR_VIC_INTERRUPT;
|
| 377 |
|
|
|
| 378 |
|
|
if( xHigherPriorityTaskWoken )
|
| 379 |
|
|
{
|
| 380 |
|
|
portYIELD_FROM_ISR();
|
| 381 |
|
|
}
|
| 382 |
|
|
}
|
| 383 |
|
|
/*-----------------------------------------------------------*/
|
| 384 |
|
|
|
