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585 |
jeremybenn |
/*
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********************************************************************************
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* TERN, Inc.
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* (c) Copyright 2005, http://www.tern.com
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*
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* - Created to support i2chip module on a variety of TERN hardware platforms.
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********************************************************************************
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*/
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#ifndef _I2CHIP_HW_H_
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#define _I2CHIP_HW_H_
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#include "types.h"
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#ifdef TERN_SC // SensorCore controller, has mapping identical to the RL
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#define TERN_RL
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#endif
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#ifdef TERN_RL // R-Engine-L controller, with mapping at MCS0.
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#define I2CHIP_MCS_DIRECT
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#define I2CHIP_INT4
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#define TERN_RE
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#endif // TERN_RL
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#ifdef TERN_5E
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#define TERN_586
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#endif
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#ifdef TERN_RD
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#define TERN_RE
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#endif // TERN_RD
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#ifdef TERN_RE
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#define TERN_186
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#endif
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#ifdef TERN_P51
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void p51_window(unsigned int page);
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#define I2CHIP_WINDOW
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#define I2CHIP_P51
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#ifdef TERN_186
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#define I2CHIP_INT4
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#define TERN_16_BIT
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#endif // TERN_186
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#ifdef TERN_586
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#define I2CHIP_INT0
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#define I2CHIP_WINDOW_IO
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#endif // TERN_586
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#endif // TERN_P51
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#ifdef TERN_CEYE
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#define TERN_EE // C-Eye configured with onboard i2chip, same as EE
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#endif
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#ifdef TERN_EE
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#define TERN_186
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#define I2CHIP_MCS_DIRECT
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#define I2CHIP_INT4
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#define TERN_16_BIT
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#endif // TERN_EE
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#ifdef TERN_MMC
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#define I2CHIP_WINDOW
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#define I2CHIP_MMC
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#ifdef TERN_RD
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#define I2CHIP_INT3
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#else
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#ifdef TERN_186
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#define I2CHIP_INT4
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#endif // TERN_186
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#endif // TERN_RD
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#ifdef TERN_586
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#define I2CHIP_INT0
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#define I2CHIP_WINDOW_IO
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#endif // TERN_586
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#endif // TERN_MMC
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#ifdef TERN_586
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#include "586.h"
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void interrupt far int0_isr(void);
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void interrupt far spu_m_isr(void);
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void interrupt far spu_1_isr(void);
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void interrupt far spu_2_isr(void);
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#define MMCR 0xdf00
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#endif // TERN_586
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#ifdef TERN_186
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#ifndef TERN_RE
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#include "ae.h"
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#else
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#include "re.h"
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#define I2CHIP_SHIFTED_ADDRESS
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#endif
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#endif
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#ifndef I2CHIP_MCS_DIRECT
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#ifndef I2CHIP_WINDOW
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#ifndef I2CHIP_WINDOW_IO
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#error You must define the TERN address mapping used to drive the I2CHIP module!
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#endif // I2CHIP_WINDOW_IO
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#endif // I2CHIP_MMC_WINDOW
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#endif // I2CHIP_MCS_DIRECT
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#ifndef I2CHIP_INT0
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#ifndef I2CHIP_INT3
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#ifndef I2CHIP_INT4
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#ifndef I2CHIP_POLL
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#error You must specify an interrupt/polling mechanism for the I2CHIP module!
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#endif // I2CHIP_POLL
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#endif // I2CHIP_INT3
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#endif // I2CHIP_INT4
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#endif // I2CHIP_INT0
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#ifdef I2CHIP_POLL
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#define I2CHIP_POLL_ISR(a) { delay_ms(20); disable(); a(); enable(); }
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#define INT_INIT(isr)
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#define INT_EOI
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#endif // I2CHIP_POLL
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#ifdef I2CHIP_INT4
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#define INT_INIT(isr) int4_init(1, isr)
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#define INT_EOI outport(0xff22,0x0010)
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#define I2CHIP_POLL_ISR(a)
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#endif
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#ifdef I2CHIP_INT3
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#define INT_INIT(isr) int3_init(1, isr)
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#define INT_EOI outport(0xff22,0x000f)
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#define I2CHIP_POLL_ISR(a)
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#endif
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#ifdef I2CHIP_INT0
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#define INT_INIT(isr) int0_init(1, isr)
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#define INT_EOI outportb(_MPICOCW2_IO,0x61); // 586 only EOI
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#define I2CHIP_POLL_ISR(a)
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#endif
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#ifdef I2CHIP_SHIFTED_ADDRESS
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#define SA_OFFSET(a) ((a) << 1)
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#else
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#define SA_OFFSET(a) a
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#endif // I2CHIP_SHIFTED_ADDRESS ... *if*
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// -------------------- WINDOW-RELATED DEFINES ----------------------
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#ifdef I2CHIP_WINDOW
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void i2chip_set_page(u_int addr);
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#define I2CHIP_SET_PAGE(p) i2chip_set_page(p)
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u_char far* i2chip_mkptr(u_int addr);
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void i2chip_push_window(u_int addr);
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void i2chip_pop_window(void);
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u_int i2chip_get_window(void);
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void i2chip_set_window(u_int window_addr);
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// Set to command window.
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// Note that if you're using other MMC chips within your application, you will
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// need to call this function regularly, if you've changed the MMC chip/page
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// selection via mmc_window(). The driver code otherwise assume that you never
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// change away from chip 7, page 0.
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#define WINDOW_RESTORE_BASE i2chip_mkptr(0)
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// ----------------------- I2CHIP_WINDOW_IO ----------------------------
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#ifdef I2CHIP_WINDOW_IO
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#ifdef TERN_5E
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#define I2CHIP_BASE_SEG 0x2000 // Address offset for W3100A
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#else
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#define I2CHIP_BASE_SEG 0x1800 // Address offset for W3100A
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#endif
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#define COMMAND_BASE_SEG 0x0000
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#define SEND_DATA_BUF 0x4000 // Internal Tx buffer address of W3100A
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#define RECV_DATA_BUF 0x6000 // Internal Rx buffer address of W3100A
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#define WINDOW_BASE_SEGM COMMAND_BASE_SEG
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#define MK_FP_WINDOW(a, b) i2chip_mkptr(a+SA_OFFSET(b))
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#define MK_FP_SA MK_FP_WINDOW
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u_char io_read_value(u_char far* addr);
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void io_write_value(u_char far* addr, u_char value);
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#define READ_VALUE(a) io_read_value(a)
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#define WRITE_VALUE(a, v) io_write_value(a, v)
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#define WINDOW_PTR_INC(a) \
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if ((FP_OFF(a) & 0xff) == 0xff) \
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a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \
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else \
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a++;
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#endif // I2CHIP_WINDOW_IO
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// -------------------- !NOT! I2CHIP_WINDOW_IO ----------------------------
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#ifndef I2CHIP_WINDOW_IO
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#define READ_VALUE(a) *(a)
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#define WRITE_VALUE(a, v) *(a) = v
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#define WINDOW_BASE_SEGM 0x8000
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#define MK_FP_WINDOW(a, b) i2chip_mkptr(a+SA_OFFSET(b))
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#define MK_FP_SA MK_FP_WINDOW
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#ifdef I2CHIP_SHIFTED_ADDRESS
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#define COMMAND_BASE_SEG 0x0000
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#define SEND_DATA_BUF 0x8000
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#define RECV_DATA_BUF 0xC000
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#define WINDOW_PTR_INC(a) \
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if ((FP_OFF(a) & 0xff) == 0xfe) \
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a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \
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else \
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a+=2;
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#else
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#define COMMAND_BASE_SEG 0x0000
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#define SEND_DATA_BUF 0x4000
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#define RECV_DATA_BUF 0x6000
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#define WINDOW_PTR_INC(a) \
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if ((FP_OFF(a) & 0xff) == 0xff) \
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a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \
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else \
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a++;
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#endif // I2CHIP_SHIFTED_ADDRESS
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#endif // NOT I2CHIP_WINDOW_IO
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#endif // I2CHIP_WINDOW
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// -------------------- I2CHIP_DIRECT ----------------------------
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#ifdef I2CHIP_MCS_DIRECT
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#define READ_VALUE(a) *(a)
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#define WRITE_VALUE(a, v) *(a) = v
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#define I2CHIP_BASE_SEG 0x8000
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#define MK_FP_SA(a, b) MK_FP(a, SA_OFFSET(b))
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#define WINDOW_PTR_INC(a) a+=SA_OFFSET(1);
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#define WINDOW_RESTORE_BASE
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#define MK_FP_WINDOW MK_FP_SA
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#define WINDOW_BASE_SEG I2CHIP_BASE_SEG
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#define COMMAND_BASE_SEG I2CHIP_BASE_SEG
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#ifdef I2CHIP_SHIFTED_ADDRESS
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#define SEND_DATA_BUF 0x8800 // Internal Tx buffer address of W3100A
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#define RECV_DATA_BUF 0x8C00 // Internal Rx buffer address of W3100A
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#else
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#define SEND_DATA_BUF 0x8400 // Internal Tx buffer address of W3100A
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#define RECV_DATA_BUF 0x8600 // Internal Rx buffer address of W3100A
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#endif // I2CHIP_SHIFTED_ADDRESS
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#endif // I2CHIP_MCS_DIRECT
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/* Internal register set of W3100A */
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#define COMMAND(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, i)))
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#define INT_STATUS(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_C0_ISR + i)))
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#define INT_REG ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_IR)))
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#define INTMASK ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_IMR)))
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#define RESETSOCK ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x0A)))
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#define RX_PTR_BASE I2CHIP_C0_RW_PR
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#define RX_PTR_SIZE (I2CHIP_C1_RW_PR - I2CHIP_C0_RW_PR)
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| 262 |
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#define RX_WR_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE * i)))
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#define RX_RD_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE * i + 0x04)))
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#define RX_ACK_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE * i + 0x08)))
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| 266 |
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#define TX_PTR_BASE I2CHIP_C0_TW_PR
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#define TX_PTR_SIZE (I2CHIP_C1_TW_PR - I2CHIP_C0_TW_PR)
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| 269 |
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#define TX_WR_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE * i)))
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#define TX_RD_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE * i + 0x04)))
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#define TX_ACK_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE * i + 0x08)))
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| 273 |
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/* Shadow Register Pointer Define */
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/* For windowing purposes, these are definitely outside the first 256-byte Window...
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therefore, use the MK_FP_WINDOW macros instead. */
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#define SHADOW_RXWR_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E0 + 3*i)))
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#define SHADOW_RXRD_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E1 + 3*i)))
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#define SHADOW_TXACK_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E2 + 3*i)))
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| 279 |
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#define SHADOW_TXWR_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1F0 + 3*i)))
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| 280 |
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#define SHADOW_TXRD_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1F1 + 3*i)))
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| 281 |
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| 282 |
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#define SOCK_BASE I2CHIP_C0_SSR
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| 283 |
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#define SOCK_SIZE (I2CHIP_C1_SSR - I2CHIP_C0_SSR)
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| 284 |
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| 285 |
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#define SOCK_STATUS(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i)))
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| 286 |
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#define OPT_PROTOCOL(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x01)))
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| 287 |
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#define DST_HA_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x02)))
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#define DST_IP_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x08)))
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#define DST_PORT_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x0C)))
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#define SRC_PORT_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x0E)))
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#define IP_PROTOCOL(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x10)))
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| 292 |
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#define TOS(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,SOCK_BASE + SOCK_SIZE * i + 0x11)))
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| 293 |
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#define MSS(i) ((u_int far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x12)))
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| 294 |
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#define P_WINDOW(i) ((u_int far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,SOCK_BASE + SOCK_SIZE * i + 0x14)))
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| 295 |
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#define WINDOW(i) ((u_int far*)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x16)))
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| 296 |
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| 297 |
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#define GATEWAY_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_GAR)))
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| 298 |
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#define SUBNET_MASK_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SMR)))
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| 299 |
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| 300 |
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#define SRC_HA_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SHAR)))
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| 301 |
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#define SRC_IP_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SIPR)))
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| 302 |
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#define TIMEOUT_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_IRTR)))
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| 303 |
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| 304 |
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#define RX_DMEM_SIZE ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_RMSR)))
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| 305 |
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#define TX_DMEM_SIZE ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_TMSR)))
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| 306 |
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| 307 |
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void i2chip_init(void);
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| 308 |
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| 309 |
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#endif // _irchip_hw_h
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