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/*
********************************************************************************
* TERN, Inc.
* (c) Copyright 2005, http://www.tern.com
*
* - Created to support i2chip module on a variety of TERN hardware platforms.
********************************************************************************
*/
 
#ifndef _I2CHIP_HW_H_
#define _I2CHIP_HW_H_
 
#include "types.h"
 
#ifdef TERN_SC    // SensorCore controller, has mapping identical to the RL
#define TERN_RL
#endif
 
#ifdef TERN_RL    // R-Engine-L controller, with mapping at MCS0.
#define I2CHIP_MCS_DIRECT
#define I2CHIP_INT4
#define TERN_RE
#endif                // TERN_RL
 
#ifdef TERN_5E
#define TERN_586
#endif
 
#ifdef TERN_RD
#define TERN_RE
#endif                // TERN_RD
 
#ifdef TERN_RE
#define TERN_186
#endif
 
#ifdef TERN_P51
void p51_window(unsigned int page);
#define I2CHIP_WINDOW
#define I2CHIP_P51
#ifdef  TERN_186
#define I2CHIP_INT4
#define TERN_16_BIT
#endif                // TERN_186
#ifdef  TERN_586
#define I2CHIP_INT0
#define I2CHIP_WINDOW_IO
#endif                // TERN_586
#endif                // TERN_P51
 
#ifdef TERN_CEYE
#define TERN_EE       // C-Eye configured with onboard i2chip, same as EE
#endif
 
#ifdef TERN_EE
#define TERN_186
#define I2CHIP_MCS_DIRECT
#define I2CHIP_INT4
#define TERN_16_BIT
#endif                    // TERN_EE
 
#ifdef TERN_MMC
#define I2CHIP_WINDOW
#define I2CHIP_MMC
#ifdef TERN_RD
#define I2CHIP_INT3
#else
#ifdef TERN_186
#define I2CHIP_INT4
#endif                   // TERN_186
#endif                   // TERN_RD
#ifdef TERN_586
#define I2CHIP_INT0
#define I2CHIP_WINDOW_IO
#endif                   // TERN_586
#endif                   // TERN_MMC
 
#ifdef TERN_586
#include "586.h"
void interrupt far int0_isr(void);
void interrupt far spu_m_isr(void);
void interrupt far spu_1_isr(void);
void interrupt far spu_2_isr(void);
#define MMCR 0xdf00
#endif                   // TERN_586
 
#ifdef TERN_186
#ifndef TERN_RE
#include "ae.h"
#else
#include "re.h"
#define I2CHIP_SHIFTED_ADDRESS
#endif
#endif
 
 
#ifndef I2CHIP_MCS_DIRECT
#ifndef I2CHIP_WINDOW
#ifndef I2CHIP_WINDOW_IO
#error You must define the TERN address mapping used to drive the I2CHIP module!
#endif  // I2CHIP_WINDOW_IO
#endif  // I2CHIP_MMC_WINDOW
#endif  // I2CHIP_MCS_DIRECT
 
#ifndef I2CHIP_INT0
#ifndef I2CHIP_INT3
#ifndef I2CHIP_INT4
#ifndef I2CHIP_POLL
#error You must specify an interrupt/polling mechanism for the I2CHIP module!
#endif  // I2CHIP_POLL
#endif  // I2CHIP_INT3
#endif  // I2CHIP_INT4
#endif  // I2CHIP_INT0
 
#ifdef   I2CHIP_POLL
#define  I2CHIP_POLL_ISR(a)   { delay_ms(20); disable(); a(); enable(); }
#define  INT_INIT(isr)
#define  INT_EOI
#endif   // I2CHIP_POLL
 
#ifdef   I2CHIP_INT4
#define  INT_INIT(isr) int4_init(1, isr)
#define  INT_EOI       outport(0xff22,0x0010)
#define  I2CHIP_POLL_ISR(a)
#endif
 
#ifdef   I2CHIP_INT3
#define  INT_INIT(isr) int3_init(1, isr)
#define  INT_EOI       outport(0xff22,0x000f)
#define  I2CHIP_POLL_ISR(a)
#endif
 
#ifdef   I2CHIP_INT0
#define  INT_INIT(isr) int0_init(1, isr)
#define  INT_EOI        outportb(_MPICOCW2_IO,0x61); // 586 only EOI
#define  I2CHIP_POLL_ISR(a)
#endif
 
 
#ifdef   I2CHIP_SHIFTED_ADDRESS
#define  SA_OFFSET(a)   ((a) << 1)
#else
#define  SA_OFFSET(a)   a
#endif   // I2CHIP_SHIFTED_ADDRESS ... *if*
 
 
// -------------------- WINDOW-RELATED DEFINES ----------------------
#ifdef   I2CHIP_WINDOW
void        i2chip_set_page(u_int addr);
#define  I2CHIP_SET_PAGE(p) i2chip_set_page(p)
 
u_char far* i2chip_mkptr(u_int addr);
void                    i2chip_push_window(u_int addr);
void                    i2chip_pop_window(void);
u_int       i2chip_get_window(void);
void i2chip_set_window(u_int window_addr);
 
// Set to command window.
// Note that if you're using other MMC chips within your application, you will
// need to call this function regularly, if you've changed the MMC chip/page
// selection via mmc_window().  The driver code otherwise assume that you never
// change away from chip 7, page 0.
#define  WINDOW_RESTORE_BASE    i2chip_mkptr(0)
 
//  ----------------------- I2CHIP_WINDOW_IO ----------------------------
#ifdef   I2CHIP_WINDOW_IO
 
#ifdef   TERN_5E
#define I2CHIP_BASE_SEG    0x2000                       // Address offset for W3100A
#else
#define I2CHIP_BASE_SEG    0x1800                       // Address offset for W3100A
#endif
 
#define  COMMAND_BASE_SEG     0x0000
#define SEND_DATA_BUF              0x4000                       // Internal Tx buffer address of W3100A
#define RECV_DATA_BUF              0x6000                       // Internal Rx buffer address of W3100A
#define  WINDOW_BASE_SEGM     COMMAND_BASE_SEG
 
#define  MK_FP_WINDOW(a, b)   i2chip_mkptr(a+SA_OFFSET(b))
#define  MK_FP_SA             MK_FP_WINDOW
 
u_char   io_read_value(u_char far* addr);
void     io_write_value(u_char far* addr, u_char value);
#define  READ_VALUE(a)        io_read_value(a)
#define  WRITE_VALUE(a, v)    io_write_value(a, v)
 
#define  WINDOW_PTR_INC(a)    \
         if ((FP_OFF(a) & 0xff) == 0xff) \
            a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \
         else \
                a++;
 
#endif  // I2CHIP_WINDOW_IO
 
//  -------------------- !NOT! I2CHIP_WINDOW_IO ----------------------------
#ifndef  I2CHIP_WINDOW_IO
 
#define  READ_VALUE(a)        *(a)
#define  WRITE_VALUE(a, v)    *(a) = v
 
#define  WINDOW_BASE_SEGM  0x8000
#define  MK_FP_WINDOW(a, b)   i2chip_mkptr(a+SA_OFFSET(b))
#define  MK_FP_SA  MK_FP_WINDOW
 
#ifdef   I2CHIP_SHIFTED_ADDRESS
#define  COMMAND_BASE_SEG  0x0000
#define  SEND_DATA_BUF     0x8000
#define  RECV_DATA_BUF     0xC000
#define  WINDOW_PTR_INC(a)    \
         if ((FP_OFF(a) & 0xff) == 0xfe) \
            a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \
         else \
                a+=2;
#else
#define  COMMAND_BASE_SEG  0x0000
#define  SEND_DATA_BUF     0x4000
#define  RECV_DATA_BUF     0x6000
#define  WINDOW_PTR_INC(a)    \
         if ((FP_OFF(a) & 0xff) == 0xff) \
            a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \
         else \
                a++;
#endif   // I2CHIP_SHIFTED_ADDRESS
#endif   // NOT I2CHIP_WINDOW_IO
 
#endif   // I2CHIP_WINDOW
 
//  --------------------  I2CHIP_DIRECT ----------------------------
#ifdef   I2CHIP_MCS_DIRECT
 
#define  READ_VALUE(a)        *(a)
#define  WRITE_VALUE(a, v)    *(a) = v
 
#define  I2CHIP_BASE_SEG  0x8000
#define  MK_FP_SA(a, b)   MK_FP(a, SA_OFFSET(b))
#define  WINDOW_PTR_INC(a)   a+=SA_OFFSET(1);
#define  WINDOW_RESTORE_BASE
#define  MK_FP_WINDOW           MK_FP_SA
#define  WINDOW_BASE_SEG        I2CHIP_BASE_SEG
#define  COMMAND_BASE_SEG       I2CHIP_BASE_SEG
 
#ifdef   I2CHIP_SHIFTED_ADDRESS
#define SEND_DATA_BUF           0x8800                  // Internal Tx buffer address of W3100A
#define RECV_DATA_BUF           0x8C00                  // Internal Rx buffer address of W3100A
#else
#define SEND_DATA_BUF           0x8400                  // Internal Tx buffer address of W3100A
#define RECV_DATA_BUF           0x8600                  // Internal Rx buffer address of W3100A
#endif   // I2CHIP_SHIFTED_ADDRESS
 
#endif   // I2CHIP_MCS_DIRECT
 
/* Internal register set of W3100A */
#define COMMAND(i)              ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, i)))
#define INT_STATUS(i)   ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_C0_ISR + i)))
#define INT_REG                 ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_IR)))
#define INTMASK         ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_IMR)))
#define RESETSOCK      ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x0A)))
 
#define RX_PTR_BASE             I2CHIP_C0_RW_PR
#define RX_PTR_SIZE             (I2CHIP_C1_RW_PR - I2CHIP_C0_RW_PR)
 
#define RX_WR_PTR(i)    ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE * i)))
#define RX_RD_PTR(i)    ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE * i + 0x04)))
#define RX_ACK_PTR(i)   ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE * i + 0x08)))
 
#define TX_PTR_BASE             I2CHIP_C0_TW_PR
#define TX_PTR_SIZE             (I2CHIP_C1_TW_PR - I2CHIP_C0_TW_PR)
 
#define TX_WR_PTR(i)    ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE * i)))
#define TX_RD_PTR(i)    ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE * i + 0x04)))
#define TX_ACK_PTR(i)   ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE * i + 0x08)))
 
/* Shadow Register Pointer Define */
/* For windowing purposes, these are definitely outside the first 256-byte Window...
therefore, use the MK_FP_WINDOW macros instead. */
#define SHADOW_RXWR_PTR(i)              ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E0 + 3*i)))
#define SHADOW_RXRD_PTR(i)              ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E1 + 3*i)))
#define SHADOW_TXACK_PTR(i)     ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E2 + 3*i)))
#define SHADOW_TXWR_PTR(i)              ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1F0 + 3*i)))
#define SHADOW_TXRD_PTR(i)              ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1F1 + 3*i)))
 
#define SOCK_BASE               I2CHIP_C0_SSR
#define SOCK_SIZE               (I2CHIP_C1_SSR - I2CHIP_C0_SSR)
 
#define SOCK_STATUS(i)  ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i)))
#define OPT_PROTOCOL(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x01)))
#define DST_HA_PTR(i)   ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x02)))
#define DST_IP_PTR(i)   ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x08)))
#define DST_PORT_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x0C)))
#define SRC_PORT_PTR(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x0E)))
#define IP_PROTOCOL(i)  ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x10)))
#define TOS(i)                          ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,SOCK_BASE + SOCK_SIZE * i + 0x11)))
#define MSS(i)                          ((u_int far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x12)))
#define P_WINDOW(i)             ((u_int far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,SOCK_BASE + SOCK_SIZE * i + 0x14)))
#define WINDOW(i)                       ((u_int far*)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE * i + 0x16)))
 
#define GATEWAY_PTR             ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_GAR)))
#define SUBNET_MASK_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SMR)))
 
#define SRC_HA_PTR              ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SHAR)))
#define SRC_IP_PTR              ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SIPR)))
#define TIMEOUT_PTR             ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_IRTR)))
 
#define RX_DMEM_SIZE            ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_RMSR)))
#define TX_DMEM_SIZE            ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_TMSR)))
 
void i2chip_init(void);
 
#endif  // _irchip_hw_h

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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [WizNET_DEMO_TERN_186/] [include/] [i2chip_hw.h] - Blame information for rev 773

Line No.	Rev	Author	Line
1	585	jeremybenn	`/*`
2			`********************************************************************************`
3			`* TERN, Inc.`
4			`* (c) Copyright 2005, http://www.tern.com`
5			`*`
6			`* - Created to support i2chip module on a variety of TERN hardware platforms.`
7			`********************************************************************************`
8			`*/`
9
10			`#ifndef _I2CHIP_HW_H_`
11			`#define _I2CHIP_HW_H_`
12
13			`#include "types.h"`
14
15			`#ifdef TERN_SC // SensorCore controller, has mapping identical to the RL`
16			`#define TERN_RL`
17			`#endif`
18
19			`#ifdef TERN_RL // R-Engine-L controller, with mapping at MCS0.`
20			`#define I2CHIP_MCS_DIRECT`
21			`#define I2CHIP_INT4`
22			`#define TERN_RE`
23			`#endif // TERN_RL`
24
25			`#ifdef TERN_5E`
26			`#define TERN_586`
27			`#endif`
28
29			`#ifdef TERN_RD`
30			`#define TERN_RE`
31			`#endif // TERN_RD`
32
33			`#ifdef TERN_RE`
34			`#define TERN_186`
35			`#endif`
36
37			`#ifdef TERN_P51`
38			`void p51_window(unsigned int page);`
39			`#define I2CHIP_WINDOW`
40			`#define I2CHIP_P51`
41			`#ifdef TERN_186`
42			`#define I2CHIP_INT4`
43			`#define TERN_16_BIT`
44			`#endif // TERN_186`
45			`#ifdef TERN_586`
46			`#define I2CHIP_INT0`
47			`#define I2CHIP_WINDOW_IO`
48			`#endif // TERN_586`
49			`#endif // TERN_P51`
50
51			`#ifdef TERN_CEYE`
52			`#define TERN_EE // C-Eye configured with onboard i2chip, same as EE`
53			`#endif`
54
55			`#ifdef TERN_EE`
56			`#define TERN_186`
57			`#define I2CHIP_MCS_DIRECT`
58			`#define I2CHIP_INT4`
59			`#define TERN_16_BIT`
60			`#endif // TERN_EE`
61
62			`#ifdef TERN_MMC`
63			`#define I2CHIP_WINDOW`
64			`#define I2CHIP_MMC`
65			`#ifdef TERN_RD`
66			`#define I2CHIP_INT3`
67			`#else`
68			`#ifdef TERN_186`
69			`#define I2CHIP_INT4`
70			`#endif // TERN_186`
71			`#endif // TERN_RD`
72			`#ifdef TERN_586`
73			`#define I2CHIP_INT0`
74			`#define I2CHIP_WINDOW_IO`
75			`#endif // TERN_586`
76			`#endif // TERN_MMC`
77
78			`#ifdef TERN_586`
79			`#include "586.h"`
80			`void interrupt far int0_isr(void);`
81			`void interrupt far spu_m_isr(void);`
82			`void interrupt far spu_1_isr(void);`
83			`void interrupt far spu_2_isr(void);`
84			`#define MMCR 0xdf00`
85			`#endif // TERN_586`
86
87			`#ifdef TERN_186`
88			`#ifndef TERN_RE`
89			`#include "ae.h"`
90			`#else`
91			`#include "re.h"`
92			`#define I2CHIP_SHIFTED_ADDRESS`
93			`#endif`
94			`#endif`
95
96
97			`#ifndef I2CHIP_MCS_DIRECT`
98			`#ifndef I2CHIP_WINDOW`
99			`#ifndef I2CHIP_WINDOW_IO`
100			`#error You must define the TERN address mapping used to drive the I2CHIP module!`
101			`#endif // I2CHIP_WINDOW_IO`
102			`#endif // I2CHIP_MMC_WINDOW`
103			`#endif // I2CHIP_MCS_DIRECT`
104
105			`#ifndef I2CHIP_INT0`
106			`#ifndef I2CHIP_INT3`
107			`#ifndef I2CHIP_INT4`
108			`#ifndef I2CHIP_POLL`
109			`#error You must specify an interrupt/polling mechanism for the I2CHIP module!`
110			`#endif // I2CHIP_POLL`
111			`#endif // I2CHIP_INT3`
112			`#endif // I2CHIP_INT4`
113			`#endif // I2CHIP_INT0`
114
115			`#ifdef I2CHIP_POLL`
116			`#define I2CHIP_POLL_ISR(a) { delay_ms(20); disable(); a(); enable(); }`
117			`#define INT_INIT(isr)`
118			`#define INT_EOI`
119			`#endif // I2CHIP_POLL`
120
121			`#ifdef I2CHIP_INT4`
122			`#define INT_INIT(isr) int4_init(1, isr)`
123			`#define INT_EOI outport(0xff22,0x0010)`
124			`#define I2CHIP_POLL_ISR(a)`
125			`#endif`
126
127			`#ifdef I2CHIP_INT3`
128			`#define INT_INIT(isr) int3_init(1, isr)`
129			`#define INT_EOI outport(0xff22,0x000f)`
130			`#define I2CHIP_POLL_ISR(a)`
131			`#endif`
132
133			`#ifdef I2CHIP_INT0`
134			`#define INT_INIT(isr) int0_init(1, isr)`
135			`#define INT_EOI outportb(_MPICOCW2_IO,0x61); // 586 only EOI`
136			`#define I2CHIP_POLL_ISR(a)`
137			`#endif`
138
139
140			`#ifdef I2CHIP_SHIFTED_ADDRESS`
141			`#define SA_OFFSET(a) ((a) << 1)`
142			`#else`
143			`#define SA_OFFSET(a) a`
144			`#endif // I2CHIP_SHIFTED_ADDRESS ... if`
145
146
147			`// -------------------- WINDOW-RELATED DEFINES ----------------------`
148			`#ifdef I2CHIP_WINDOW`
149			`void i2chip_set_page(u_int addr);`
150			`#define I2CHIP_SET_PAGE(p) i2chip_set_page(p)`
151
152			`u_char far* i2chip_mkptr(u_int addr);`
153			`void i2chip_push_window(u_int addr);`
154			`void i2chip_pop_window(void);`
155			`u_int i2chip_get_window(void);`
156			`void i2chip_set_window(u_int window_addr);`
157
158			`// Set to command window.`
159			`// Note that if you're using other MMC chips within your application, you will`
160			`// need to call this function regularly, if you've changed the MMC chip/page`
161			`// selection via mmc_window(). The driver code otherwise assume that you never`
162			`// change away from chip 7, page 0.`
163			`#define WINDOW_RESTORE_BASE i2chip_mkptr(0)`
164
165			`// ----------------------- I2CHIP_WINDOW_IO ----------------------------`
166			`#ifdef I2CHIP_WINDOW_IO`
167
168			`#ifdef TERN_5E`
169			`#define I2CHIP_BASE_SEG 0x2000 // Address offset for W3100A`
170			`#else`
171			`#define I2CHIP_BASE_SEG 0x1800 // Address offset for W3100A`
172			`#endif`
173
174			`#define COMMAND_BASE_SEG 0x0000`
175			`#define SEND_DATA_BUF 0x4000 // Internal Tx buffer address of W3100A`
176			`#define RECV_DATA_BUF 0x6000 // Internal Rx buffer address of W3100A`
177			`#define WINDOW_BASE_SEGM COMMAND_BASE_SEG`
178
179			`#define MK_FP_WINDOW(a, b) i2chip_mkptr(a+SA_OFFSET(b))`
180			`#define MK_FP_SA MK_FP_WINDOW`
181
182			`u_char io_read_value(u_char far* addr);`
183			`void io_write_value(u_char far* addr, u_char value);`
184			`#define READ_VALUE(a) io_read_value(a)`
185			`#define WRITE_VALUE(a, v) io_write_value(a, v)`
186
187			`#define WINDOW_PTR_INC(a) \`
188			`if ((FP_OFF(a) & 0xff) == 0xff) \`
189			`a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \`
190			`else \`
191			`a++;`
192
193			`#endif // I2CHIP_WINDOW_IO`
194
195			`// -------------------- !NOT! I2CHIP_WINDOW_IO ----------------------------`
196			`#ifndef I2CHIP_WINDOW_IO`
197
198			`#define READ_VALUE(a) *(a)`
199			`#define WRITE_VALUE(a, v) *(a) = v`
200
201			`#define WINDOW_BASE_SEGM 0x8000`
202			`#define MK_FP_WINDOW(a, b) i2chip_mkptr(a+SA_OFFSET(b))`
203			`#define MK_FP_SA MK_FP_WINDOW`
204
205			`#ifdef I2CHIP_SHIFTED_ADDRESS`
206			`#define COMMAND_BASE_SEG 0x0000`
207			`#define SEND_DATA_BUF 0x8000`
208			`#define RECV_DATA_BUF 0xC000`
209			`#define WINDOW_PTR_INC(a) \`
210			`if ((FP_OFF(a) & 0xff) == 0xfe) \`
211			`a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \`
212			`else \`
213			`a+=2;`
214			`#else`
215			`#define COMMAND_BASE_SEG 0x0000`
216			`#define SEND_DATA_BUF 0x4000`
217			`#define RECV_DATA_BUF 0x6000`
218			`#define WINDOW_PTR_INC(a) \`
219			`if ((FP_OFF(a) & 0xff) == 0xff) \`
220			`a = MK_FP_WINDOW(i2chip_get_window() + 0x100, 0); \`
221			`else \`
222			`a++;`
223			`#endif // I2CHIP_SHIFTED_ADDRESS`
224			`#endif // NOT I2CHIP_WINDOW_IO`
225
226			`#endif // I2CHIP_WINDOW`
227
228			`// -------------------- I2CHIP_DIRECT ----------------------------`
229			`#ifdef I2CHIP_MCS_DIRECT`
230
231			`#define READ_VALUE(a) *(a)`
232			`#define WRITE_VALUE(a, v) *(a) = v`
233
234			`#define I2CHIP_BASE_SEG 0x8000`
235			`#define MK_FP_SA(a, b) MK_FP(a, SA_OFFSET(b))`
236			`#define WINDOW_PTR_INC(a) a+=SA_OFFSET(1);`
237			`#define WINDOW_RESTORE_BASE`
238			`#define MK_FP_WINDOW MK_FP_SA`
239			`#define WINDOW_BASE_SEG I2CHIP_BASE_SEG`
240			`#define COMMAND_BASE_SEG I2CHIP_BASE_SEG`
241
242			`#ifdef I2CHIP_SHIFTED_ADDRESS`
243			`#define SEND_DATA_BUF 0x8800 // Internal Tx buffer address of W3100A`
244			`#define RECV_DATA_BUF 0x8C00 // Internal Rx buffer address of W3100A`
245			`#else`
246			`#define SEND_DATA_BUF 0x8400 // Internal Tx buffer address of W3100A`
247			`#define RECV_DATA_BUF 0x8600 // Internal Rx buffer address of W3100A`
248			`#endif // I2CHIP_SHIFTED_ADDRESS`
249
250			`#endif // I2CHIP_MCS_DIRECT`
251
252			`/* Internal register set of W3100A */`
253			`#define COMMAND(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, i)))`
254			`#define INT_STATUS(i) ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_C0_ISR + i)))`
255			`#define INT_REG ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_IR)))`
256			`#define INTMASK ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, I2CHIP_IMR)))`
257			`#define RESETSOCK ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x0A)))`
258
259			`#define RX_PTR_BASE I2CHIP_C0_RW_PR`
260			`#define RX_PTR_SIZE (I2CHIP_C1_RW_PR - I2CHIP_C0_RW_PR)`
261
262			`#define RX_WR_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE i)))`
263			`#define RX_RD_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE i + 0x04)))`
264			`#define RX_ACK_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE i + 0x08)))`
265
266			`#define TX_PTR_BASE I2CHIP_C0_TW_PR`
267			`#define TX_PTR_SIZE (I2CHIP_C1_TW_PR - I2CHIP_C0_TW_PR)`
268
269			`#define TX_WR_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE i)))`
270			`#define TX_RD_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, TX_PTR_BASE + TX_PTR_SIZE i + 0x04)))`
271			`#define TX_ACK_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, RX_PTR_BASE + RX_PTR_SIZE i + 0x08)))`
272
273			`/* Shadow Register Pointer Define */`
274			`/* For windowing purposes, these are definitely outside the first 256-byte Window...`
275			`therefore, use the MK_FP_WINDOW macros instead. */`
276			`#define SHADOW_RXWR_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E0 + 3i)))`
277			`#define SHADOW_RXRD_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E1 + 3i)))`
278			`#define SHADOW_TXACK_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1E2 + 3i)))`
279			`#define SHADOW_TXWR_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1F0 + 3i)))`
280			`#define SHADOW_TXRD_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, 0x1F1 + 3i)))`
281
282			`#define SOCK_BASE I2CHIP_C0_SSR`
283			`#define SOCK_SIZE (I2CHIP_C1_SSR - I2CHIP_C0_SSR)`
284
285			`#define SOCK_STATUS(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i)))`
286			`#define OPT_PROTOCOL(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x01)))`
287			`#define DST_HA_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x02)))`
288			`#define DST_IP_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x08)))`
289			`#define DST_PORT_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x0C)))`
290			`#define SRC_PORT_PTR(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x0E)))`
291			`#define IP_PROTOCOL(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x10)))`
292			`#define TOS(i) ((u_char far )(MK_FP_WINDOW(COMMAND_BASE_SEG,SOCK_BASE + SOCK_SIZE i + 0x11)))`
293			`#define MSS(i) ((u_int far )(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x12)))`
294			`#define P_WINDOW(i) ((u_int far )(MK_FP_WINDOW(COMMAND_BASE_SEG,SOCK_BASE + SOCK_SIZE i + 0x14)))`
295			`#define WINDOW(i) ((u_int far)(MK_FP_WINDOW(COMMAND_BASE_SEG, SOCK_BASE + SOCK_SIZE i + 0x16)))`
296
297			`#define GATEWAY_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_GAR)))`
298			`#define SUBNET_MASK_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SMR)))`
299
300			`#define SRC_HA_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SHAR)))`
301			`#define SRC_IP_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_SIPR)))`
302			`#define TIMEOUT_PTR ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_IRTR)))`
303
304			`#define RX_DMEM_SIZE ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_RMSR)))`
305			`#define TX_DMEM_SIZE ((u_char far *)(MK_FP_WINDOW(COMMAND_BASE_SEG,I2CHIP_TMSR)))`
306
307			`void i2chip_init(void);`
308
309			`#endif // _irchip_hw_h`