| 1 |
591 |
jeremybenn |
/*
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| 2 |
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** Linker script for PIC33FJ256GP710
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| 3 |
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*/
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| 4 |
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| 5 |
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OUTPUT_ARCH("33FJ256GP710")
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EXTERN(__resetPRI)
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| 7 |
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EXTERN(__resetALT)
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| 8 |
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| 9 |
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/*
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| 11 |
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** Memory Regions
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| 12 |
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*/
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MEMORY
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| 14 |
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{
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| 15 |
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data (a!xr) : ORIGIN = 0x800, LENGTH = 0x7800
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| 16 |
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reset : ORIGIN = 0x0, LENGTH = 0x4
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| 17 |
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ivt : ORIGIN = 0x4, LENGTH = 0xFC
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| 18 |
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aivt : ORIGIN = 0x104, LENGTH = 0xFC
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| 19 |
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program (xr) : ORIGIN = 0x200, LENGTH = 0x2AA00
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| 20 |
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FBS : ORIGIN = 0xF80000, LENGTH = 0x2
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| 21 |
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FSS : ORIGIN = 0xF80002, LENGTH = 0x2
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| 22 |
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FGS : ORIGIN = 0xF80004, LENGTH = 0x2
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| 23 |
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FOSCSEL : ORIGIN = 0xF80006, LENGTH = 0x2
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| 24 |
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FOSC : ORIGIN = 0xF80008, LENGTH = 0x2
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| 25 |
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FWDT : ORIGIN = 0xF8000A, LENGTH = 0x2
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| 26 |
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FPOR : ORIGIN = 0xF8000C, LENGTH = 0x2
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| 27 |
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CONFIG3 : ORIGIN = 0xF8000E, LENGTH = 0x2
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| 28 |
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FUID0 : ORIGIN = 0xF80010, LENGTH = 0x2
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| 29 |
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FUID1 : ORIGIN = 0xF80012, LENGTH = 0x2
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| 30 |
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FUID2 : ORIGIN = 0xF80014, LENGTH = 0x2
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| 31 |
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FUID3 : ORIGIN = 0xF80016, LENGTH = 0x2
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| 32 |
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}
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| 33 |
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__IVT_BASE = 0x4;
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| 34 |
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__AIVT_BASE = 0x104;
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| 35 |
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__DATA_BASE = 0x800;
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| 36 |
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__YDATA_BASE = 0x4800;
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| 37 |
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__DMA_BASE = 0x7800;
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| 38 |
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__DMA_END = 0x7FFF;
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| 39 |
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__CODE_BASE = 0x200;
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| 40 |
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| 41 |
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| 42 |
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/*
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** ==================== Section Map ======================
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| 44 |
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*/
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SECTIONS
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| 46 |
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{
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| 47 |
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/*
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** ========== Program Memory ==========
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| 49 |
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*/
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| 50 |
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| 51 |
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| 52 |
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/*
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| 53 |
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** Reset Instruction
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| 54 |
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*/
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| 55 |
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.reset :
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| 56 |
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{
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| 57 |
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SHORT(ABSOLUTE(__reset));
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| 58 |
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SHORT(0x04);
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| 59 |
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SHORT((ABSOLUTE(__reset) >> 16) & 0x7F);
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| 60 |
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SHORT(0);
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| 61 |
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} >reset
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| 62 |
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| 63 |
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| 64 |
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/*
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| 65 |
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** Interrupt Vector Tables
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| 66 |
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**
|
| 67 |
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** The primary and alternate tables are loaded
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| 68 |
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** here, between sections .reset and .text.
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| 69 |
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** Vector table source code appears below.
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| 70 |
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*/
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| 71 |
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| 72 |
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| 73 |
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/*
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| 74 |
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** User Code and Library Code
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| 75 |
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*/
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| 76 |
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.text __CODE_BASE :
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| 77 |
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{
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| 78 |
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*(.handle);
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| 79 |
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*(.libc) *(.libm) *(.libdsp); /* keep together in this order */
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| 80 |
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*(.lib*);
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| 81 |
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*(.text);
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| 82 |
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} >program
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| 83 |
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| 84 |
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| 85 |
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/*
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| 86 |
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** Configuration Words
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| 87 |
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*/
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| 88 |
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__FBS :
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| 89 |
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{ *(__FBS.sec) } >FBS
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| 90 |
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__FSS :
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| 91 |
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{ *(__FSS.sec) } >FSS
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| 92 |
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__FGS :
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| 93 |
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{ *(__FGS.sec) } >FGS
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| 94 |
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__FOSCSEL :
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| 95 |
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{ *(__FOSCSEL.sec) } >FOSCSEL
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| 96 |
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__FOSC :
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| 97 |
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{ *(__FOSC.sec) } >FOSC
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| 98 |
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__FWDT :
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| 99 |
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{ *(__FWDT.sec) } >FWDT
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| 100 |
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__FPOR :
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| 101 |
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{ *(__FPOR.sec) } >FPOR
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| 102 |
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__FUID0 :
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| 103 |
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{ *(__FUID0.sec) } >FUID0
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| 104 |
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__FUID1 :
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| 105 |
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{ *(__FUID1.sec) } >FUID1
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| 106 |
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__FUID2 :
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| 107 |
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{ *(__FUID2.sec) } >FUID2
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| 108 |
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__FUID3 :
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| 109 |
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{ *(__FUID3.sec) } >FUID3
|
| 110 |
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|
| 111 |
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| 112 |
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/*
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| 113 |
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** =========== Data Memory ===========
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| 114 |
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*/
|
| 115 |
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|
| 116 |
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| 117 |
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/*
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| 118 |
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** ICD Debug Exec
|
| 119 |
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**
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| 120 |
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** This section provides optional storage for
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| 121 |
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** the ICD2 debugger. Define a global symbol
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| 122 |
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** named __ICD2RAM to enable ICD2. This section
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| 123 |
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** must be loaded at data address 0x800.
|
| 124 |
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*/
|
| 125 |
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.icd __DATA_BASE (NOLOAD):
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| 126 |
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{
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| 127 |
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. += (DEFINED (__ICD2RAM) ? 0x50 : 0 );
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| 128 |
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} > data
|
| 129 |
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|
| 130 |
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| 131 |
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/*
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| 132 |
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** Other sections in data memory are not explicitly mapped.
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| 133 |
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** Instead they are allocated according to their section
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| 134 |
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** attributes, which is most efficient.
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| 135 |
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**
|
| 136 |
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** If a specific arrangement of sections is required
|
| 137 |
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** (other than what can be achieved using attributes)
|
| 138 |
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** additional sections may be defined here. See chapter
|
| 139 |
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** 10.5 in the MPLAB ASM30/LINK30 User's Guide (DS51317)
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| 140 |
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** for more information.
|
| 141 |
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*/
|
| 142 |
|
|
|
| 143 |
|
|
|
| 144 |
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/*
|
| 145 |
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** ========== Debug Info ==============
|
| 146 |
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*/
|
| 147 |
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|
| 148 |
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.comment 0 : { *(.comment) }
|
| 149 |
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|
| 150 |
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/*
|
| 151 |
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** DWARF-2
|
| 152 |
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*/
|
| 153 |
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.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
|
| 154 |
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.debug_abbrev 0 : { *(.debug_abbrev) }
|
| 155 |
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.debug_line 0 : { *(.debug_line) }
|
| 156 |
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.debug_frame 0 : { *(.debug_frame) }
|
| 157 |
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.debug_str 0 : { *(.debug_str) }
|
| 158 |
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.debug_loc 0 : { *(.debug_loc) }
|
| 159 |
|
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.debug_macinfo 0 : { *(.debug_macinfo) }
|
| 160 |
|
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.debug_pubnames 0 : { *(.debug_pubnames) }
|
| 161 |
|
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.debug_ranges 0 : { *(.debug_ranges) }
|
| 162 |
|
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.debug_aranges 0 : { *(.debug_aranges) }
|
| 163 |
|
|
|
| 164 |
|
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} /* SECTIONS */
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| 165 |
|
|
|
| 166 |
|
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/*
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| 167 |
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** ================= End of Section Map ================
|
| 168 |
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*/
|
| 169 |
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|
| 170 |
|
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/*
|
| 171 |
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** Section Map for Interrupt Vector Tables
|
| 172 |
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*/
|
| 173 |
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SECTIONS
|
| 174 |
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{
|
| 175 |
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|
|
| 176 |
|
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/*
|
| 177 |
|
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** Interrupt Vector Table
|
| 178 |
|
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*/
|
| 179 |
|
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.ivt __IVT_BASE :
|
| 180 |
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{
|
| 181 |
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LONG( DEFINED(__ReservedTrap0) ? ABSOLUTE(__ReservedTrap0) :
|
| 182 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 183 |
|
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LONG( DEFINED(__OscillatorFail) ? ABSOLUTE(__OscillatorFail) :
|
| 184 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 185 |
|
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LONG( DEFINED(__AddressError) ? ABSOLUTE(__AddressError) :
|
| 186 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 187 |
|
|
LONG( DEFINED(__StackError) ? ABSOLUTE(__StackError) :
|
| 188 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 189 |
|
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LONG( DEFINED(__MathError) ? ABSOLUTE(__MathError) :
|
| 190 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 191 |
|
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LONG( DEFINED(__DMACError) ? ABSOLUTE(__DMACError) :
|
| 192 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 193 |
|
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LONG( DEFINED(__ReservedTrap6) ? ABSOLUTE(__ReservedTrap6) :
|
| 194 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 195 |
|
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LONG( DEFINED(__ReservedTrap7) ? ABSOLUTE(__ReservedTrap7) :
|
| 196 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 197 |
|
|
|
| 198 |
|
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LONG( DEFINED(__INT0Interrupt) ? ABSOLUTE(__INT0Interrupt) :
|
| 199 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 200 |
|
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LONG( DEFINED(__IC1Interrupt) ? ABSOLUTE(__IC1Interrupt) :
|
| 201 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 202 |
|
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LONG( DEFINED(__OC1Interrupt) ? ABSOLUTE(__OC1Interrupt) :
|
| 203 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 204 |
|
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LONG( DEFINED(__T1Interrupt) ? ABSOLUTE(__T1Interrupt) :
|
| 205 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 206 |
|
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LONG( DEFINED(__DMA0Interrupt) ? ABSOLUTE(__DMA0Interrupt) :
|
| 207 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 208 |
|
|
LONG( DEFINED(__IC2Interrupt) ? ABSOLUTE(__IC2Interrupt) :
|
| 209 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 210 |
|
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LONG( DEFINED(__OC2Interrupt) ? ABSOLUTE(__OC2Interrupt) :
|
| 211 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 212 |
|
|
LONG( DEFINED(__T2Interrupt) ? ABSOLUTE(__T2Interrupt) :
|
| 213 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 214 |
|
|
LONG( DEFINED(__T3Interrupt) ? ABSOLUTE(__T3Interrupt) :
|
| 215 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 216 |
|
|
LONG( DEFINED(__SPI1ErrInterrupt) ? ABSOLUTE(__SPI1ErrInterrupt) :
|
| 217 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 218 |
|
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LONG( DEFINED(__SPI1Interrupt) ? ABSOLUTE(__SPI1Interrupt) :
|
| 219 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 220 |
|
|
LONG( DEFINED(__U1RXInterrupt) ? ABSOLUTE(__U1RXInterrupt) :
|
| 221 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 222 |
|
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LONG( DEFINED(__U1TXInterrupt) ? ABSOLUTE(__U1TXInterrupt) :
|
| 223 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 224 |
|
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LONG( DEFINED(__ADC1Interrupt) ? ABSOLUTE(__ADC1Interrupt) :
|
| 225 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 226 |
|
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LONG( DEFINED(__DMA1Interrupt) ? ABSOLUTE(__DMA1Interrupt) :
|
| 227 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 228 |
|
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LONG( DEFINED(__Interrupt15) ? ABSOLUTE(__Interrupt15) :
|
| 229 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 230 |
|
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LONG( DEFINED(__SI2C1Interrupt) ? ABSOLUTE(__SI2C1Interrupt) :
|
| 231 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 232 |
|
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LONG( DEFINED(__MI2C1Interrupt) ? ABSOLUTE(__MI2C1Interrupt) :
|
| 233 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 234 |
|
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LONG( DEFINED(__Interrupt18) ? ABSOLUTE(__Interrupt18) :
|
| 235 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 236 |
|
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LONG( DEFINED(__CNInterrupt) ? ABSOLUTE(__CNInterrupt) :
|
| 237 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 238 |
|
|
LONG( DEFINED(__INT1Interrupt) ? ABSOLUTE(__INT1Interrupt) :
|
| 239 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 240 |
|
|
LONG( DEFINED(__ADC2Interrupt) ? ABSOLUTE(__ADC2Interrupt) :
|
| 241 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 242 |
|
|
LONG( DEFINED(__IC7Interrupt) ? ABSOLUTE(__IC7Interrupt) :
|
| 243 |
|
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ABSOLUTE(__DefaultInterrupt));
|
| 244 |
|
|
LONG( DEFINED(__IC8Interrupt) ? ABSOLUTE(__IC8Interrupt) :
|
| 245 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 246 |
|
|
LONG( DEFINED(__DMA2Interrupt) ? ABSOLUTE(__DMA2Interrupt) :
|
| 247 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 248 |
|
|
LONG( DEFINED(__OC3Interrupt) ? ABSOLUTE(__OC3Interrupt) :
|
| 249 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 250 |
|
|
LONG( DEFINED(__OC4Interrupt) ? ABSOLUTE(__OC4Interrupt) :
|
| 251 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 252 |
|
|
LONG( DEFINED(__T4Interrupt) ? ABSOLUTE(__T4Interrupt) :
|
| 253 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 254 |
|
|
LONG( DEFINED(__T5Interrupt) ? ABSOLUTE(__T5Interrupt) :
|
| 255 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 256 |
|
|
LONG( DEFINED(__INT2Interrupt) ? ABSOLUTE(__INT2Interrupt) :
|
| 257 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 258 |
|
|
LONG( DEFINED(__U2RXInterrupt) ? ABSOLUTE(__U2RXInterrupt) :
|
| 259 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 260 |
|
|
LONG( DEFINED(__U2TXInterrupt) ? ABSOLUTE(__U2TXInterrupt) :
|
| 261 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 262 |
|
|
LONG( DEFINED(__SPI2ErrInterrupt) ? ABSOLUTE(__SPI2ErrInterrupt) :
|
| 263 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 264 |
|
|
LONG( DEFINED(__SPI2Interrupt) ? ABSOLUTE(__SPI2Interrupt) :
|
| 265 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 266 |
|
|
LONG( DEFINED(__C1RxRdyInterrupt) ? ABSOLUTE(__C1RxRdyInterrupt) :
|
| 267 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 268 |
|
|
LONG( DEFINED(__C1Interrupt) ? ABSOLUTE(__C1Interrupt) :
|
| 269 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 270 |
|
|
LONG( DEFINED(__DMA3Interrupt) ? ABSOLUTE(__DMA3Interrupt) :
|
| 271 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 272 |
|
|
LONG( DEFINED(__IC3Interrupt) ? ABSOLUTE(__IC3Interrupt) :
|
| 273 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 274 |
|
|
LONG( DEFINED(__IC4Interrupt) ? ABSOLUTE(__IC4Interrupt) :
|
| 275 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 276 |
|
|
LONG( DEFINED(__IC5Interrupt) ? ABSOLUTE(__IC5Interrupt) :
|
| 277 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 278 |
|
|
LONG( DEFINED(__IC6Interrupt) ? ABSOLUTE(__IC6Interrupt) :
|
| 279 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 280 |
|
|
LONG( DEFINED(__OC5Interrupt) ? ABSOLUTE(__OC5Interrupt) :
|
| 281 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 282 |
|
|
LONG( DEFINED(__OC6Interrupt) ? ABSOLUTE(__OC6Interrupt) :
|
| 283 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 284 |
|
|
LONG( DEFINED(__OC7Interrupt) ? ABSOLUTE(__OC7Interrupt) :
|
| 285 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 286 |
|
|
LONG( DEFINED(__OC8Interrupt) ? ABSOLUTE(__OC8Interrupt) :
|
| 287 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 288 |
|
|
LONG( DEFINED(__Interrupt45) ? ABSOLUTE(__Interrupt45) :
|
| 289 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 290 |
|
|
LONG( DEFINED(__DMA4Interrupt) ? ABSOLUTE(__DMA4Interrupt) :
|
| 291 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 292 |
|
|
LONG( DEFINED(__T6Interrupt) ? ABSOLUTE(__T6Interrupt) :
|
| 293 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 294 |
|
|
LONG( DEFINED(__T7Interrupt) ? ABSOLUTE(__T7Interrupt) :
|
| 295 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 296 |
|
|
LONG( DEFINED(__SI2C2Interrupt) ? ABSOLUTE(__SI2C2Interrupt) :
|
| 297 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 298 |
|
|
LONG( DEFINED(__MI2C2Interrupt) ? ABSOLUTE(__MI2C2Interrupt) :
|
| 299 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 300 |
|
|
LONG( DEFINED(__T8Interrupt) ? ABSOLUTE(__T8Interrupt) :
|
| 301 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 302 |
|
|
LONG( DEFINED(__T9Interrupt) ? ABSOLUTE(__T9Interrupt) :
|
| 303 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 304 |
|
|
LONG( DEFINED(__INT3Interrupt) ? ABSOLUTE(__INT3Interrupt) :
|
| 305 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 306 |
|
|
LONG( DEFINED(__INT4Interrupt) ? ABSOLUTE(__INT4Interrupt) :
|
| 307 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 308 |
|
|
LONG( DEFINED(__C2RxRdyInterrupt) ? ABSOLUTE(__C2RxRdyInterrupt) :
|
| 309 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 310 |
|
|
LONG( DEFINED(__C2Interrupt) ? ABSOLUTE(__C2Interrupt) :
|
| 311 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 312 |
|
|
LONG( DEFINED(__Interrupt57) ? ABSOLUTE(__Interrupt57) :
|
| 313 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 314 |
|
|
LONG( DEFINED(__Interrupt58) ? ABSOLUTE(__Interrupt58) :
|
| 315 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 316 |
|
|
LONG( DEFINED(__DCIErrInterrupt) ? ABSOLUTE(__DCIErrInterrupt) :
|
| 317 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 318 |
|
|
LONG( DEFINED(__DCIInterrupt) ? ABSOLUTE(__DCIInterrupt) :
|
| 319 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 320 |
|
|
LONG( DEFINED(__DMA5Interrupt) ? ABSOLUTE(__DMA5Interrupt) :
|
| 321 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 322 |
|
|
LONG( DEFINED(__Interrupt62) ? ABSOLUTE(__Interrupt62) :
|
| 323 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 324 |
|
|
LONG( DEFINED(__Interrupt63) ? ABSOLUTE(__Interrupt63) :
|
| 325 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 326 |
|
|
LONG( DEFINED(__Interrupt64) ? ABSOLUTE(__Interrupt64) :
|
| 327 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 328 |
|
|
LONG( DEFINED(__U1ErrInterrupt) ? ABSOLUTE(__U1ErrInterrupt) :
|
| 329 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 330 |
|
|
LONG( DEFINED(__U2ErrInterrupt) ? ABSOLUTE(__U2ErrInterrupt) :
|
| 331 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 332 |
|
|
LONG( DEFINED(__Interrupt68) ? ABSOLUTE(__Interrupt68) :
|
| 333 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 334 |
|
|
LONG( DEFINED(__DMA6Interrupt) ? ABSOLUTE(__DMA6Interrupt) :
|
| 335 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 336 |
|
|
LONG( DEFINED(__DMA7Interrupt) ? ABSOLUTE(__DMA7Interrupt) :
|
| 337 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 338 |
|
|
LONG( DEFINED(__C1TxReqInterrupt) ? ABSOLUTE(__C1TxReqInterrupt) :
|
| 339 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 340 |
|
|
LONG( DEFINED(__C2TxReqInterrupt) ? ABSOLUTE(__C2TxReqInterrupt) :
|
| 341 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 342 |
|
|
LONG( DEFINED(__Interrupt72) ? ABSOLUTE(__Interrupt72) :
|
| 343 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 344 |
|
|
LONG( DEFINED(__Interrupt73) ? ABSOLUTE(__Interrupt73) :
|
| 345 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 346 |
|
|
LONG( DEFINED(__Interrupt74) ? ABSOLUTE(__Interrupt74) :
|
| 347 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 348 |
|
|
LONG( DEFINED(__Interrupt75) ? ABSOLUTE(__Interrupt75) :
|
| 349 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 350 |
|
|
LONG( DEFINED(__Interrupt76) ? ABSOLUTE(__Interrupt76) :
|
| 351 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 352 |
|
|
LONG( DEFINED(__Interrupt77) ? ABSOLUTE(__Interrupt77) :
|
| 353 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 354 |
|
|
LONG( DEFINED(__Interrupt78) ? ABSOLUTE(__Interrupt78) :
|
| 355 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 356 |
|
|
LONG( DEFINED(__Interrupt79) ? ABSOLUTE(__Interrupt79) :
|
| 357 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 358 |
|
|
LONG( DEFINED(__Interrupt80) ? ABSOLUTE(__Interrupt80) :
|
| 359 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 360 |
|
|
LONG( DEFINED(__Interrupt81) ? ABSOLUTE(__Interrupt81) :
|
| 361 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 362 |
|
|
LONG( DEFINED(__Interrupt82) ? ABSOLUTE(__Interrupt82) :
|
| 363 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 364 |
|
|
LONG( DEFINED(__Interrupt83) ? ABSOLUTE(__Interrupt83) :
|
| 365 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 366 |
|
|
LONG( DEFINED(__Interrupt84) ? ABSOLUTE(__Interrupt84) :
|
| 367 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 368 |
|
|
LONG( DEFINED(__Interrupt85) ? ABSOLUTE(__Interrupt85) :
|
| 369 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 370 |
|
|
LONG( DEFINED(__Interrupt86) ? ABSOLUTE(__Interrupt86) :
|
| 371 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 372 |
|
|
LONG( DEFINED(__Interrupt87) ? ABSOLUTE(__Interrupt87) :
|
| 373 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 374 |
|
|
LONG( DEFINED(__Interrupt88) ? ABSOLUTE(__Interrupt88) :
|
| 375 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 376 |
|
|
LONG( DEFINED(__Interrupt89) ? ABSOLUTE(__Interrupt89) :
|
| 377 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 378 |
|
|
LONG( DEFINED(__Interrupt90) ? ABSOLUTE(__Interrupt90) :
|
| 379 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 380 |
|
|
LONG( DEFINED(__Interrupt91) ? ABSOLUTE(__Interrupt91) :
|
| 381 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 382 |
|
|
LONG( DEFINED(__Interrupt92) ? ABSOLUTE(__Interrupt92) :
|
| 383 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 384 |
|
|
LONG( DEFINED(__Interrupt93) ? ABSOLUTE(__Interrupt93) :
|
| 385 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 386 |
|
|
LONG( DEFINED(__Interrupt94) ? ABSOLUTE(__Interrupt94) :
|
| 387 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 388 |
|
|
LONG( DEFINED(__Interrupt95) ? ABSOLUTE(__Interrupt95) :
|
| 389 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 390 |
|
|
LONG( DEFINED(__Interrupt96) ? ABSOLUTE(__Interrupt96) :
|
| 391 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 392 |
|
|
LONG( DEFINED(__Interrupt97) ? ABSOLUTE(__Interrupt97) :
|
| 393 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 394 |
|
|
LONG( DEFINED(__Interrupt98) ? ABSOLUTE(__Interrupt98) :
|
| 395 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 396 |
|
|
LONG( DEFINED(__Interrupt99) ? ABSOLUTE(__Interrupt99) :
|
| 397 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 398 |
|
|
LONG( DEFINED(__Interrupt100) ? ABSOLUTE(__Interrupt100) :
|
| 399 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 400 |
|
|
LONG( DEFINED(__Interrupt101) ? ABSOLUTE(__Interrupt101) :
|
| 401 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 402 |
|
|
LONG( DEFINED(__Interrupt102) ? ABSOLUTE(__Interrupt102) :
|
| 403 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 404 |
|
|
LONG( DEFINED(__Interrupt103) ? ABSOLUTE(__Interrupt103) :
|
| 405 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 406 |
|
|
LONG( DEFINED(__Interrupt104) ? ABSOLUTE(__Interrupt104) :
|
| 407 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 408 |
|
|
LONG( DEFINED(__Interrupt105) ? ABSOLUTE(__Interrupt105) :
|
| 409 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 410 |
|
|
LONG( DEFINED(__Interrupt106) ? ABSOLUTE(__Interrupt106) :
|
| 411 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 412 |
|
|
LONG( DEFINED(__Interrupt107) ? ABSOLUTE(__Interrupt107) :
|
| 413 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 414 |
|
|
LONG( DEFINED(__Interrupt108) ? ABSOLUTE(__Interrupt108) :
|
| 415 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 416 |
|
|
LONG( DEFINED(__Interrupt109) ? ABSOLUTE(__Interrupt109) :
|
| 417 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 418 |
|
|
LONG( DEFINED(__Interrupt110) ? ABSOLUTE(__Interrupt110) :
|
| 419 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 420 |
|
|
LONG( DEFINED(__Interrupt111) ? ABSOLUTE(__Interrupt111) :
|
| 421 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 422 |
|
|
LONG( DEFINED(__Interrupt112) ? ABSOLUTE(__Interrupt112) :
|
| 423 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 424 |
|
|
LONG( DEFINED(__Interrupt113) ? ABSOLUTE(__Interrupt113) :
|
| 425 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 426 |
|
|
LONG( DEFINED(__Interrupt114) ? ABSOLUTE(__Interrupt114) :
|
| 427 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 428 |
|
|
LONG( DEFINED(__Interrupt115) ? ABSOLUTE(__Interrupt115) :
|
| 429 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 430 |
|
|
LONG( DEFINED(__Interrupt116) ? ABSOLUTE(__Interrupt116) :
|
| 431 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 432 |
|
|
LONG( DEFINED(__Interrupt117) ? ABSOLUTE(__Interrupt117) :
|
| 433 |
|
|
ABSOLUTE(__DefaultInterrupt));
|
| 434 |
|
|
} >ivt
|
| 435 |
|
|
|
| 436 |
|
|
|
| 437 |
|
|
/*
|
| 438 |
|
|
** Alternate Interrupt Vector Table
|
| 439 |
|
|
*/
|
| 440 |
|
|
.aivt __AIVT_BASE :
|
| 441 |
|
|
{
|
| 442 |
|
|
LONG( DEFINED(__AltReservedTrap0) ? ABSOLUTE(__AltReservedTrap0) :
|
| 443 |
|
|
(DEFINED(__ReservedTrap0) ? ABSOLUTE(__ReservedTrap0) :
|
| 444 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 445 |
|
|
LONG( DEFINED(__AltOscillatorFail) ? ABSOLUTE(__AltOscillatorFail) :
|
| 446 |
|
|
(DEFINED(__OscillatorFail) ? ABSOLUTE(__OscillatorFail) :
|
| 447 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 448 |
|
|
LONG( DEFINED(__AltAddressError) ? ABSOLUTE(__AltAddressError) :
|
| 449 |
|
|
(DEFINED(__AddressError) ? ABSOLUTE(__AddressError) :
|
| 450 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 451 |
|
|
LONG( DEFINED(__AltStackError) ? ABSOLUTE(__AltStackError) :
|
| 452 |
|
|
(DEFINED(__StackError) ? ABSOLUTE(__StackError) :
|
| 453 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 454 |
|
|
LONG( DEFINED(__AltMathError) ? ABSOLUTE(__AltMathError) :
|
| 455 |
|
|
(DEFINED(__MathError) ? ABSOLUTE(__MathError) :
|
| 456 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 457 |
|
|
LONG( DEFINED(__AltDMACError) ? ABSOLUTE(__AltDMACError) :
|
| 458 |
|
|
(DEFINED(__DMACError) ? ABSOLUTE(__DMACError) :
|
| 459 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 460 |
|
|
LONG( DEFINED(__AltReservedTrap6) ? ABSOLUTE(__AltReservedTrap6) :
|
| 461 |
|
|
(DEFINED(__ReservedTrap6) ? ABSOLUTE(__ReservedTrap6) :
|
| 462 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 463 |
|
|
LONG( DEFINED(__AltReservedTrap7) ? ABSOLUTE(__AltReservedTrap7) :
|
| 464 |
|
|
(DEFINED(__ReservedTrap7) ? ABSOLUTE(__ReservedTrap7) :
|
| 465 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 466 |
|
|
|
| 467 |
|
|
LONG( DEFINED(__AltINT0Interrupt) ? ABSOLUTE(__AltINT0Interrupt) :
|
| 468 |
|
|
(DEFINED(__INT0Interrupt) ? ABSOLUTE(__INT0Interrupt) :
|
| 469 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 470 |
|
|
LONG( DEFINED(__AltIC1Interrupt) ? ABSOLUTE(__AltIC1Interrupt) :
|
| 471 |
|
|
(DEFINED(__IC1Interrupt) ? ABSOLUTE(__IC1Interrupt) :
|
| 472 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 473 |
|
|
LONG( DEFINED(__AltOC1Interrupt) ? ABSOLUTE(__AltOC1Interrupt) :
|
| 474 |
|
|
(DEFINED(__OC1Interrupt) ? ABSOLUTE(__OC1Interrupt) :
|
| 475 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 476 |
|
|
LONG( DEFINED(__AltT1Interrupt) ? ABSOLUTE(__AltT1Interrupt) :
|
| 477 |
|
|
(DEFINED(__T1Interrupt) ? ABSOLUTE(__T1Interrupt) :
|
| 478 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 479 |
|
|
LONG( DEFINED(__AltDMA0Interrupt) ? ABSOLUTE(__AltDMA0Interrupt) :
|
| 480 |
|
|
(DEFINED(__DMA0Interrupt) ? ABSOLUTE(__DMA0Interrupt) :
|
| 481 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 482 |
|
|
LONG( DEFINED(__AltIC2Interrupt) ? ABSOLUTE(__AltIC2Interrupt) :
|
| 483 |
|
|
(DEFINED(__IC2Interrupt) ? ABSOLUTE(__IC2Interrupt) :
|
| 484 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 485 |
|
|
LONG( DEFINED(__AltOC2Interrupt) ? ABSOLUTE(__AltOC2Interrupt) :
|
| 486 |
|
|
(DEFINED(__OC2Interrupt) ? ABSOLUTE(__OC2Interrupt) :
|
| 487 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 488 |
|
|
LONG( DEFINED(__AltT2Interrupt) ? ABSOLUTE(__AltT2Interrupt) :
|
| 489 |
|
|
(DEFINED(__T2Interrupt) ? ABSOLUTE(__T2Interrupt) :
|
| 490 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 491 |
|
|
LONG( DEFINED(__AltT3Interrupt) ? ABSOLUTE(__AltT3Interrupt) :
|
| 492 |
|
|
(DEFINED(__T3Interrupt) ? ABSOLUTE(__T3Interrupt) :
|
| 493 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 494 |
|
|
LONG( DEFINED(__AltSPI1ErrInterrupt) ? ABSOLUTE(__AltSPI1ErrInterrupt) :
|
| 495 |
|
|
(DEFINED(__SPI1ErrInterrupt) ? ABSOLUTE(__SPI1ErrInterrupt) :
|
| 496 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 497 |
|
|
LONG( DEFINED(__AltSPI1Interrupt) ? ABSOLUTE(__AltSPI1Interrupt) :
|
| 498 |
|
|
(DEFINED(__SPI1Interrupt) ? ABSOLUTE(__SPI1Interrupt) :
|
| 499 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 500 |
|
|
LONG( DEFINED(__AltU1RXInterrupt) ? ABSOLUTE(__AltU1RXInterrupt) :
|
| 501 |
|
|
(DEFINED(__U1RXInterrupt) ? ABSOLUTE(__U1RXInterrupt) :
|
| 502 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 503 |
|
|
LONG( DEFINED(__AltU1TXInterrupt) ? ABSOLUTE(__AltU1TXInterrupt) :
|
| 504 |
|
|
(DEFINED(__U1TXInterrupt) ? ABSOLUTE(__U1TXInterrupt) :
|
| 505 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 506 |
|
|
LONG( DEFINED(__AltADC1Interrupt) ? ABSOLUTE(__AltADC1Interrupt) :
|
| 507 |
|
|
(DEFINED(__ADC1Interrupt) ? ABSOLUTE(__ADC1Interrupt) :
|
| 508 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 509 |
|
|
LONG( DEFINED(__AltDMA1Interrupt) ? ABSOLUTE(__AltDMA1Interrupt) :
|
| 510 |
|
|
(DEFINED(__DMA1Interrupt) ? ABSOLUTE(__DMA1Interrupt) :
|
| 511 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 512 |
|
|
LONG( DEFINED(__AltInterrupt15) ? ABSOLUTE(__AltInterrupt15) :
|
| 513 |
|
|
(DEFINED(__Interrupt15) ? ABSOLUTE(__Interrupt15) :
|
| 514 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 515 |
|
|
LONG( DEFINED(__AltSI2C1Interrupt) ? ABSOLUTE(__AltSI2C1Interrupt) :
|
| 516 |
|
|
(DEFINED(__SI2C1Interrupt) ? ABSOLUTE(__SI2C1Interrupt) :
|
| 517 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 518 |
|
|
LONG( DEFINED(__AltMI2C1Interrupt) ? ABSOLUTE(__AltMI2C1Interrupt) :
|
| 519 |
|
|
(DEFINED(__MI2C1Interrupt) ? ABSOLUTE(__MI2C1Interrupt) :
|
| 520 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 521 |
|
|
LONG( DEFINED(__AltInterrupt18) ? ABSOLUTE(__AltInterrupt18) :
|
| 522 |
|
|
(DEFINED(__Interrupt18) ? ABSOLUTE(__Interrupt18) :
|
| 523 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 524 |
|
|
LONG( DEFINED(__AltCNInterrupt) ? ABSOLUTE(__AltCNInterrupt) :
|
| 525 |
|
|
(DEFINED(__CNInterrupt) ? ABSOLUTE(__CNInterrupt) :
|
| 526 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 527 |
|
|
LONG( DEFINED(__AltINT1Interrupt) ? ABSOLUTE(__AltINT1Interrupt) :
|
| 528 |
|
|
(DEFINED(__INT1Interrupt) ? ABSOLUTE(__INT1Interrupt) :
|
| 529 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 530 |
|
|
LONG( DEFINED(__AltADC2Interrupt) ? ABSOLUTE(__AltADC2Interrupt) :
|
| 531 |
|
|
(DEFINED(__ADC2Interrupt) ? ABSOLUTE(__ADC2Interrupt) :
|
| 532 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 533 |
|
|
LONG( DEFINED(__AltIC7Interrupt) ? ABSOLUTE(__AltIC7Interrupt) :
|
| 534 |
|
|
(DEFINED(__IC7Interrupt) ? ABSOLUTE(__IC7Interrupt) :
|
| 535 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 536 |
|
|
LONG( DEFINED(__AltIC8Interrupt) ? ABSOLUTE(__AltIC8Interrupt) :
|
| 537 |
|
|
(DEFINED(__IC8Interrupt) ? ABSOLUTE(__IC8Interrupt) :
|
| 538 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 539 |
|
|
LONG( DEFINED(__AltDMA2Interrupt) ? ABSOLUTE(__AltDMA2Interrupt) :
|
| 540 |
|
|
(DEFINED(__DMA2Interrupt) ? ABSOLUTE(__DMA2Interrupt) :
|
| 541 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 542 |
|
|
LONG( DEFINED(__AltOC3Interrupt) ? ABSOLUTE(__AltOC3Interrupt) :
|
| 543 |
|
|
(DEFINED(__OC3Interrupt) ? ABSOLUTE(__OC3Interrupt) :
|
| 544 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 545 |
|
|
LONG( DEFINED(__AltOC4Interrupt) ? ABSOLUTE(__AltOC4Interrupt) :
|
| 546 |
|
|
(DEFINED(__OC4Interrupt) ? ABSOLUTE(__OC4Interrupt) :
|
| 547 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 548 |
|
|
LONG( DEFINED(__AltT4Interrupt) ? ABSOLUTE(__AltT4Interrupt) :
|
| 549 |
|
|
(DEFINED(__T4Interrupt) ? ABSOLUTE(__T4Interrupt) :
|
| 550 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 551 |
|
|
LONG( DEFINED(__AltT5Interrupt) ? ABSOLUTE(__AltT5Interrupt) :
|
| 552 |
|
|
(DEFINED(__T5Interrupt) ? ABSOLUTE(__T5Interrupt) :
|
| 553 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 554 |
|
|
LONG( DEFINED(__AltINT2Interrupt) ? ABSOLUTE(__AltINT2Interrupt) :
|
| 555 |
|
|
(DEFINED(__INT2Interrupt) ? ABSOLUTE(__INT2Interrupt) :
|
| 556 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 557 |
|
|
LONG( DEFINED(__AltU2RXInterrupt) ? ABSOLUTE(__AltU2RXInterrupt) :
|
| 558 |
|
|
(DEFINED(__U2RXInterrupt) ? ABSOLUTE(__U2RXInterrupt) :
|
| 559 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 560 |
|
|
LONG( DEFINED(__AltU2TXInterrupt) ? ABSOLUTE(__AltU2TXInterrupt) :
|
| 561 |
|
|
(DEFINED(__U2TXInterrupt) ? ABSOLUTE(__U2TXInterrupt) :
|
| 562 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 563 |
|
|
LONG( DEFINED(__AltSPI2ErrInterrupt) ? ABSOLUTE(__AltSPI2ErrInterrupt) :
|
| 564 |
|
|
(DEFINED(__SPI2ErrInterrupt) ? ABSOLUTE(__SPI2ErrInterrupt) :
|
| 565 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 566 |
|
|
LONG( DEFINED(__AltSPI2Interrupt) ? ABSOLUTE(__AltSPI2Interrupt) :
|
| 567 |
|
|
(DEFINED(__SPI2Interrupt) ? ABSOLUTE(__SPI2Interrupt) :
|
| 568 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 569 |
|
|
LONG( DEFINED(__AltC1RxRdyInterrupt) ? ABSOLUTE(__AltC1RxRdyInterrupt) :
|
| 570 |
|
|
(DEFINED(__C1RxRdyInterrupt) ? ABSOLUTE(__C1RxRdyInterrupt) :
|
| 571 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 572 |
|
|
LONG( DEFINED(__AltC1Interrupt) ? ABSOLUTE(__AltC1Interrupt) :
|
| 573 |
|
|
(DEFINED(__C1Interrupt) ? ABSOLUTE(__C1Interrupt) :
|
| 574 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 575 |
|
|
LONG( DEFINED(__AltDMA3Interrupt) ? ABSOLUTE(__AltDMA3Interrupt) :
|
| 576 |
|
|
(DEFINED(__DMA3Interrupt) ? ABSOLUTE(__DMA3Interrupt) :
|
| 577 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 578 |
|
|
LONG( DEFINED(__AltIC3Interrupt) ? ABSOLUTE(__AltIC3Interrupt) :
|
| 579 |
|
|
(DEFINED(__IC3Interrupt) ? ABSOLUTE(__IC3Interrupt) :
|
| 580 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 581 |
|
|
LONG( DEFINED(__AltIC4Interrupt) ? ABSOLUTE(__AltIC4Interrupt) :
|
| 582 |
|
|
(DEFINED(__IC4Interrupt) ? ABSOLUTE(__IC4Interrupt) :
|
| 583 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 584 |
|
|
LONG( DEFINED(__AltIC5Interrupt) ? ABSOLUTE(__AltIC5Interrupt) :
|
| 585 |
|
|
(DEFINED(__IC5Interrupt) ? ABSOLUTE(__IC5Interrupt) :
|
| 586 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 587 |
|
|
LONG( DEFINED(__AltIC6Interrupt) ? ABSOLUTE(__AltIC6Interrupt) :
|
| 588 |
|
|
(DEFINED(__IC6Interrupt) ? ABSOLUTE(__IC6Interrupt) :
|
| 589 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 590 |
|
|
LONG( DEFINED(__AltOC5Interrupt) ? ABSOLUTE(__AltOC5Interrupt) :
|
| 591 |
|
|
(DEFINED(__OC5Interrupt) ? ABSOLUTE(__OC5Interrupt) :
|
| 592 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 593 |
|
|
LONG( DEFINED(__AltOC6Interrupt) ? ABSOLUTE(__AltOC6Interrupt) :
|
| 594 |
|
|
(DEFINED(__OC6Interrupt) ? ABSOLUTE(__OC6Interrupt) :
|
| 595 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 596 |
|
|
LONG( DEFINED(__AltOC7Interrupt) ? ABSOLUTE(__AltOC7Interrupt) :
|
| 597 |
|
|
(DEFINED(__OC7Interrupt) ? ABSOLUTE(__OC7Interrupt) :
|
| 598 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 599 |
|
|
LONG( DEFINED(__AltOC8Interrupt) ? ABSOLUTE(__AltOC8Interrupt) :
|
| 600 |
|
|
(DEFINED(__OC8Interrupt) ? ABSOLUTE(__OC8Interrupt) :
|
| 601 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 602 |
|
|
LONG( DEFINED(__AltInterrupt45) ? ABSOLUTE(__AltInterrupt45) :
|
| 603 |
|
|
(DEFINED(__Interrupt45) ? ABSOLUTE(__Interrupt45) :
|
| 604 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 605 |
|
|
LONG( DEFINED(__AltDMA4Interrupt) ? ABSOLUTE(__AltDMA4Interrupt) :
|
| 606 |
|
|
(DEFINED(__DMA4Interrupt) ? ABSOLUTE(__DMA4Interrupt) :
|
| 607 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 608 |
|
|
LONG( DEFINED(__AltT6Interrupt) ? ABSOLUTE(__AltT6Interrupt) :
|
| 609 |
|
|
(DEFINED(__T6Interrupt) ? ABSOLUTE(__T6Interrupt) :
|
| 610 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 611 |
|
|
LONG( DEFINED(__AltT7Interrupt) ? ABSOLUTE(__AltT7Interrupt) :
|
| 612 |
|
|
(DEFINED(__T7Interrupt) ? ABSOLUTE(__T7Interrupt) :
|
| 613 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 614 |
|
|
LONG( DEFINED(__AltSI2C2Interrupt) ? ABSOLUTE(__AltSI2C2Interrupt) :
|
| 615 |
|
|
(DEFINED(__SI2C2Interrupt) ? ABSOLUTE(__SI2C2Interrupt) :
|
| 616 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 617 |
|
|
LONG( DEFINED(__AltMI2C2Interrupt) ? ABSOLUTE(__AltMI2C2Interrupt) :
|
| 618 |
|
|
(DEFINED(__MI2C2Interrupt) ? ABSOLUTE(__MI2C2Interrupt) :
|
| 619 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 620 |
|
|
LONG( DEFINED(__AltT8Interrupt) ? ABSOLUTE(__AltT8Interrupt) :
|
| 621 |
|
|
(DEFINED(__T8Interrupt) ? ABSOLUTE(__T8Interrupt) :
|
| 622 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 623 |
|
|
LONG( DEFINED(__AltT9Interrupt) ? ABSOLUTE(__AltT9Interrupt) :
|
| 624 |
|
|
(DEFINED(__T9Interrupt) ? ABSOLUTE(__T9Interrupt) :
|
| 625 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 626 |
|
|
LONG( DEFINED(__AltINT3Interrupt) ? ABSOLUTE(__AltINT3Interrupt) :
|
| 627 |
|
|
(DEFINED(__INT3Interrupt) ? ABSOLUTE(__INT3Interrupt) :
|
| 628 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 629 |
|
|
LONG( DEFINED(__AltINT4Interrupt) ? ABSOLUTE(__AltINT4Interrupt) :
|
| 630 |
|
|
(DEFINED(__INT4Interrupt) ? ABSOLUTE(__INT4Interrupt) :
|
| 631 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 632 |
|
|
LONG( DEFINED(__AltC2RxRdyInterrupt) ? ABSOLUTE(__AltC2RxRdyInterrupt) :
|
| 633 |
|
|
(DEFINED(__C2RxRdyInterrupt) ? ABSOLUTE(__C2RxRdyInterrupt) :
|
| 634 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 635 |
|
|
LONG( DEFINED(__AltC2Interrupt) ? ABSOLUTE(__AltC2Interrupt) :
|
| 636 |
|
|
(DEFINED(__C2Interrupt) ? ABSOLUTE(__C2Interrupt) :
|
| 637 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 638 |
|
|
LONG( DEFINED(__AltInterrupt57) ? ABSOLUTE(__AltInterrupt57) :
|
| 639 |
|
|
(DEFINED(__Interrupt57) ? ABSOLUTE(__Interrupt57) :
|
| 640 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 641 |
|
|
LONG( DEFINED(__AltInterrupt58) ? ABSOLUTE(__AltInterrupt58) :
|
| 642 |
|
|
(DEFINED(__Interrupt58) ? ABSOLUTE(__Interrupt58) :
|
| 643 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 644 |
|
|
LONG( DEFINED(__AltDCIErrInterrupt) ? ABSOLUTE(__AltDCIErrInterrupt) :
|
| 645 |
|
|
(DEFINED(__DCIErrInterrupt) ? ABSOLUTE(__DCIErrInterrupt) :
|
| 646 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 647 |
|
|
LONG( DEFINED(__AltDCIInterrupt) ? ABSOLUTE(__AltDCIInterrupt) :
|
| 648 |
|
|
(DEFINED(__DCIInterrupt) ? ABSOLUTE(__DCIInterrupt) :
|
| 649 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 650 |
|
|
LONG( DEFINED(__AltDMA5Interrupt) ? ABSOLUTE(__AltDMA5Interrupt) :
|
| 651 |
|
|
(DEFINED(__DMA5Interrupt) ? ABSOLUTE(__DMA5Interrupt) :
|
| 652 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 653 |
|
|
LONG( DEFINED(__AltInterrupt62) ? ABSOLUTE(__AltInterrupt62) :
|
| 654 |
|
|
(DEFINED(__Interrupt62) ? ABSOLUTE(__Interrupt62) :
|
| 655 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 656 |
|
|
LONG( DEFINED(__AltInterrupt63) ? ABSOLUTE(__AltInterrupt63) :
|
| 657 |
|
|
(DEFINED(__Interrupt63) ? ABSOLUTE(__Interrupt63) :
|
| 658 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 659 |
|
|
LONG( DEFINED(__AltInterrupt64) ? ABSOLUTE(__AltInterrupt64) :
|
| 660 |
|
|
(DEFINED(__Interrupt64) ? ABSOLUTE(__Interrupt64) :
|
| 661 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 662 |
|
|
LONG( DEFINED(__AltU1ErrInterrupt) ? ABSOLUTE(__AltU1ErrInterrupt) :
|
| 663 |
|
|
(DEFINED(__U1ErrInterrupt) ? ABSOLUTE(__U1ErrInterrupt) :
|
| 664 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 665 |
|
|
LONG( DEFINED(__AltU2ErrInterrupt) ? ABSOLUTE(__AltU2ErrInterrupt) :
|
| 666 |
|
|
(DEFINED(__U2ErrInterrupt) ? ABSOLUTE(__U2ErrInterrupt) :
|
| 667 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 668 |
|
|
LONG( DEFINED(__AltInterrupt68) ? ABSOLUTE(__AltInterrupt68) :
|
| 669 |
|
|
(DEFINED(__Interrupt68) ? ABSOLUTE(__Interrupt68) :
|
| 670 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 671 |
|
|
LONG( DEFINED(__AltDMA6Interrupt) ? ABSOLUTE(__AltDMA6Interrupt) :
|
| 672 |
|
|
(DEFINED(__DMA6Interrupt) ? ABSOLUTE(__DMA6Interrupt) :
|
| 673 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 674 |
|
|
LONG( DEFINED(__AltDMA7Interrupt) ? ABSOLUTE(__AltDMA7Interrupt) :
|
| 675 |
|
|
(DEFINED(__DMA7Interrupt) ? ABSOLUTE(__DMA7Interrupt) :
|
| 676 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 677 |
|
|
LONG( DEFINED(__AltC1TxReqInterrupt) ? ABSOLUTE(__AltC1TxReqInterrupt) :
|
| 678 |
|
|
(DEFINED(__C1TxReqInterrupt) ? ABSOLUTE(__C1TxReqInterrupt) :
|
| 679 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 680 |
|
|
LONG( DEFINED(__AltC2TxReqInterrupt) ? ABSOLUTE(__AltC2TxReqInterrupt) :
|
| 681 |
|
|
(DEFINED(__C2TxReqInterrupt) ? ABSOLUTE(__C2TxReqInterrupt) :
|
| 682 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 683 |
|
|
LONG( DEFINED(__AltInterrupt72) ? ABSOLUTE(__AltInterrupt72) :
|
| 684 |
|
|
(DEFINED(__Interrupt72) ? ABSOLUTE(__Interrupt72) :
|
| 685 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 686 |
|
|
LONG( DEFINED(__AltInterrupt73) ? ABSOLUTE(__AltInterrupt73) :
|
| 687 |
|
|
(DEFINED(__Interrupt73) ? ABSOLUTE(__Interrupt73) :
|
| 688 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 689 |
|
|
LONG( DEFINED(__AltInterrupt74) ? ABSOLUTE(__AltInterrupt74) :
|
| 690 |
|
|
(DEFINED(__Interrupt74) ? ABSOLUTE(__Interrupt74) :
|
| 691 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 692 |
|
|
LONG( DEFINED(__AltInterrupt75) ? ABSOLUTE(__AltInterrupt75) :
|
| 693 |
|
|
(DEFINED(__Interrupt75) ? ABSOLUTE(__Interrupt75) :
|
| 694 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 695 |
|
|
LONG( DEFINED(__AltInterrupt76) ? ABSOLUTE(__AltInterrupt76) :
|
| 696 |
|
|
(DEFINED(__Interrupt76) ? ABSOLUTE(__Interrupt76) :
|
| 697 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 698 |
|
|
LONG( DEFINED(__AltInterrupt77) ? ABSOLUTE(__AltInterrupt77) :
|
| 699 |
|
|
(DEFINED(__Interrupt77) ? ABSOLUTE(__Interrupt77) :
|
| 700 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 701 |
|
|
LONG( DEFINED(__AltInterrupt78) ? ABSOLUTE(__AltInterrupt78) :
|
| 702 |
|
|
(DEFINED(__Interrupt78) ? ABSOLUTE(__Interrupt78) :
|
| 703 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 704 |
|
|
LONG( DEFINED(__AltInterrupt79) ? ABSOLUTE(__AltInterrupt79) :
|
| 705 |
|
|
(DEFINED(__Interrupt79) ? ABSOLUTE(__Interrupt79) :
|
| 706 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 707 |
|
|
LONG( DEFINED(__AltInterrupt80) ? ABSOLUTE(__AltInterrupt80) :
|
| 708 |
|
|
(DEFINED(__Interrupt80) ? ABSOLUTE(__Interrupt80) :
|
| 709 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 710 |
|
|
LONG( DEFINED(__AltInterrupt81) ? ABSOLUTE(__AltInterrupt81) :
|
| 711 |
|
|
(DEFINED(__Interrupt81) ? ABSOLUTE(__Interrupt81) :
|
| 712 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 713 |
|
|
LONG( DEFINED(__AltInterrupt82) ? ABSOLUTE(__AltInterrupt82) :
|
| 714 |
|
|
(DEFINED(__Interrupt82) ? ABSOLUTE(__Interrupt82) :
|
| 715 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 716 |
|
|
LONG( DEFINED(__AltInterrupt83) ? ABSOLUTE(__AltInterrupt83) :
|
| 717 |
|
|
(DEFINED(__Interrupt83) ? ABSOLUTE(__Interrupt83) :
|
| 718 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 719 |
|
|
LONG( DEFINED(__AltInterrupt84) ? ABSOLUTE(__AltInterrupt84) :
|
| 720 |
|
|
(DEFINED(__Interrupt84) ? ABSOLUTE(__Interrupt84) :
|
| 721 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 722 |
|
|
LONG( DEFINED(__AltInterrupt85) ? ABSOLUTE(__AltInterrupt85) :
|
| 723 |
|
|
(DEFINED(__Interrupt85) ? ABSOLUTE(__Interrupt85) :
|
| 724 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 725 |
|
|
LONG( DEFINED(__AltInterrupt86) ? ABSOLUTE(__AltInterrupt86) :
|
| 726 |
|
|
(DEFINED(__Interrupt86) ? ABSOLUTE(__Interrupt86) :
|
| 727 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 728 |
|
|
LONG( DEFINED(__AltInterrupt87) ? ABSOLUTE(__AltInterrupt87) :
|
| 729 |
|
|
(DEFINED(__Interrupt87) ? ABSOLUTE(__Interrupt87) :
|
| 730 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 731 |
|
|
LONG( DEFINED(__AltInterrupt88) ? ABSOLUTE(__AltInterrupt88) :
|
| 732 |
|
|
(DEFINED(__Interrupt88) ? ABSOLUTE(__Interrupt88) :
|
| 733 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 734 |
|
|
LONG( DEFINED(__AltInterrupt89) ? ABSOLUTE(__AltInterrupt89) :
|
| 735 |
|
|
(DEFINED(__Interrupt89) ? ABSOLUTE(__Interrupt89) :
|
| 736 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 737 |
|
|
LONG( DEFINED(__AltInterrupt90) ? ABSOLUTE(__AltInterrupt90) :
|
| 738 |
|
|
(DEFINED(__Interrupt90) ? ABSOLUTE(__Interrupt90) :
|
| 739 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 740 |
|
|
LONG( DEFINED(__AltInterrupt91) ? ABSOLUTE(__AltInterrupt91) :
|
| 741 |
|
|
(DEFINED(__Interrupt91) ? ABSOLUTE(__Interrupt91) :
|
| 742 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 743 |
|
|
LONG( DEFINED(__AltInterrupt92) ? ABSOLUTE(__AltInterrupt92) :
|
| 744 |
|
|
(DEFINED(__Interrupt92) ? ABSOLUTE(__Interrupt92) :
|
| 745 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 746 |
|
|
LONG( DEFINED(__AltInterrupt93) ? ABSOLUTE(__AltInterrupt93) :
|
| 747 |
|
|
(DEFINED(__Interrupt93) ? ABSOLUTE(__Interrupt93) :
|
| 748 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 749 |
|
|
LONG( DEFINED(__AltInterrupt94) ? ABSOLUTE(__AltInterrupt94) :
|
| 750 |
|
|
(DEFINED(__Interrupt94) ? ABSOLUTE(__Interrupt94) :
|
| 751 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 752 |
|
|
LONG( DEFINED(__AltInterrupt95) ? ABSOLUTE(__AltInterrupt95) :
|
| 753 |
|
|
(DEFINED(__Interrupt95) ? ABSOLUTE(__Interrupt95) :
|
| 754 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 755 |
|
|
LONG( DEFINED(__AltInterrupt96) ? ABSOLUTE(__AltInterrupt96) :
|
| 756 |
|
|
(DEFINED(__Interrupt96) ? ABSOLUTE(__Interrupt96) :
|
| 757 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 758 |
|
|
LONG( DEFINED(__AltInterrupt97) ? ABSOLUTE(__AltInterrupt97) :
|
| 759 |
|
|
(DEFINED(__Interrupt97) ? ABSOLUTE(__Interrupt97) :
|
| 760 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 761 |
|
|
LONG( DEFINED(__AltInterrupt98) ? ABSOLUTE(__AltInterrupt98) :
|
| 762 |
|
|
(DEFINED(__Interrupt98) ? ABSOLUTE(__Interrupt98) :
|
| 763 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 764 |
|
|
LONG( DEFINED(__AltInterrupt99) ? ABSOLUTE(__AltInterrupt99) :
|
| 765 |
|
|
(DEFINED(__Interrupt99) ? ABSOLUTE(__Interrupt99) :
|
| 766 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 767 |
|
|
LONG( DEFINED(__AltInterrupt100) ? ABSOLUTE(__AltInterrupt100) :
|
| 768 |
|
|
(DEFINED(__Interrupt100) ? ABSOLUTE(__Interrupt100) :
|
| 769 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 770 |
|
|
LONG( DEFINED(__AltInterrupt101) ? ABSOLUTE(__AltInterrupt101) :
|
| 771 |
|
|
(DEFINED(__Interrupt101) ? ABSOLUTE(__Interrupt101) :
|
| 772 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 773 |
|
|
LONG( DEFINED(__AltInterrupt102) ? ABSOLUTE(__AltInterrupt102) :
|
| 774 |
|
|
(DEFINED(__Interrupt102) ? ABSOLUTE(__Interrupt102) :
|
| 775 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 776 |
|
|
LONG( DEFINED(__AltInterrupt103) ? ABSOLUTE(__AltInterrupt103) :
|
| 777 |
|
|
(DEFINED(__Interrupt103) ? ABSOLUTE(__Interrupt103) :
|
| 778 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 779 |
|
|
LONG( DEFINED(__AltInterrupt104) ? ABSOLUTE(__AltInterrupt104) :
|
| 780 |
|
|
(DEFINED(__Interrupt104) ? ABSOLUTE(__Interrupt104) :
|
| 781 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 782 |
|
|
LONG( DEFINED(__AltInterrupt105) ? ABSOLUTE(__AltInterrupt105) :
|
| 783 |
|
|
(DEFINED(__Interrupt105) ? ABSOLUTE(__Interrupt105) :
|
| 784 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 785 |
|
|
LONG( DEFINED(__AltInterrupt106) ? ABSOLUTE(__AltInterrupt106) :
|
| 786 |
|
|
(DEFINED(__Interrupt106) ? ABSOLUTE(__Interrupt106) :
|
| 787 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 788 |
|
|
LONG( DEFINED(__AltInterrupt107) ? ABSOLUTE(__AltInterrupt107) :
|
| 789 |
|
|
(DEFINED(__Interrupt107) ? ABSOLUTE(__Interrupt107) :
|
| 790 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 791 |
|
|
LONG( DEFINED(__AltInterrupt108) ? ABSOLUTE(__AltInterrupt108) :
|
| 792 |
|
|
(DEFINED(__Interrupt108) ? ABSOLUTE(__Interrupt108) :
|
| 793 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 794 |
|
|
LONG( DEFINED(__AltInterrupt109) ? ABSOLUTE(__AltInterrupt109) :
|
| 795 |
|
|
(DEFINED(__Interrupt109) ? ABSOLUTE(__Interrupt109) :
|
| 796 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 797 |
|
|
LONG( DEFINED(__AltInterrupt110) ? ABSOLUTE(__AltInterrupt110) :
|
| 798 |
|
|
(DEFINED(__Interrupt110) ? ABSOLUTE(__Interrupt110) :
|
| 799 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 800 |
|
|
LONG( DEFINED(__AltInterrupt111) ? ABSOLUTE(__AltInterrupt111) :
|
| 801 |
|
|
(DEFINED(__Interrupt111) ? ABSOLUTE(__Interrupt111) :
|
| 802 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 803 |
|
|
LONG( DEFINED(__AltInterrupt112) ? ABSOLUTE(__AltInterrupt112) :
|
| 804 |
|
|
(DEFINED(__Interrupt112) ? ABSOLUTE(__Interrupt112) :
|
| 805 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 806 |
|
|
LONG( DEFINED(__AltInterrupt113) ? ABSOLUTE(__AltInterrupt113) :
|
| 807 |
|
|
(DEFINED(__Interrupt113) ? ABSOLUTE(__Interrupt113) :
|
| 808 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 809 |
|
|
LONG( DEFINED(__AltInterrupt114) ? ABSOLUTE(__AltInterrupt114) :
|
| 810 |
|
|
(DEFINED(__Interrupt114) ? ABSOLUTE(__Interrupt114) :
|
| 811 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 812 |
|
|
LONG( DEFINED(__AltInterrupt115) ? ABSOLUTE(__AltInterrupt115) :
|
| 813 |
|
|
(DEFINED(__Interrupt115) ? ABSOLUTE(__Interrupt115) :
|
| 814 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 815 |
|
|
LONG( DEFINED(__AltInterrupt116) ? ABSOLUTE(__AltInterrupt116) :
|
| 816 |
|
|
(DEFINED(__Interrupt116) ? ABSOLUTE(__Interrupt116) :
|
| 817 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 818 |
|
|
LONG( DEFINED(__AltInterrupt117) ? ABSOLUTE(__AltInterrupt117) :
|
| 819 |
|
|
(DEFINED(__Interrupt117) ? ABSOLUTE(__Interrupt117) :
|
| 820 |
|
|
ABSOLUTE(__DefaultInterrupt)));
|
| 821 |
|
|
} >aivt
|
| 822 |
|
|
} /* SECTIONS */
|
| 823 |
|
|
|
| 824 |
|
|
|
| 825 |
|
|
/*
|
| 826 |
|
|
** ============== Equates for SFR Addresses =============
|
| 827 |
|
|
*/
|
| 828 |
|
|
|
| 829 |
|
|
WREG0 = 0x0;
|
| 830 |
|
|
_WREG0 = 0x0;
|
| 831 |
|
|
WREG1 = 0x2;
|
| 832 |
|
|
_WREG1 = 0x2;
|
| 833 |
|
|
WREG2 = 0x4;
|
| 834 |
|
|
_WREG2 = 0x4;
|
| 835 |
|
|
WREG3 = 0x6;
|
| 836 |
|
|
_WREG3 = 0x6;
|
| 837 |
|
|
WREG4 = 0x8;
|
| 838 |
|
|
_WREG4 = 0x8;
|
| 839 |
|
|
WREG5 = 0xA;
|
| 840 |
|
|
_WREG5 = 0xA;
|
| 841 |
|
|
WREG6 = 0xC;
|
| 842 |
|
|
_WREG6 = 0xC;
|
| 843 |
|
|
WREG7 = 0xE;
|
| 844 |
|
|
_WREG7 = 0xE;
|
| 845 |
|
|
WREG8 = 0x10;
|
| 846 |
|
|
_WREG8 = 0x10;
|
| 847 |
|
|
WREG9 = 0x12;
|
| 848 |
|
|
_WREG9 = 0x12;
|
| 849 |
|
|
WREG10 = 0x14;
|
| 850 |
|
|
_WREG10 = 0x14;
|
| 851 |
|
|
WREG11 = 0x16;
|
| 852 |
|
|
_WREG11 = 0x16;
|
| 853 |
|
|
WREG12 = 0x18;
|
| 854 |
|
|
_WREG12 = 0x18;
|
| 855 |
|
|
WREG13 = 0x1A;
|
| 856 |
|
|
_WREG13 = 0x1A;
|
| 857 |
|
|
WREG14 = 0x1C;
|
| 858 |
|
|
_WREG14 = 0x1C;
|
| 859 |
|
|
WREG15 = 0x1E;
|
| 860 |
|
|
_WREG15 = 0x1E;
|
| 861 |
|
|
SPLIM = 0x20;
|
| 862 |
|
|
_SPLIM = 0x20;
|
| 863 |
|
|
ACCAL = 0x22;
|
| 864 |
|
|
_ACCAL = 0x22;
|
| 865 |
|
|
ACCAH = 0x24;
|
| 866 |
|
|
_ACCAH = 0x24;
|
| 867 |
|
|
ACCAU = 0x26;
|
| 868 |
|
|
_ACCAU = 0x26;
|
| 869 |
|
|
ACCBL = 0x28;
|
| 870 |
|
|
_ACCBL = 0x28;
|
| 871 |
|
|
ACCBH = 0x2A;
|
| 872 |
|
|
_ACCBH = 0x2A;
|
| 873 |
|
|
ACCBU = 0x2C;
|
| 874 |
|
|
_ACCBU = 0x2C;
|
| 875 |
|
|
PCL = 0x2E;
|
| 876 |
|
|
_PCL = 0x2E;
|
| 877 |
|
|
PCH = 0x30;
|
| 878 |
|
|
_PCH = 0x30;
|
| 879 |
|
|
TBLPAG = 0x32;
|
| 880 |
|
|
_TBLPAG = 0x32;
|
| 881 |
|
|
PSVPAG = 0x34;
|
| 882 |
|
|
_PSVPAG = 0x34;
|
| 883 |
|
|
RCOUNT = 0x36;
|
| 884 |
|
|
_RCOUNT = 0x36;
|
| 885 |
|
|
DCOUNT = 0x38;
|
| 886 |
|
|
_DCOUNT = 0x38;
|
| 887 |
|
|
DOSTARTL = 0x3A;
|
| 888 |
|
|
_DOSTARTL = 0x3A;
|
| 889 |
|
|
DOSTARTH = 0x3C;
|
| 890 |
|
|
_DOSTARTH = 0x3C;
|
| 891 |
|
|
DOENDL = 0x3E;
|
| 892 |
|
|
_DOENDL = 0x3E;
|
| 893 |
|
|
DOENDH = 0x40;
|
| 894 |
|
|
_DOENDH = 0x40;
|
| 895 |
|
|
SR = 0x42;
|
| 896 |
|
|
_SR = 0x42;
|
| 897 |
|
|
_SRbits = 0x42;
|
| 898 |
|
|
CORCON = 0x44;
|
| 899 |
|
|
_CORCON = 0x44;
|
| 900 |
|
|
_CORCONbits = 0x44;
|
| 901 |
|
|
MODCON = 0x46;
|
| 902 |
|
|
_MODCON = 0x46;
|
| 903 |
|
|
_MODCONbits = 0x46;
|
| 904 |
|
|
XMODSRT = 0x48;
|
| 905 |
|
|
_XMODSRT = 0x48;
|
| 906 |
|
|
XMODEND = 0x4A;
|
| 907 |
|
|
_XMODEND = 0x4A;
|
| 908 |
|
|
YMODSRT = 0x4C;
|
| 909 |
|
|
_YMODSRT = 0x4C;
|
| 910 |
|
|
YMODEND = 0x4E;
|
| 911 |
|
|
_YMODEND = 0x4E;
|
| 912 |
|
|
XBREV = 0x50;
|
| 913 |
|
|
_XBREV = 0x50;
|
| 914 |
|
|
_XBREVbits = 0x50;
|
| 915 |
|
|
DISICNT = 0x52;
|
| 916 |
|
|
_DISICNT = 0x52;
|
| 917 |
|
|
CNEN1 = 0x60;
|
| 918 |
|
|
_CNEN1 = 0x60;
|
| 919 |
|
|
_CNEN1bits = 0x60;
|
| 920 |
|
|
CNEN2 = 0x62;
|
| 921 |
|
|
_CNEN2 = 0x62;
|
| 922 |
|
|
_CNEN2bits = 0x62;
|
| 923 |
|
|
CNPU1 = 0x68;
|
| 924 |
|
|
_CNPU1 = 0x68;
|
| 925 |
|
|
_CNPU1bits = 0x68;
|
| 926 |
|
|
CNPU2 = 0x6A;
|
| 927 |
|
|
_CNPU2 = 0x6A;
|
| 928 |
|
|
_CNPU2bits = 0x6A;
|
| 929 |
|
|
INTCON1 = 0x80;
|
| 930 |
|
|
_INTCON1 = 0x80;
|
| 931 |
|
|
_INTCON1bits = 0x80;
|
| 932 |
|
|
INTCON2 = 0x82;
|
| 933 |
|
|
_INTCON2 = 0x82;
|
| 934 |
|
|
_INTCON2bits = 0x82;
|
| 935 |
|
|
IFS0 = 0x84;
|
| 936 |
|
|
_IFS0 = 0x84;
|
| 937 |
|
|
_IFS0bits = 0x84;
|
| 938 |
|
|
IFS1 = 0x86;
|
| 939 |
|
|
_IFS1 = 0x86;
|
| 940 |
|
|
_IFS1bits = 0x86;
|
| 941 |
|
|
IFS2 = 0x88;
|
| 942 |
|
|
_IFS2 = 0x88;
|
| 943 |
|
|
_IFS2bits = 0x88;
|
| 944 |
|
|
IFS3 = 0x8A;
|
| 945 |
|
|
_IFS3 = 0x8A;
|
| 946 |
|
|
_IFS3bits = 0x8A;
|
| 947 |
|
|
IFS4 = 0x8C;
|
| 948 |
|
|
_IFS4 = 0x8C;
|
| 949 |
|
|
_IFS4bits = 0x8C;
|
| 950 |
|
|
IEC0 = 0x94;
|
| 951 |
|
|
_IEC0 = 0x94;
|
| 952 |
|
|
_IEC0bits = 0x94;
|
| 953 |
|
|
IEC1 = 0x96;
|
| 954 |
|
|
_IEC1 = 0x96;
|
| 955 |
|
|
_IEC1bits = 0x96;
|
| 956 |
|
|
IEC2 = 0x98;
|
| 957 |
|
|
_IEC2 = 0x98;
|
| 958 |
|
|
_IEC2bits = 0x98;
|
| 959 |
|
|
IEC3 = 0x9A;
|
| 960 |
|
|
_IEC3 = 0x9A;
|
| 961 |
|
|
_IEC3bits = 0x9A;
|
| 962 |
|
|
IEC4 = 0x9C;
|
| 963 |
|
|
_IEC4 = 0x9C;
|
| 964 |
|
|
_IEC4bits = 0x9C;
|
| 965 |
|
|
IPC0 = 0xA4;
|
| 966 |
|
|
_IPC0 = 0xA4;
|
| 967 |
|
|
_IPC0bits = 0xA4;
|
| 968 |
|
|
IPC1 = 0xA6;
|
| 969 |
|
|
_IPC1 = 0xA6;
|
| 970 |
|
|
_IPC1bits = 0xA6;
|
| 971 |
|
|
IPC2 = 0xA8;
|
| 972 |
|
|
_IPC2 = 0xA8;
|
| 973 |
|
|
_IPC2bits = 0xA8;
|
| 974 |
|
|
IPC3 = 0xAA;
|
| 975 |
|
|
_IPC3 = 0xAA;
|
| 976 |
|
|
_IPC3bits = 0xAA;
|
| 977 |
|
|
IPC4 = 0xAC;
|
| 978 |
|
|
_IPC4 = 0xAC;
|
| 979 |
|
|
_IPC4bits = 0xAC;
|
| 980 |
|
|
IPC5 = 0xAE;
|
| 981 |
|
|
_IPC5 = 0xAE;
|
| 982 |
|
|
_IPC5bits = 0xAE;
|
| 983 |
|
|
IPC6 = 0xB0;
|
| 984 |
|
|
_IPC6 = 0xB0;
|
| 985 |
|
|
_IPC6bits = 0xB0;
|
| 986 |
|
|
IPC7 = 0xB2;
|
| 987 |
|
|
_IPC7 = 0xB2;
|
| 988 |
|
|
_IPC7bits = 0xB2;
|
| 989 |
|
|
IPC8 = 0xB4;
|
| 990 |
|
|
_IPC8 = 0xB4;
|
| 991 |
|
|
_IPC8bits = 0xB4;
|
| 992 |
|
|
IPC9 = 0xB6;
|
| 993 |
|
|
_IPC9 = 0xB6;
|
| 994 |
|
|
_IPC9bits = 0xB6;
|
| 995 |
|
|
IPC10 = 0xB8;
|
| 996 |
|
|
_IPC10 = 0xB8;
|
| 997 |
|
|
_IPC10bits = 0xB8;
|
| 998 |
|
|
IPC11 = 0xBA;
|
| 999 |
|
|
_IPC11 = 0xBA;
|
| 1000 |
|
|
_IPC11bits = 0xBA;
|
| 1001 |
|
|
IPC12 = 0xBC;
|
| 1002 |
|
|
_IPC12 = 0xBC;
|
| 1003 |
|
|
_IPC12bits = 0xBC;
|
| 1004 |
|
|
IPC13 = 0xBE;
|
| 1005 |
|
|
_IPC13 = 0xBE;
|
| 1006 |
|
|
_IPC13bits = 0xBE;
|
| 1007 |
|
|
IPC14 = 0xC0;
|
| 1008 |
|
|
_IPC14 = 0xC0;
|
| 1009 |
|
|
_IPC14bits = 0xC0;
|
| 1010 |
|
|
IPC15 = 0xC2;
|
| 1011 |
|
|
_IPC15 = 0xC2;
|
| 1012 |
|
|
_IPC15bits = 0xC2;
|
| 1013 |
|
|
IPC16 = 0xC4;
|
| 1014 |
|
|
_IPC16 = 0xC4;
|
| 1015 |
|
|
_IPC16bits = 0xC4;
|
| 1016 |
|
|
IPC17 = 0xC6;
|
| 1017 |
|
|
_IPC17 = 0xC6;
|
| 1018 |
|
|
_IPC17bits = 0xC6;
|
| 1019 |
|
|
INTTREG = 0xE0;
|
| 1020 |
|
|
_INTTREG = 0xE0;
|
| 1021 |
|
|
_INTTREGbits = 0xE0;
|
| 1022 |
|
|
TMR1 = 0x100;
|
| 1023 |
|
|
_TMR1 = 0x100;
|
| 1024 |
|
|
PR1 = 0x102;
|
| 1025 |
|
|
_PR1 = 0x102;
|
| 1026 |
|
|
T1CON = 0x104;
|
| 1027 |
|
|
_T1CON = 0x104;
|
| 1028 |
|
|
_T1CONbits = 0x104;
|
| 1029 |
|
|
TMR2 = 0x106;
|
| 1030 |
|
|
_TMR2 = 0x106;
|
| 1031 |
|
|
TMR3HLD = 0x108;
|
| 1032 |
|
|
_TMR3HLD = 0x108;
|
| 1033 |
|
|
TMR3 = 0x10A;
|
| 1034 |
|
|
_TMR3 = 0x10A;
|
| 1035 |
|
|
PR2 = 0x10C;
|
| 1036 |
|
|
_PR2 = 0x10C;
|
| 1037 |
|
|
PR3 = 0x10E;
|
| 1038 |
|
|
_PR3 = 0x10E;
|
| 1039 |
|
|
T2CON = 0x110;
|
| 1040 |
|
|
_T2CON = 0x110;
|
| 1041 |
|
|
_T2CONbits = 0x110;
|
| 1042 |
|
|
T3CON = 0x112;
|
| 1043 |
|
|
_T3CON = 0x112;
|
| 1044 |
|
|
_T3CONbits = 0x112;
|
| 1045 |
|
|
TMR4 = 0x114;
|
| 1046 |
|
|
_TMR4 = 0x114;
|
| 1047 |
|
|
TMR5HLD = 0x116;
|
| 1048 |
|
|
_TMR5HLD = 0x116;
|
| 1049 |
|
|
TMR5 = 0x118;
|
| 1050 |
|
|
_TMR5 = 0x118;
|
| 1051 |
|
|
PR4 = 0x11A;
|
| 1052 |
|
|
_PR4 = 0x11A;
|
| 1053 |
|
|
PR5 = 0x11C;
|
| 1054 |
|
|
_PR5 = 0x11C;
|
| 1055 |
|
|
T4CON = 0x11E;
|
| 1056 |
|
|
_T4CON = 0x11E;
|
| 1057 |
|
|
_T4CONbits = 0x11E;
|
| 1058 |
|
|
T5CON = 0x120;
|
| 1059 |
|
|
_T5CON = 0x120;
|
| 1060 |
|
|
_T5CONbits = 0x120;
|
| 1061 |
|
|
TMR6 = 0x122;
|
| 1062 |
|
|
_TMR6 = 0x122;
|
| 1063 |
|
|
TMR7HLD = 0x124;
|
| 1064 |
|
|
_TMR7HLD = 0x124;
|
| 1065 |
|
|
TMR7 = 0x126;
|
| 1066 |
|
|
_TMR7 = 0x126;
|
| 1067 |
|
|
PR6 = 0x128;
|
| 1068 |
|
|
_PR6 = 0x128;
|
| 1069 |
|
|
PR7 = 0x12A;
|
| 1070 |
|
|
_PR7 = 0x12A;
|
| 1071 |
|
|
T6CON = 0x12C;
|
| 1072 |
|
|
_T6CON = 0x12C;
|
| 1073 |
|
|
_T6CONbits = 0x12C;
|
| 1074 |
|
|
T7CON = 0x12E;
|
| 1075 |
|
|
_T7CON = 0x12E;
|
| 1076 |
|
|
_T7CONbits = 0x12E;
|
| 1077 |
|
|
TMR8 = 0x130;
|
| 1078 |
|
|
_TMR8 = 0x130;
|
| 1079 |
|
|
TMR9HLD = 0x132;
|
| 1080 |
|
|
_TMR9HLD = 0x132;
|
| 1081 |
|
|
TMR9 = 0x134;
|
| 1082 |
|
|
_TMR9 = 0x134;
|
| 1083 |
|
|
PR8 = 0x136;
|
| 1084 |
|
|
_PR8 = 0x136;
|
| 1085 |
|
|
PR9 = 0x138;
|
| 1086 |
|
|
_PR9 = 0x138;
|
| 1087 |
|
|
T8CON = 0x13A;
|
| 1088 |
|
|
_T8CON = 0x13A;
|
| 1089 |
|
|
_T8CONbits = 0x13A;
|
| 1090 |
|
|
T9CON = 0x13C;
|
| 1091 |
|
|
_T9CON = 0x13C;
|
| 1092 |
|
|
_T9CONbits = 0x13C;
|
| 1093 |
|
|
IC1BUF = 0x140;
|
| 1094 |
|
|
_IC1BUF = 0x140;
|
| 1095 |
|
|
IC1CON = 0x142;
|
| 1096 |
|
|
_IC1CON = 0x142;
|
| 1097 |
|
|
_IC1CONbits = 0x142;
|
| 1098 |
|
|
IC2BUF = 0x144;
|
| 1099 |
|
|
_IC2BUF = 0x144;
|
| 1100 |
|
|
IC2CON = 0x146;
|
| 1101 |
|
|
_IC2CON = 0x146;
|
| 1102 |
|
|
_IC2CONbits = 0x146;
|
| 1103 |
|
|
IC3BUF = 0x148;
|
| 1104 |
|
|
_IC3BUF = 0x148;
|
| 1105 |
|
|
IC3CON = 0x14A;
|
| 1106 |
|
|
_IC3CON = 0x14A;
|
| 1107 |
|
|
_IC3CONbits = 0x14A;
|
| 1108 |
|
|
IC4BUF = 0x14C;
|
| 1109 |
|
|
_IC4BUF = 0x14C;
|
| 1110 |
|
|
IC4CON = 0x14E;
|
| 1111 |
|
|
_IC4CON = 0x14E;
|
| 1112 |
|
|
_IC4CONbits = 0x14E;
|
| 1113 |
|
|
IC5BUF = 0x150;
|
| 1114 |
|
|
_IC5BUF = 0x150;
|
| 1115 |
|
|
IC5CON = 0x152;
|
| 1116 |
|
|
_IC5CON = 0x152;
|
| 1117 |
|
|
_IC5CONbits = 0x152;
|
| 1118 |
|
|
IC6BUF = 0x154;
|
| 1119 |
|
|
_IC6BUF = 0x154;
|
| 1120 |
|
|
IC6CON = 0x156;
|
| 1121 |
|
|
_IC6CON = 0x156;
|
| 1122 |
|
|
_IC6CONbits = 0x156;
|
| 1123 |
|
|
IC7BUF = 0x158;
|
| 1124 |
|
|
_IC7BUF = 0x158;
|
| 1125 |
|
|
IC7CON = 0x15A;
|
| 1126 |
|
|
_IC7CON = 0x15A;
|
| 1127 |
|
|
_IC7CONbits = 0x15A;
|
| 1128 |
|
|
IC8BUF = 0x15C;
|
| 1129 |
|
|
_IC8BUF = 0x15C;
|
| 1130 |
|
|
IC8CON = 0x15E;
|
| 1131 |
|
|
_IC8CON = 0x15E;
|
| 1132 |
|
|
_IC8CONbits = 0x15E;
|
| 1133 |
|
|
OC1RS = 0x180;
|
| 1134 |
|
|
_OC1RS = 0x180;
|
| 1135 |
|
|
OC1R = 0x182;
|
| 1136 |
|
|
_OC1R = 0x182;
|
| 1137 |
|
|
OC1CON = 0x184;
|
| 1138 |
|
|
_OC1CON = 0x184;
|
| 1139 |
|
|
_OC1CONbits = 0x184;
|
| 1140 |
|
|
OC2RS = 0x186;
|
| 1141 |
|
|
_OC2RS = 0x186;
|
| 1142 |
|
|
OC2R = 0x188;
|
| 1143 |
|
|
_OC2R = 0x188;
|
| 1144 |
|
|
OC2CON = 0x18A;
|
| 1145 |
|
|
_OC2CON = 0x18A;
|
| 1146 |
|
|
_OC2CONbits = 0x18A;
|
| 1147 |
|
|
OC3RS = 0x18C;
|
| 1148 |
|
|
_OC3RS = 0x18C;
|
| 1149 |
|
|
OC3R = 0x18E;
|
| 1150 |
|
|
_OC3R = 0x18E;
|
| 1151 |
|
|
OC3CON = 0x190;
|
| 1152 |
|
|
_OC3CON = 0x190;
|
| 1153 |
|
|
_OC3CONbits = 0x190;
|
| 1154 |
|
|
OC4RS = 0x192;
|
| 1155 |
|
|
_OC4RS = 0x192;
|
| 1156 |
|
|
OC4R = 0x194;
|
| 1157 |
|
|
_OC4R = 0x194;
|
| 1158 |
|
|
OC4CON = 0x196;
|
| 1159 |
|
|
_OC4CON = 0x196;
|
| 1160 |
|
|
_OC4CONbits = 0x196;
|
| 1161 |
|
|
OC5RS = 0x198;
|
| 1162 |
|
|
_OC5RS = 0x198;
|
| 1163 |
|
|
OC5R = 0x19A;
|
| 1164 |
|
|
_OC5R = 0x19A;
|
| 1165 |
|
|
OC5CON = 0x19C;
|
| 1166 |
|
|
_OC5CON = 0x19C;
|
| 1167 |
|
|
_OC5CONbits = 0x19C;
|
| 1168 |
|
|
OC6RS = 0x19E;
|
| 1169 |
|
|
_OC6RS = 0x19E;
|
| 1170 |
|
|
OC6R = 0x1A0;
|
| 1171 |
|
|
_OC6R = 0x1A0;
|
| 1172 |
|
|
OC6CON = 0x1A2;
|
| 1173 |
|
|
_OC6CON = 0x1A2;
|
| 1174 |
|
|
_OC6CONbits = 0x1A2;
|
| 1175 |
|
|
OC7RS = 0x1A4;
|
| 1176 |
|
|
_OC7RS = 0x1A4;
|
| 1177 |
|
|
OC7R = 0x1A6;
|
| 1178 |
|
|
_OC7R = 0x1A6;
|
| 1179 |
|
|
OC7CON = 0x1A8;
|
| 1180 |
|
|
_OC7CON = 0x1A8;
|
| 1181 |
|
|
_OC7CONbits = 0x1A8;
|
| 1182 |
|
|
OC8RS = 0x1AA;
|
| 1183 |
|
|
_OC8RS = 0x1AA;
|
| 1184 |
|
|
OC8R = 0x1AC;
|
| 1185 |
|
|
_OC8R = 0x1AC;
|
| 1186 |
|
|
OC8CON = 0x1AE;
|
| 1187 |
|
|
_OC8CON = 0x1AE;
|
| 1188 |
|
|
_OC8CONbits = 0x1AE;
|
| 1189 |
|
|
I2C1RCV = 0x200;
|
| 1190 |
|
|
_I2C1RCV = 0x200;
|
| 1191 |
|
|
I2C1TRN = 0x202;
|
| 1192 |
|
|
_I2C1TRN = 0x202;
|
| 1193 |
|
|
I2C1BRG = 0x204;
|
| 1194 |
|
|
_I2C1BRG = 0x204;
|
| 1195 |
|
|
I2C1CON = 0x206;
|
| 1196 |
|
|
_I2C1CON = 0x206;
|
| 1197 |
|
|
_I2C1CONbits = 0x206;
|
| 1198 |
|
|
I2C1STAT = 0x208;
|
| 1199 |
|
|
_I2C1STAT = 0x208;
|
| 1200 |
|
|
_I2C1STATbits = 0x208;
|
| 1201 |
|
|
I2C1ADD = 0x20A;
|
| 1202 |
|
|
_I2C1ADD = 0x20A;
|
| 1203 |
|
|
I2C1MSK = 0x20C;
|
| 1204 |
|
|
_I2C1MSK = 0x20C;
|
| 1205 |
|
|
I2C2RCV = 0x210;
|
| 1206 |
|
|
_I2C2RCV = 0x210;
|
| 1207 |
|
|
I2C2TRN = 0x212;
|
| 1208 |
|
|
_I2C2TRN = 0x212;
|
| 1209 |
|
|
I2C2BRG = 0x214;
|
| 1210 |
|
|
_I2C2BRG = 0x214;
|
| 1211 |
|
|
I2C2CON = 0x216;
|
| 1212 |
|
|
_I2C2CON = 0x216;
|
| 1213 |
|
|
_I2C2CONbits = 0x216;
|
| 1214 |
|
|
I2C2STAT = 0x218;
|
| 1215 |
|
|
_I2C2STAT = 0x218;
|
| 1216 |
|
|
_I2C2STATbits = 0x218;
|
| 1217 |
|
|
I2C2ADD = 0x21A;
|
| 1218 |
|
|
_I2C2ADD = 0x21A;
|
| 1219 |
|
|
I2C2MSK = 0x21C;
|
| 1220 |
|
|
_I2C2MSK = 0x21C;
|
| 1221 |
|
|
U1MODE = 0x220;
|
| 1222 |
|
|
_U1MODE = 0x220;
|
| 1223 |
|
|
_U1MODEbits = 0x220;
|
| 1224 |
|
|
U1STA = 0x222;
|
| 1225 |
|
|
_U1STA = 0x222;
|
| 1226 |
|
|
_U1STAbits = 0x222;
|
| 1227 |
|
|
U1TXREG = 0x224;
|
| 1228 |
|
|
_U1TXREG = 0x224;
|
| 1229 |
|
|
_U1TXREGbits = 0x224;
|
| 1230 |
|
|
U1RXREG = 0x226;
|
| 1231 |
|
|
_U1RXREG = 0x226;
|
| 1232 |
|
|
_U1RXREGbits = 0x226;
|
| 1233 |
|
|
U1BRG = 0x228;
|
| 1234 |
|
|
_U1BRG = 0x228;
|
| 1235 |
|
|
U2MODE = 0x230;
|
| 1236 |
|
|
_U2MODE = 0x230;
|
| 1237 |
|
|
_U2MODEbits = 0x230;
|
| 1238 |
|
|
U2STA = 0x232;
|
| 1239 |
|
|
_U2STA = 0x232;
|
| 1240 |
|
|
_U2STAbits = 0x232;
|
| 1241 |
|
|
U2TXREG = 0x234;
|
| 1242 |
|
|
_U2TXREG = 0x234;
|
| 1243 |
|
|
_U2TXREGbits = 0x234;
|
| 1244 |
|
|
U2RXREG = 0x236;
|
| 1245 |
|
|
_U2RXREG = 0x236;
|
| 1246 |
|
|
_U2RXREGbits = 0x236;
|
| 1247 |
|
|
U2BRG = 0x238;
|
| 1248 |
|
|
_U2BRG = 0x238;
|
| 1249 |
|
|
SPI1STAT = 0x240;
|
| 1250 |
|
|
_SPI1STAT = 0x240;
|
| 1251 |
|
|
_SPI1STATbits = 0x240;
|
| 1252 |
|
|
SPI1CON1 = 0x242;
|
| 1253 |
|
|
_SPI1CON1 = 0x242;
|
| 1254 |
|
|
_SPI1CON1bits = 0x242;
|
| 1255 |
|
|
SPI1CON2 = 0x244;
|
| 1256 |
|
|
_SPI1CON2 = 0x244;
|
| 1257 |
|
|
_SPI1CON2bits = 0x244;
|
| 1258 |
|
|
SPI1BUF = 0x248;
|
| 1259 |
|
|
_SPI1BUF = 0x248;
|
| 1260 |
|
|
SPI2STAT = 0x260;
|
| 1261 |
|
|
_SPI2STAT = 0x260;
|
| 1262 |
|
|
_SPI2STATbits = 0x260;
|
| 1263 |
|
|
SPI2CON1 = 0x262;
|
| 1264 |
|
|
_SPI2CON1 = 0x262;
|
| 1265 |
|
|
_SPI2CON1bits = 0x262;
|
| 1266 |
|
|
SPI2CON2 = 0x264;
|
| 1267 |
|
|
_SPI2CON2 = 0x264;
|
| 1268 |
|
|
_SPI2CON2bits = 0x264;
|
| 1269 |
|
|
SPI2BUF = 0x268;
|
| 1270 |
|
|
_SPI2BUF = 0x268;
|
| 1271 |
|
|
DCICON1 = 0x280;
|
| 1272 |
|
|
_DCICON1 = 0x280;
|
| 1273 |
|
|
_DCICON1bits = 0x280;
|
| 1274 |
|
|
DCICON2 = 0x282;
|
| 1275 |
|
|
_DCICON2 = 0x282;
|
| 1276 |
|
|
_DCICON2bits = 0x282;
|
| 1277 |
|
|
DCICON3 = 0x284;
|
| 1278 |
|
|
_DCICON3 = 0x284;
|
| 1279 |
|
|
_DCICON3bits = 0x284;
|
| 1280 |
|
|
DCISTAT = 0x286;
|
| 1281 |
|
|
_DCISTAT = 0x286;
|
| 1282 |
|
|
_DCISTATbits = 0x286;
|
| 1283 |
|
|
TSCON = 0x288;
|
| 1284 |
|
|
_TSCON = 0x288;
|
| 1285 |
|
|
_TSCONbits = 0x288;
|
| 1286 |
|
|
RSCON = 0x28C;
|
| 1287 |
|
|
_RSCON = 0x28C;
|
| 1288 |
|
|
_RSCONbits = 0x28C;
|
| 1289 |
|
|
RXBUF0 = 0x290;
|
| 1290 |
|
|
_RXBUF0 = 0x290;
|
| 1291 |
|
|
RXBUF1 = 0x292;
|
| 1292 |
|
|
_RXBUF1 = 0x292;
|
| 1293 |
|
|
RXBUF2 = 0x294;
|
| 1294 |
|
|
_RXBUF2 = 0x294;
|
| 1295 |
|
|
RXBUF3 = 0x296;
|
| 1296 |
|
|
_RXBUF3 = 0x296;
|
| 1297 |
|
|
TXBUF0 = 0x298;
|
| 1298 |
|
|
_TXBUF0 = 0x298;
|
| 1299 |
|
|
TXBUF1 = 0x29A;
|
| 1300 |
|
|
_TXBUF1 = 0x29A;
|
| 1301 |
|
|
TXBUF2 = 0x29C;
|
| 1302 |
|
|
_TXBUF2 = 0x29C;
|
| 1303 |
|
|
TXBUF3 = 0x29E;
|
| 1304 |
|
|
_TXBUF3 = 0x29E;
|
| 1305 |
|
|
TRISA = 0x2C0;
|
| 1306 |
|
|
_TRISA = 0x2C0;
|
| 1307 |
|
|
_TRISAbits = 0x2C0;
|
| 1308 |
|
|
PORTA = 0x2C2;
|
| 1309 |
|
|
_PORTA = 0x2C2;
|
| 1310 |
|
|
_PORTAbits = 0x2C2;
|
| 1311 |
|
|
LATA = 0x2C4;
|
| 1312 |
|
|
_LATA = 0x2C4;
|
| 1313 |
|
|
_LATAbits = 0x2C4;
|
| 1314 |
|
|
TRISB = 0x2C6;
|
| 1315 |
|
|
_TRISB = 0x2C6;
|
| 1316 |
|
|
_TRISBbits = 0x2C6;
|
| 1317 |
|
|
PORTB = 0x2C8;
|
| 1318 |
|
|
_PORTB = 0x2C8;
|
| 1319 |
|
|
_PORTBbits = 0x2C8;
|
| 1320 |
|
|
LATB = 0x2CA;
|
| 1321 |
|
|
_LATB = 0x2CA;
|
| 1322 |
|
|
_LATBbits = 0x2CA;
|
| 1323 |
|
|
TRISC = 0x2CC;
|
| 1324 |
|
|
_TRISC = 0x2CC;
|
| 1325 |
|
|
_TRISCbits = 0x2CC;
|
| 1326 |
|
|
PORTC = 0x2CE;
|
| 1327 |
|
|
_PORTC = 0x2CE;
|
| 1328 |
|
|
_PORTCbits = 0x2CE;
|
| 1329 |
|
|
LATC = 0x2D0;
|
| 1330 |
|
|
_LATC = 0x2D0;
|
| 1331 |
|
|
_LATCbits = 0x2D0;
|
| 1332 |
|
|
TRISD = 0x2D2;
|
| 1333 |
|
|
_TRISD = 0x2D2;
|
| 1334 |
|
|
_TRISDbits = 0x2D2;
|
| 1335 |
|
|
PORTD = 0x2D4;
|
| 1336 |
|
|
_PORTD = 0x2D4;
|
| 1337 |
|
|
_PORTDbits = 0x2D4;
|
| 1338 |
|
|
LATD = 0x2D6;
|
| 1339 |
|
|
_LATD = 0x2D6;
|
| 1340 |
|
|
_LATDbits = 0x2D6;
|
| 1341 |
|
|
TRISE = 0x2D8;
|
| 1342 |
|
|
_TRISE = 0x2D8;
|
| 1343 |
|
|
_TRISEbits = 0x2D8;
|
| 1344 |
|
|
PORTE = 0x2DA;
|
| 1345 |
|
|
_PORTE = 0x2DA;
|
| 1346 |
|
|
_PORTEbits = 0x2DA;
|
| 1347 |
|
|
LATE = 0x2DC;
|
| 1348 |
|
|
_LATE = 0x2DC;
|
| 1349 |
|
|
_LATEbits = 0x2DC;
|
| 1350 |
|
|
TRISF = 0x2DE;
|
| 1351 |
|
|
_TRISF = 0x2DE;
|
| 1352 |
|
|
_TRISFbits = 0x2DE;
|
| 1353 |
|
|
PORTF = 0x2E0;
|
| 1354 |
|
|
_PORTF = 0x2E0;
|
| 1355 |
|
|
_PORTFbits = 0x2E0;
|
| 1356 |
|
|
LATF = 0x2E2;
|
| 1357 |
|
|
_LATF = 0x2E2;
|
| 1358 |
|
|
_LATFbits = 0x2E2;
|
| 1359 |
|
|
TRISG = 0x2E4;
|
| 1360 |
|
|
_TRISG = 0x2E4;
|
| 1361 |
|
|
_TRISGbits = 0x2E4;
|
| 1362 |
|
|
PORTG = 0x2E6;
|
| 1363 |
|
|
_PORTG = 0x2E6;
|
| 1364 |
|
|
_PORTGbits = 0x2E6;
|
| 1365 |
|
|
LATG = 0x2E8;
|
| 1366 |
|
|
_LATG = 0x2E8;
|
| 1367 |
|
|
_LATGbits = 0x2E8;
|
| 1368 |
|
|
ADC1BUF0 = 0x300;
|
| 1369 |
|
|
_ADC1BUF0 = 0x300;
|
| 1370 |
|
|
AD1CON1 = 0x320;
|
| 1371 |
|
|
_AD1CON1 = 0x320;
|
| 1372 |
|
|
_AD1CON1bits = 0x320;
|
| 1373 |
|
|
AD1CON2 = 0x322;
|
| 1374 |
|
|
_AD1CON2 = 0x322;
|
| 1375 |
|
|
_AD1CON2bits = 0x322;
|
| 1376 |
|
|
AD1CON3 = 0x324;
|
| 1377 |
|
|
_AD1CON3 = 0x324;
|
| 1378 |
|
|
_AD1CON3bits = 0x324;
|
| 1379 |
|
|
AD1CHS123 = 0x326;
|
| 1380 |
|
|
_AD1CHS123 = 0x326;
|
| 1381 |
|
|
_AD1CHS123bits = 0x326;
|
| 1382 |
|
|
AD1CHS0 = 0x328;
|
| 1383 |
|
|
_AD1CHS0 = 0x328;
|
| 1384 |
|
|
_AD1CHS0bits = 0x328;
|
| 1385 |
|
|
AD1PCFGH = 0x32A;
|
| 1386 |
|
|
_AD1PCFGH = 0x32A;
|
| 1387 |
|
|
_AD1PCFGHbits = 0x32A;
|
| 1388 |
|
|
AD1PCFGL = 0x32C;
|
| 1389 |
|
|
_AD1PCFGL = 0x32C;
|
| 1390 |
|
|
_AD1PCFGLbits = 0x32C;
|
| 1391 |
|
|
AD1CSSH = 0x32E;
|
| 1392 |
|
|
_AD1CSSH = 0x32E;
|
| 1393 |
|
|
_AD1CSSHbits = 0x32E;
|
| 1394 |
|
|
AD1CSSL = 0x330;
|
| 1395 |
|
|
_AD1CSSL = 0x330;
|
| 1396 |
|
|
_AD1CSSLbits = 0x330;
|
| 1397 |
|
|
AD1CON4 = 0x332;
|
| 1398 |
|
|
_AD1CON4 = 0x332;
|
| 1399 |
|
|
_AD1CON4bits = 0x332;
|
| 1400 |
|
|
ADC2BUF0 = 0x340;
|
| 1401 |
|
|
_ADC2BUF0 = 0x340;
|
| 1402 |
|
|
AD2CON1 = 0x360;
|
| 1403 |
|
|
_AD2CON1 = 0x360;
|
| 1404 |
|
|
_AD2CON1bits = 0x360;
|
| 1405 |
|
|
AD2CON2 = 0x362;
|
| 1406 |
|
|
_AD2CON2 = 0x362;
|
| 1407 |
|
|
_AD2CON2bits = 0x362;
|
| 1408 |
|
|
AD2CON3 = 0x364;
|
| 1409 |
|
|
_AD2CON3 = 0x364;
|
| 1410 |
|
|
_AD2CON3bits = 0x364;
|
| 1411 |
|
|
AD2CHS123 = 0x366;
|
| 1412 |
|
|
_AD2CHS123 = 0x366;
|
| 1413 |
|
|
_AD2CHS123bits = 0x366;
|
| 1414 |
|
|
AD2CHS0 = 0x368;
|
| 1415 |
|
|
_AD2CHS0 = 0x368;
|
| 1416 |
|
|
_AD2CHS0bits = 0x368;
|
| 1417 |
|
|
AD2PCFGL = 0x36C;
|
| 1418 |
|
|
_AD2PCFGL = 0x36C;
|
| 1419 |
|
|
_AD2PCFGLbits = 0x36C;
|
| 1420 |
|
|
AD2CSSL = 0x370;
|
| 1421 |
|
|
_AD2CSSL = 0x370;
|
| 1422 |
|
|
_AD2CSSLbits = 0x370;
|
| 1423 |
|
|
AD2CON4 = 0x372;
|
| 1424 |
|
|
_AD2CON4 = 0x372;
|
| 1425 |
|
|
_AD2CON4bits = 0x372;
|
| 1426 |
|
|
DMA0CON = 0x380;
|
| 1427 |
|
|
_DMA0CON = 0x380;
|
| 1428 |
|
|
_DMA0CONbits = 0x380;
|
| 1429 |
|
|
DMA0REQ = 0x382;
|
| 1430 |
|
|
_DMA0REQ = 0x382;
|
| 1431 |
|
|
_DMA0REQbits = 0x382;
|
| 1432 |
|
|
DMA0STA = 0x384;
|
| 1433 |
|
|
_DMA0STA = 0x384;
|
| 1434 |
|
|
DMA0STB = 0x386;
|
| 1435 |
|
|
_DMA0STB = 0x386;
|
| 1436 |
|
|
DMA0PAD = 0x388;
|
| 1437 |
|
|
_DMA0PAD = 0x388;
|
| 1438 |
|
|
DMA0CNT = 0x38A;
|
| 1439 |
|
|
_DMA0CNT = 0x38A;
|
| 1440 |
|
|
DMA1CON = 0x38C;
|
| 1441 |
|
|
_DMA1CON = 0x38C;
|
| 1442 |
|
|
_DMA1CONbits = 0x38C;
|
| 1443 |
|
|
DMA1REQ = 0x38E;
|
| 1444 |
|
|
_DMA1REQ = 0x38E;
|
| 1445 |
|
|
_DMA1REQbits = 0x38E;
|
| 1446 |
|
|
DMA1STA = 0x390;
|
| 1447 |
|
|
_DMA1STA = 0x390;
|
| 1448 |
|
|
DMA1STB = 0x392;
|
| 1449 |
|
|
_DMA1STB = 0x392;
|
| 1450 |
|
|
DMA1PAD = 0x394;
|
| 1451 |
|
|
_DMA1PAD = 0x394;
|
| 1452 |
|
|
DMA1CNT = 0x396;
|
| 1453 |
|
|
_DMA1CNT = 0x396;
|
| 1454 |
|
|
DMA2CON = 0x398;
|
| 1455 |
|
|
_DMA2CON = 0x398;
|
| 1456 |
|
|
_DMA2CONbits = 0x398;
|
| 1457 |
|
|
DMA2REQ = 0x39A;
|
| 1458 |
|
|
_DMA2REQ = 0x39A;
|
| 1459 |
|
|
_DMA2REQbits = 0x39A;
|
| 1460 |
|
|
DMA2STA = 0x39C;
|
| 1461 |
|
|
_DMA2STA = 0x39C;
|
| 1462 |
|
|
DMA2STB = 0x39E;
|
| 1463 |
|
|
_DMA2STB = 0x39E;
|
| 1464 |
|
|
DMA2PAD = 0x3A0;
|
| 1465 |
|
|
_DMA2PAD = 0x3A0;
|
| 1466 |
|
|
DMA2CNT = 0x3A2;
|
| 1467 |
|
|
_DMA2CNT = 0x3A2;
|
| 1468 |
|
|
DMA3CON = 0x3A4;
|
| 1469 |
|
|
_DMA3CON = 0x3A4;
|
| 1470 |
|
|
_DMA3CONbits = 0x3A4;
|
| 1471 |
|
|
DMA3REQ = 0x3A6;
|
| 1472 |
|
|
_DMA3REQ = 0x3A6;
|
| 1473 |
|
|
_DMA3REQbits = 0x3A6;
|
| 1474 |
|
|
DMA3STA = 0x3A8;
|
| 1475 |
|
|
_DMA3STA = 0x3A8;
|
| 1476 |
|
|
DMA3STB = 0x3AA;
|
| 1477 |
|
|
_DMA3STB = 0x3AA;
|
| 1478 |
|
|
DMA3PAD = 0x3AC;
|
| 1479 |
|
|
_DMA3PAD = 0x3AC;
|
| 1480 |
|
|
DMA3CNT = 0x3AE;
|
| 1481 |
|
|
_DMA3CNT = 0x3AE;
|
| 1482 |
|
|
DMA4CON = 0x3B0;
|
| 1483 |
|
|
_DMA4CON = 0x3B0;
|
| 1484 |
|
|
_DMA4CONbits = 0x3B0;
|
| 1485 |
|
|
DMA4REQ = 0x3B2;
|
| 1486 |
|
|
_DMA4REQ = 0x3B2;
|
| 1487 |
|
|
_DMA4REQbits = 0x3B2;
|
| 1488 |
|
|
DMA4STA = 0x3B4;
|
| 1489 |
|
|
_DMA4STA = 0x3B4;
|
| 1490 |
|
|
DMA4STB = 0x3B6;
|
| 1491 |
|
|
_DMA4STB = 0x3B6;
|
| 1492 |
|
|
DMA4PAD = 0x3B8;
|
| 1493 |
|
|
_DMA4PAD = 0x3B8;
|
| 1494 |
|
|
DMA4CNT = 0x3BA;
|
| 1495 |
|
|
_DMA4CNT = 0x3BA;
|
| 1496 |
|
|
DMA5CON = 0x3BC;
|
| 1497 |
|
|
_DMA5CON = 0x3BC;
|
| 1498 |
|
|
_DMA5CONbits = 0x3BC;
|
| 1499 |
|
|
DMA5REQ = 0x3BE;
|
| 1500 |
|
|
_DMA5REQ = 0x3BE;
|
| 1501 |
|
|
_DMA5REQbits = 0x3BE;
|
| 1502 |
|
|
DMA5STA = 0x3C0;
|
| 1503 |
|
|
_DMA5STA = 0x3C0;
|
| 1504 |
|
|
DMA5STB = 0x3C2;
|
| 1505 |
|
|
_DMA5STB = 0x3C2;
|
| 1506 |
|
|
DMA5PAD = 0x3C4;
|
| 1507 |
|
|
_DMA5PAD = 0x3C4;
|
| 1508 |
|
|
DMA5CNT = 0x3C6;
|
| 1509 |
|
|
_DMA5CNT = 0x3C6;
|
| 1510 |
|
|
DMA6CON = 0x3C8;
|
| 1511 |
|
|
_DMA6CON = 0x3C8;
|
| 1512 |
|
|
_DMA6CONbits = 0x3C8;
|
| 1513 |
|
|
DMA6REQ = 0x3CA;
|
| 1514 |
|
|
_DMA6REQ = 0x3CA;
|
| 1515 |
|
|
_DMA6REQbits = 0x3CA;
|
| 1516 |
|
|
DMA6STA = 0x3CC;
|
| 1517 |
|
|
_DMA6STA = 0x3CC;
|
| 1518 |
|
|
DMA6STB = 0x3CE;
|
| 1519 |
|
|
_DMA6STB = 0x3CE;
|
| 1520 |
|
|
DMA6PAD = 0x3D0;
|
| 1521 |
|
|
_DMA6PAD = 0x3D0;
|
| 1522 |
|
|
DMA6CNT = 0x3D2;
|
| 1523 |
|
|
_DMA6CNT = 0x3D2;
|
| 1524 |
|
|
DMA7CON = 0x3D4;
|
| 1525 |
|
|
_DMA7CON = 0x3D4;
|
| 1526 |
|
|
_DMA7CONbits = 0x3D4;
|
| 1527 |
|
|
DMA7REQ = 0x3D6;
|
| 1528 |
|
|
_DMA7REQ = 0x3D6;
|
| 1529 |
|
|
_DMA7REQbits = 0x3D6;
|
| 1530 |
|
|
DMA7STA = 0x3D8;
|
| 1531 |
|
|
_DMA7STA = 0x3D8;
|
| 1532 |
|
|
DMA7STB = 0x3DA;
|
| 1533 |
|
|
_DMA7STB = 0x3DA;
|
| 1534 |
|
|
DMA7PAD = 0x3DC;
|
| 1535 |
|
|
_DMA7PAD = 0x3DC;
|
| 1536 |
|
|
DMA7CNT = 0x3DE;
|
| 1537 |
|
|
_DMA7CNT = 0x3DE;
|
| 1538 |
|
|
DMACS0 = 0x3E0;
|
| 1539 |
|
|
_DMACS0 = 0x3E0;
|
| 1540 |
|
|
_DMACS0bits = 0x3E0;
|
| 1541 |
|
|
DMACS1 = 0x3E2;
|
| 1542 |
|
|
_DMACS1 = 0x3E2;
|
| 1543 |
|
|
_DMACS1bits = 0x3E2;
|
| 1544 |
|
|
DSADR = 0x3E4;
|
| 1545 |
|
|
_DSADR = 0x3E4;
|
| 1546 |
|
|
C1CTRL1 = 0x400;
|
| 1547 |
|
|
_C1CTRL1 = 0x400;
|
| 1548 |
|
|
_C1CTRL1bits = 0x400;
|
| 1549 |
|
|
C1CTRL2 = 0x402;
|
| 1550 |
|
|
_C1CTRL2 = 0x402;
|
| 1551 |
|
|
_C1CTRL2bits = 0x402;
|
| 1552 |
|
|
C1VEC = 0x404;
|
| 1553 |
|
|
_C1VEC = 0x404;
|
| 1554 |
|
|
_C1VECbits = 0x404;
|
| 1555 |
|
|
C1FCTRL = 0x406;
|
| 1556 |
|
|
_C1FCTRL = 0x406;
|
| 1557 |
|
|
_C1FCTRLbits = 0x406;
|
| 1558 |
|
|
C1FIFO = 0x408;
|
| 1559 |
|
|
_C1FIFO = 0x408;
|
| 1560 |
|
|
_C1FIFObits = 0x408;
|
| 1561 |
|
|
C1INTF = 0x40A;
|
| 1562 |
|
|
_C1INTF = 0x40A;
|
| 1563 |
|
|
_C1INTFbits = 0x40A;
|
| 1564 |
|
|
C1INTE = 0x40C;
|
| 1565 |
|
|
_C1INTE = 0x40C;
|
| 1566 |
|
|
_C1INTEbits = 0x40C;
|
| 1567 |
|
|
C1EC = 0x40E;
|
| 1568 |
|
|
_C1EC = 0x40E;
|
| 1569 |
|
|
_C1ECbits = 0x40E;
|
| 1570 |
|
|
C1RERRCNT = 0x40E;
|
| 1571 |
|
|
_C1RERRCNT = 0x40E;
|
| 1572 |
|
|
C1TERRCNT = 0x40F;
|
| 1573 |
|
|
_C1TERRCNT = 0x40F;
|
| 1574 |
|
|
C1CFG1 = 0x410;
|
| 1575 |
|
|
_C1CFG1 = 0x410;
|
| 1576 |
|
|
_C1CFG1bits = 0x410;
|
| 1577 |
|
|
C1CFG2 = 0x412;
|
| 1578 |
|
|
_C1CFG2 = 0x412;
|
| 1579 |
|
|
_C1CFG2bits = 0x412;
|
| 1580 |
|
|
C1FEN1 = 0x414;
|
| 1581 |
|
|
_C1FEN1 = 0x414;
|
| 1582 |
|
|
_C1FEN1bits = 0x414;
|
| 1583 |
|
|
C1FMSKSEL1 = 0x418;
|
| 1584 |
|
|
_C1FMSKSEL1 = 0x418;
|
| 1585 |
|
|
_C1FMSKSEL1bits = 0x418;
|
| 1586 |
|
|
C1FMSKSEL2 = 0x41A;
|
| 1587 |
|
|
_C1FMSKSEL2 = 0x41A;
|
| 1588 |
|
|
_C1FMSKSEL2bits = 0x41A;
|
| 1589 |
|
|
C1BUFPNT1 = 0x420;
|
| 1590 |
|
|
_C1BUFPNT1 = 0x420;
|
| 1591 |
|
|
_C1BUFPNT1bits = 0x420;
|
| 1592 |
|
|
C1RXFUL1 = 0x420;
|
| 1593 |
|
|
_C1RXFUL1 = 0x420;
|
| 1594 |
|
|
_C1RXFUL1bits = 0x420;
|
| 1595 |
|
|
C1BUFPNT2 = 0x422;
|
| 1596 |
|
|
_C1BUFPNT2 = 0x422;
|
| 1597 |
|
|
_C1BUFPNT2bits = 0x422;
|
| 1598 |
|
|
C1RXFUL2 = 0x422;
|
| 1599 |
|
|
_C1RXFUL2 = 0x422;
|
| 1600 |
|
|
_C1RXFUL2bits = 0x422;
|
| 1601 |
|
|
C1BUFPNT3 = 0x424;
|
| 1602 |
|
|
_C1BUFPNT3 = 0x424;
|
| 1603 |
|
|
_C1BUFPNT3bits = 0x424;
|
| 1604 |
|
|
C1BUFPNT4 = 0x426;
|
| 1605 |
|
|
_C1BUFPNT4 = 0x426;
|
| 1606 |
|
|
_C1BUFPNT4bits = 0x426;
|
| 1607 |
|
|
C1RXOVF1 = 0x428;
|
| 1608 |
|
|
_C1RXOVF1 = 0x428;
|
| 1609 |
|
|
_C1RXOVF1bits = 0x428;
|
| 1610 |
|
|
C1RXOVF2 = 0x42A;
|
| 1611 |
|
|
_C1RXOVF2 = 0x42A;
|
| 1612 |
|
|
_C1RXOVF2bits = 0x42A;
|
| 1613 |
|
|
C1RXM0SID = 0x430;
|
| 1614 |
|
|
_C1RXM0SID = 0x430;
|
| 1615 |
|
|
_C1RXM0SIDbits = 0x430;
|
| 1616 |
|
|
C1TR01CON = 0x430;
|
| 1617 |
|
|
_C1TR01CON = 0x430;
|
| 1618 |
|
|
_C1TR01CONbits = 0x430;
|
| 1619 |
|
|
C1RXM0EID = 0x432;
|
| 1620 |
|
|
_C1RXM0EID = 0x432;
|
| 1621 |
|
|
_C1RXM0EIDbits = 0x432;
|
| 1622 |
|
|
C1TR23CON = 0x432;
|
| 1623 |
|
|
_C1TR23CON = 0x432;
|
| 1624 |
|
|
_C1TR23CONbits = 0x432;
|
| 1625 |
|
|
C1RXM1SID = 0x434;
|
| 1626 |
|
|
_C1RXM1SID = 0x434;
|
| 1627 |
|
|
_C1RXM1SIDbits = 0x434;
|
| 1628 |
|
|
C1TR45CON = 0x434;
|
| 1629 |
|
|
_C1TR45CON = 0x434;
|
| 1630 |
|
|
_C1TR45CONbits = 0x434;
|
| 1631 |
|
|
C1RXM1EID = 0x436;
|
| 1632 |
|
|
_C1RXM1EID = 0x436;
|
| 1633 |
|
|
_C1RXM1EIDbits = 0x436;
|
| 1634 |
|
|
C1TR67CON = 0x436;
|
| 1635 |
|
|
_C1TR67CON = 0x436;
|
| 1636 |
|
|
_C1TR67CONbits = 0x436;
|
| 1637 |
|
|
C1RXM2SID = 0x438;
|
| 1638 |
|
|
_C1RXM2SID = 0x438;
|
| 1639 |
|
|
_C1RXM2SIDbits = 0x438;
|
| 1640 |
|
|
C1RXM2EID = 0x43A;
|
| 1641 |
|
|
_C1RXM2EID = 0x43A;
|
| 1642 |
|
|
_C1RXM2EIDbits = 0x43A;
|
| 1643 |
|
|
C1RXD = 0x440;
|
| 1644 |
|
|
_C1RXD = 0x440;
|
| 1645 |
|
|
C1RXF0SID = 0x440;
|
| 1646 |
|
|
_C1RXF0SID = 0x440;
|
| 1647 |
|
|
_C1RXF0SIDbits = 0x440;
|
| 1648 |
|
|
C1RXF0EID = 0x442;
|
| 1649 |
|
|
_C1RXF0EID = 0x442;
|
| 1650 |
|
|
_C1RXF0EIDbits = 0x442;
|
| 1651 |
|
|
C1TXD = 0x442;
|
| 1652 |
|
|
_C1TXD = 0x442;
|
| 1653 |
|
|
C1RXF1SID = 0x444;
|
| 1654 |
|
|
_C1RXF1SID = 0x444;
|
| 1655 |
|
|
_C1RXF1SIDbits = 0x444;
|
| 1656 |
|
|
C1RXF1EID = 0x446;
|
| 1657 |
|
|
_C1RXF1EID = 0x446;
|
| 1658 |
|
|
_C1RXF1EIDbits = 0x446;
|
| 1659 |
|
|
C1RXF2SID = 0x448;
|
| 1660 |
|
|
_C1RXF2SID = 0x448;
|
| 1661 |
|
|
_C1RXF2SIDbits = 0x448;
|
| 1662 |
|
|
C1RXF2EID = 0x44A;
|
| 1663 |
|
|
_C1RXF2EID = 0x44A;
|
| 1664 |
|
|
_C1RXF2EIDbits = 0x44A;
|
| 1665 |
|
|
C1RXF3SID = 0x44C;
|
| 1666 |
|
|
_C1RXF3SID = 0x44C;
|
| 1667 |
|
|
_C1RXF3SIDbits = 0x44C;
|
| 1668 |
|
|
C1RXF3EID = 0x44E;
|
| 1669 |
|
|
_C1RXF3EID = 0x44E;
|
| 1670 |
|
|
_C1RXF3EIDbits = 0x44E;
|
| 1671 |
|
|
C1RXF4SID = 0x450;
|
| 1672 |
|
|
_C1RXF4SID = 0x450;
|
| 1673 |
|
|
_C1RXF4SIDbits = 0x450;
|
| 1674 |
|
|
C1RXF4EID = 0x452;
|
| 1675 |
|
|
_C1RXF4EID = 0x452;
|
| 1676 |
|
|
_C1RXF4EIDbits = 0x452;
|
| 1677 |
|
|
C1RXF5SID = 0x454;
|
| 1678 |
|
|
_C1RXF5SID = 0x454;
|
| 1679 |
|
|
_C1RXF5SIDbits = 0x454;
|
| 1680 |
|
|
C1RXF5EID = 0x456;
|
| 1681 |
|
|
_C1RXF5EID = 0x456;
|
| 1682 |
|
|
_C1RXF5EIDbits = 0x456;
|
| 1683 |
|
|
C1RXF6SID = 0x458;
|
| 1684 |
|
|
_C1RXF6SID = 0x458;
|
| 1685 |
|
|
_C1RXF6SIDbits = 0x458;
|
| 1686 |
|
|
C1RXF6EID = 0x45A;
|
| 1687 |
|
|
_C1RXF6EID = 0x45A;
|
| 1688 |
|
|
_C1RXF6EIDbits = 0x45A;
|
| 1689 |
|
|
C1RXF7SID = 0x45C;
|
| 1690 |
|
|
_C1RXF7SID = 0x45C;
|
| 1691 |
|
|
_C1RXF7SIDbits = 0x45C;
|
| 1692 |
|
|
C1RXF7EID = 0x45E;
|
| 1693 |
|
|
_C1RXF7EID = 0x45E;
|
| 1694 |
|
|
_C1RXF7EIDbits = 0x45E;
|
| 1695 |
|
|
C1RXF8SID = 0x460;
|
| 1696 |
|
|
_C1RXF8SID = 0x460;
|
| 1697 |
|
|
_C1RXF8SIDbits = 0x460;
|
| 1698 |
|
|
C1RXF8EID = 0x462;
|
| 1699 |
|
|
_C1RXF8EID = 0x462;
|
| 1700 |
|
|
_C1RXF8EIDbits = 0x462;
|
| 1701 |
|
|
C1RXF9SID = 0x464;
|
| 1702 |
|
|
_C1RXF9SID = 0x464;
|
| 1703 |
|
|
_C1RXF9SIDbits = 0x464;
|
| 1704 |
|
|
C1RXF9EID = 0x466;
|
| 1705 |
|
|
_C1RXF9EID = 0x466;
|
| 1706 |
|
|
_C1RXF9EIDbits = 0x466;
|
| 1707 |
|
|
C1RXF10SID = 0x468;
|
| 1708 |
|
|
_C1RXF10SID = 0x468;
|
| 1709 |
|
|
_C1RXF10SIDbits = 0x468;
|
| 1710 |
|
|
C1RXF10EID = 0x46A;
|
| 1711 |
|
|
_C1RXF10EID = 0x46A;
|
| 1712 |
|
|
_C1RXF10EIDbits = 0x46A;
|
| 1713 |
|
|
C1RXF11SID = 0x46C;
|
| 1714 |
|
|
_C1RXF11SID = 0x46C;
|
| 1715 |
|
|
_C1RXF11SIDbits = 0x46C;
|
| 1716 |
|
|
C1RXF11EID = 0x46E;
|
| 1717 |
|
|
_C1RXF11EID = 0x46E;
|
| 1718 |
|
|
_C1RXF11EIDbits = 0x46E;
|
| 1719 |
|
|
C1RXF12SID = 0x470;
|
| 1720 |
|
|
_C1RXF12SID = 0x470;
|
| 1721 |
|
|
_C1RXF12SIDbits = 0x470;
|
| 1722 |
|
|
C1RXF12EID = 0x472;
|
| 1723 |
|
|
_C1RXF12EID = 0x472;
|
| 1724 |
|
|
_C1RXF12EIDbits = 0x472;
|
| 1725 |
|
|
C1RXF13SID = 0x474;
|
| 1726 |
|
|
_C1RXF13SID = 0x474;
|
| 1727 |
|
|
_C1RXF13SIDbits = 0x474;
|
| 1728 |
|
|
C1RXF13EID = 0x476;
|
| 1729 |
|
|
_C1RXF13EID = 0x476;
|
| 1730 |
|
|
_C1RXF13EIDbits = 0x476;
|
| 1731 |
|
|
C1RXF14SID = 0x478;
|
| 1732 |
|
|
_C1RXF14SID = 0x478;
|
| 1733 |
|
|
_C1RXF14SIDbits = 0x478;
|
| 1734 |
|
|
C1RXF14EID = 0x47A;
|
| 1735 |
|
|
_C1RXF14EID = 0x47A;
|
| 1736 |
|
|
_C1RXF14EIDbits = 0x47A;
|
| 1737 |
|
|
C1RXF15SID = 0x47C;
|
| 1738 |
|
|
_C1RXF15SID = 0x47C;
|
| 1739 |
|
|
_C1RXF15SIDbits = 0x47C;
|
| 1740 |
|
|
C1RXF15EID = 0x47E;
|
| 1741 |
|
|
_C1RXF15EID = 0x47E;
|
| 1742 |
|
|
_C1RXF15EIDbits = 0x47E;
|
| 1743 |
|
|
C2CTRL1 = 0x500;
|
| 1744 |
|
|
_C2CTRL1 = 0x500;
|
| 1745 |
|
|
_C2CTRL1bits = 0x500;
|
| 1746 |
|
|
C2CTRL2 = 0x502;
|
| 1747 |
|
|
_C2CTRL2 = 0x502;
|
| 1748 |
|
|
_C2CTRL2bits = 0x502;
|
| 1749 |
|
|
C2VEC = 0x504;
|
| 1750 |
|
|
_C2VEC = 0x504;
|
| 1751 |
|
|
_C2VECbits = 0x504;
|
| 1752 |
|
|
C2FCTRL = 0x506;
|
| 1753 |
|
|
_C2FCTRL = 0x506;
|
| 1754 |
|
|
_C2FCTRLbits = 0x506;
|
| 1755 |
|
|
C2FIFO = 0x508;
|
| 1756 |
|
|
_C2FIFO = 0x508;
|
| 1757 |
|
|
_C2FIFObits = 0x508;
|
| 1758 |
|
|
C2INTF = 0x50A;
|
| 1759 |
|
|
_C2INTF = 0x50A;
|
| 1760 |
|
|
_C2INTFbits = 0x50A;
|
| 1761 |
|
|
C2INTE = 0x50C;
|
| 1762 |
|
|
_C2INTE = 0x50C;
|
| 1763 |
|
|
_C2INTEbits = 0x50C;
|
| 1764 |
|
|
C2EC = 0x50E;
|
| 1765 |
|
|
_C2EC = 0x50E;
|
| 1766 |
|
|
_C2ECbits = 0x50E;
|
| 1767 |
|
|
C2RERRCNT = 0x50E;
|
| 1768 |
|
|
_C2RERRCNT = 0x50E;
|
| 1769 |
|
|
C2TERRCNT = 0x50F;
|
| 1770 |
|
|
_C2TERRCNT = 0x50F;
|
| 1771 |
|
|
C2CFG1 = 0x510;
|
| 1772 |
|
|
_C2CFG1 = 0x510;
|
| 1773 |
|
|
_C2CFG1bits = 0x510;
|
| 1774 |
|
|
C2CFG2 = 0x512;
|
| 1775 |
|
|
_C2CFG2 = 0x512;
|
| 1776 |
|
|
_C2CFG2bits = 0x512;
|
| 1777 |
|
|
C2FEN1 = 0x514;
|
| 1778 |
|
|
_C2FEN1 = 0x514;
|
| 1779 |
|
|
_C2FEN1bits = 0x514;
|
| 1780 |
|
|
C2FMSKSEL1 = 0x518;
|
| 1781 |
|
|
_C2FMSKSEL1 = 0x518;
|
| 1782 |
|
|
_C2FMSKSEL1bits = 0x518;
|
| 1783 |
|
|
C2FMSKSEL2 = 0x51A;
|
| 1784 |
|
|
_C2FMSKSEL2 = 0x51A;
|
| 1785 |
|
|
_C2FMSKSEL2bits = 0x51A;
|
| 1786 |
|
|
C2BUFPNT1 = 0x520;
|
| 1787 |
|
|
_C2BUFPNT1 = 0x520;
|
| 1788 |
|
|
_C2BUFPNT1bits = 0x520;
|
| 1789 |
|
|
C2RXFUL1 = 0x520;
|
| 1790 |
|
|
_C2RXFUL1 = 0x520;
|
| 1791 |
|
|
_C2RXFUL1bits = 0x520;
|
| 1792 |
|
|
C2BUFPNT2 = 0x522;
|
| 1793 |
|
|
_C2BUFPNT2 = 0x522;
|
| 1794 |
|
|
_C2BUFPNT2bits = 0x522;
|
| 1795 |
|
|
C2RXFUL2 = 0x522;
|
| 1796 |
|
|
_C2RXFUL2 = 0x522;
|
| 1797 |
|
|
_C2RXFUL2bits = 0x522;
|
| 1798 |
|
|
C2BUFPNT3 = 0x524;
|
| 1799 |
|
|
_C2BUFPNT3 = 0x524;
|
| 1800 |
|
|
_C2BUFPNT3bits = 0x524;
|
| 1801 |
|
|
C2BUFPNT4 = 0x526;
|
| 1802 |
|
|
_C2BUFPNT4 = 0x526;
|
| 1803 |
|
|
_C2BUFPNT4bits = 0x526;
|
| 1804 |
|
|
C2RXOVF1 = 0x528;
|
| 1805 |
|
|
_C2RXOVF1 = 0x528;
|
| 1806 |
|
|
_C2RXOVF1bits = 0x528;
|
| 1807 |
|
|
C2RXOVF2 = 0x52A;
|
| 1808 |
|
|
_C2RXOVF2 = 0x52A;
|
| 1809 |
|
|
_C2RXOVF2bits = 0x52A;
|
| 1810 |
|
|
C2RXM0SID = 0x530;
|
| 1811 |
|
|
_C2RXM0SID = 0x530;
|
| 1812 |
|
|
_C2RXM0SIDbits = 0x530;
|
| 1813 |
|
|
C2TR01CON = 0x530;
|
| 1814 |
|
|
_C2TR01CON = 0x530;
|
| 1815 |
|
|
_C2TR01CONbits = 0x530;
|
| 1816 |
|
|
C2RXM0EID = 0x532;
|
| 1817 |
|
|
_C2RXM0EID = 0x532;
|
| 1818 |
|
|
_C2RXM0EIDbits = 0x532;
|
| 1819 |
|
|
C2TR23CON = 0x532;
|
| 1820 |
|
|
_C2TR23CON = 0x532;
|
| 1821 |
|
|
_C2TR23CONbits = 0x532;
|
| 1822 |
|
|
C2RXM1SID = 0x534;
|
| 1823 |
|
|
_C2RXM1SID = 0x534;
|
| 1824 |
|
|
_C2RXM1SIDbits = 0x534;
|
| 1825 |
|
|
C2TR45CON = 0x534;
|
| 1826 |
|
|
_C2TR45CON = 0x534;
|
| 1827 |
|
|
_C2TR45CONbits = 0x534;
|
| 1828 |
|
|
C2RXM1EID = 0x536;
|
| 1829 |
|
|
_C2RXM1EID = 0x536;
|
| 1830 |
|
|
_C2RXM1EIDbits = 0x536;
|
| 1831 |
|
|
C2TR67CON = 0x536;
|
| 1832 |
|
|
_C2TR67CON = 0x536;
|
| 1833 |
|
|
_C2TR67CONbits = 0x536;
|
| 1834 |
|
|
C2RXM2SID = 0x538;
|
| 1835 |
|
|
_C2RXM2SID = 0x538;
|
| 1836 |
|
|
_C2RXM2SIDbits = 0x538;
|
| 1837 |
|
|
C2RXM2EID = 0x53A;
|
| 1838 |
|
|
_C2RXM2EID = 0x53A;
|
| 1839 |
|
|
_C2RXM2EIDbits = 0x53A;
|
| 1840 |
|
|
C2RXD = 0x540;
|
| 1841 |
|
|
_C2RXD = 0x540;
|
| 1842 |
|
|
C2RXF0SID = 0x540;
|
| 1843 |
|
|
_C2RXF0SID = 0x540;
|
| 1844 |
|
|
_C2RXF0SIDbits = 0x540;
|
| 1845 |
|
|
C2RXF0EID = 0x542;
|
| 1846 |
|
|
_C2RXF0EID = 0x542;
|
| 1847 |
|
|
_C2RXF0EIDbits = 0x542;
|
| 1848 |
|
|
C2TXD = 0x542;
|
| 1849 |
|
|
_C2TXD = 0x542;
|
| 1850 |
|
|
C2RXF1SID = 0x544;
|
| 1851 |
|
|
_C2RXF1SID = 0x544;
|
| 1852 |
|
|
_C2RXF1SIDbits = 0x544;
|
| 1853 |
|
|
C2RXF1EID = 0x546;
|
| 1854 |
|
|
_C2RXF1EID = 0x546;
|
| 1855 |
|
|
_C2RXF1EIDbits = 0x546;
|
| 1856 |
|
|
C2RXF2SID = 0x548;
|
| 1857 |
|
|
_C2RXF2SID = 0x548;
|
| 1858 |
|
|
_C2RXF2SIDbits = 0x548;
|
| 1859 |
|
|
C2RXF2EID = 0x54A;
|
| 1860 |
|
|
_C2RXF2EID = 0x54A;
|
| 1861 |
|
|
_C2RXF2EIDbits = 0x54A;
|
| 1862 |
|
|
C2RXF3SID = 0x54C;
|
| 1863 |
|
|
_C2RXF3SID = 0x54C;
|
| 1864 |
|
|
_C2RXF3SIDbits = 0x54C;
|
| 1865 |
|
|
C2RXF3EID = 0x54E;
|
| 1866 |
|
|
_C2RXF3EID = 0x54E;
|
| 1867 |
|
|
_C2RXF3EIDbits = 0x54E;
|
| 1868 |
|
|
C2RXF4SID = 0x550;
|
| 1869 |
|
|
_C2RXF4SID = 0x550;
|
| 1870 |
|
|
_C2RXF4SIDbits = 0x550;
|
| 1871 |
|
|
C2RXF4EID = 0x552;
|
| 1872 |
|
|
_C2RXF4EID = 0x552;
|
| 1873 |
|
|
_C2RXF4EIDbits = 0x552;
|
| 1874 |
|
|
C2RXF5SID = 0x554;
|
| 1875 |
|
|
_C2RXF5SID = 0x554;
|
| 1876 |
|
|
_C2RXF5SIDbits = 0x554;
|
| 1877 |
|
|
C2RXF5EID = 0x556;
|
| 1878 |
|
|
_C2RXF5EID = 0x556;
|
| 1879 |
|
|
_C2RXF5EIDbits = 0x556;
|
| 1880 |
|
|
C2RXF6SID = 0x558;
|
| 1881 |
|
|
_C2RXF6SID = 0x558;
|
| 1882 |
|
|
_C2RXF6SIDbits = 0x558;
|
| 1883 |
|
|
C2RXF6EID = 0x55A;
|
| 1884 |
|
|
_C2RXF6EID = 0x55A;
|
| 1885 |
|
|
_C2RXF6EIDbits = 0x55A;
|
| 1886 |
|
|
C2RXF7SID = 0x55C;
|
| 1887 |
|
|
_C2RXF7SID = 0x55C;
|
| 1888 |
|
|
_C2RXF7SIDbits = 0x55C;
|
| 1889 |
|
|
C2RXF7EID = 0x55E;
|
| 1890 |
|
|
_C2RXF7EID = 0x55E;
|
| 1891 |
|
|
_C2RXF7EIDbits = 0x55E;
|
| 1892 |
|
|
C2RXF8SID = 0x560;
|
| 1893 |
|
|
_C2RXF8SID = 0x560;
|
| 1894 |
|
|
_C2RXF8SIDbits = 0x560;
|
| 1895 |
|
|
C2RXF8EID = 0x562;
|
| 1896 |
|
|
_C2RXF8EID = 0x562;
|
| 1897 |
|
|
_C2RXF8EIDbits = 0x562;
|
| 1898 |
|
|
C2RXF9SID = 0x564;
|
| 1899 |
|
|
_C2RXF9SID = 0x564;
|
| 1900 |
|
|
_C2RXF9SIDbits = 0x564;
|
| 1901 |
|
|
C2RXF9EID = 0x566;
|
| 1902 |
|
|
_C2RXF9EID = 0x566;
|
| 1903 |
|
|
_C2RXF9EIDbits = 0x566;
|
| 1904 |
|
|
C2RXF10SID = 0x568;
|
| 1905 |
|
|
_C2RXF10SID = 0x568;
|
| 1906 |
|
|
_C2RXF10SIDbits = 0x568;
|
| 1907 |
|
|
C2RXF10EID = 0x56A;
|
| 1908 |
|
|
_C2RXF10EID = 0x56A;
|
| 1909 |
|
|
_C2RXF10EIDbits = 0x56A;
|
| 1910 |
|
|
C2RXF11SID = 0x56C;
|
| 1911 |
|
|
_C2RXF11SID = 0x56C;
|
| 1912 |
|
|
_C2RXF11SIDbits = 0x56C;
|
| 1913 |
|
|
C2RXF11EID = 0x56E;
|
| 1914 |
|
|
_C2RXF11EID = 0x56E;
|
| 1915 |
|
|
_C2RXF11EIDbits = 0x56E;
|
| 1916 |
|
|
C2RXF12SID = 0x570;
|
| 1917 |
|
|
_C2RXF12SID = 0x570;
|
| 1918 |
|
|
_C2RXF12SIDbits = 0x570;
|
| 1919 |
|
|
C2RXF12EID = 0x572;
|
| 1920 |
|
|
_C2RXF12EID = 0x572;
|
| 1921 |
|
|
_C2RXF12EIDbits = 0x572;
|
| 1922 |
|
|
C2RXF13SID = 0x574;
|
| 1923 |
|
|
_C2RXF13SID = 0x574;
|
| 1924 |
|
|
_C2RXF13SIDbits = 0x574;
|
| 1925 |
|
|
C2RXF13EID = 0x576;
|
| 1926 |
|
|
_C2RXF13EID = 0x576;
|
| 1927 |
|
|
_C2RXF13EIDbits = 0x576;
|
| 1928 |
|
|
C2RXF14SID = 0x578;
|
| 1929 |
|
|
_C2RXF14SID = 0x578;
|
| 1930 |
|
|
_C2RXF14SIDbits = 0x578;
|
| 1931 |
|
|
C2RXF14EID = 0x57A;
|
| 1932 |
|
|
_C2RXF14EID = 0x57A;
|
| 1933 |
|
|
_C2RXF14EIDbits = 0x57A;
|
| 1934 |
|
|
C2RXF15SID = 0x57C;
|
| 1935 |
|
|
_C2RXF15SID = 0x57C;
|
| 1936 |
|
|
_C2RXF15SIDbits = 0x57C;
|
| 1937 |
|
|
C2RXF15EID = 0x57E;
|
| 1938 |
|
|
_C2RXF15EID = 0x57E;
|
| 1939 |
|
|
_C2RXF15EIDbits = 0x57E;
|
| 1940 |
|
|
ODCA = 0x6C0;
|
| 1941 |
|
|
_ODCA = 0x6C0;
|
| 1942 |
|
|
_ODCAbits = 0x6C0;
|
| 1943 |
|
|
ODCD = 0x6D2;
|
| 1944 |
|
|
_ODCD = 0x6D2;
|
| 1945 |
|
|
_ODCDbits = 0x6D2;
|
| 1946 |
|
|
ODCF = 0x6DE;
|
| 1947 |
|
|
_ODCF = 0x6DE;
|
| 1948 |
|
|
_ODCFbits = 0x6DE;
|
| 1949 |
|
|
ODCG = 0x6E4;
|
| 1950 |
|
|
_ODCG = 0x6E4;
|
| 1951 |
|
|
_ODCGbits = 0x6E4;
|
| 1952 |
|
|
RCON = 0x740;
|
| 1953 |
|
|
_RCON = 0x740;
|
| 1954 |
|
|
_RCONbits = 0x740;
|
| 1955 |
|
|
OSCCON = 0x742;
|
| 1956 |
|
|
_OSCCON = 0x742;
|
| 1957 |
|
|
_OSCCONbits = 0x742;
|
| 1958 |
|
|
CLKDIV = 0x744;
|
| 1959 |
|
|
_CLKDIV = 0x744;
|
| 1960 |
|
|
_CLKDIVbits = 0x744;
|
| 1961 |
|
|
PLLFBD = 0x746;
|
| 1962 |
|
|
_PLLFBD = 0x746;
|
| 1963 |
|
|
_PLLFBDbits = 0x746;
|
| 1964 |
|
|
OSCTUN = 0x748;
|
| 1965 |
|
|
_OSCTUN = 0x748;
|
| 1966 |
|
|
_OSCTUNbits = 0x748;
|
| 1967 |
|
|
BSRAM = 0x750;
|
| 1968 |
|
|
_BSRAM = 0x750;
|
| 1969 |
|
|
_BSRAMbits = 0x750;
|
| 1970 |
|
|
SSRAM = 0x752;
|
| 1971 |
|
|
_SSRAM = 0x752;
|
| 1972 |
|
|
_SSRAMbits = 0x752;
|
| 1973 |
|
|
NVMCON = 0x760;
|
| 1974 |
|
|
_NVMCON = 0x760;
|
| 1975 |
|
|
_NVMCONbits = 0x760;
|
| 1976 |
|
|
NVMKEY = 0x766;
|
| 1977 |
|
|
_NVMKEY = 0x766;
|
| 1978 |
|
|
PMD1 = 0x770;
|
| 1979 |
|
|
_PMD1 = 0x770;
|
| 1980 |
|
|
_PMD1bits = 0x770;
|
| 1981 |
|
|
PMD2 = 0x772;
|
| 1982 |
|
|
_PMD2 = 0x772;
|
| 1983 |
|
|
_PMD2bits = 0x772;
|
| 1984 |
|
|
PMD3 = 0x774;
|
| 1985 |
|
|
_PMD3 = 0x774;
|
| 1986 |
|
|
_PMD3bits = 0x774;
|
