OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [lwIP_AVR32_UC3/] [DRIVERS/] [TC/] [tc.c] - Blame information for rev 603

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 583 jeremybenn
/*This file is prepared for Doxygen automatic documentation generation.*/
2
/*! \file *********************************************************************
3
 *
4
 * \brief TC driver for AVR32 UC3.
5
 *
6
 * AVR32 Timer/Counter driver module.
7
 *
8
 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
9
 * - Supported devices:  All AVR32 devices with a TC module can be used.
10
 * - AppNote:
11
 *
12
 * \author               Atmel Corporation: http://www.atmel.com \n
13
 *                       Support and FAQ: http://support.atmel.no/
14
 *
15
 ******************************************************************************/
16
 
17
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
18
 *
19
 * Redistribution and use in source and binary forms, with or without
20
 * modification, are permitted provided that the following conditions are met:
21
 *
22
 * 1. Redistributions of source code must retain the above copyright notice,
23
 * this list of conditions and the following disclaimer.
24
 *
25
 * 2. Redistributions in binary form must reproduce the above copyright notice,
26
 * this list of conditions and the following disclaimer in the documentation
27
 * and/or other materials provided with the distribution.
28
 *
29
 * 3. The name of ATMEL may not be used to endorse or promote products derived
30
 * from this software without specific prior written permission.
31
 *
32
 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
33
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
34
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
35
 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
36
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
41
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
 */
43
 
44
 
45
#include <avr32/io.h>
46
#include "compiler.h"
47
#include "tc.h"
48
 
49
 
50
int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel)
51
{
52
  // Check for valid input.
53
  if (channel >= TC_NUMBER_OF_CHANNELS)
54
    return TC_INVALID_ARGUMENT;
55
 
56
  return tc->channel[channel].imr;
57
}
58
 
59
 
60
int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield)
61
{
62
  // Check for valid input.
63
  if (channel >= TC_NUMBER_OF_CHANNELS)
64
    return TC_INVALID_ARGUMENT;
65
 
66
  // Enable the appropriate interrupts.
67
  tc->channel[channel].ier = bitfield->etrgs << AVR32_TC_ETRGS_OFFSET |
68
                             bitfield->ldrbs << AVR32_TC_LDRBS_OFFSET |
69
                             bitfield->ldras << AVR32_TC_LDRAS_OFFSET |
70
                             bitfield->cpcs << AVR32_TC_CPCS_OFFSET |
71
                             bitfield->cpbs << AVR32_TC_CPBS_OFFSET |
72
                             bitfield->cpas << AVR32_TC_CPAS_OFFSET |
73
                             bitfield->lovrs << AVR32_TC_LOVRS_OFFSET |
74
                             bitfield->covfs << AVR32_TC_COVFS_OFFSET;
75
 
76
  // Disable the appropriate interrupts.
77
  tc->channel[channel].idr = (~bitfield->etrgs & 1) << AVR32_TC_ETRGS_OFFSET |
78
                             (~bitfield->ldrbs & 1) << AVR32_TC_LDRBS_OFFSET |
79
                             (~bitfield->ldras & 1) << AVR32_TC_LDRAS_OFFSET |
80
                             (~bitfield->cpcs & 1) << AVR32_TC_CPCS_OFFSET |
81
                             (~bitfield->cpbs & 1) << AVR32_TC_CPBS_OFFSET |
82
                             (~bitfield->cpas & 1) << AVR32_TC_CPAS_OFFSET |
83
                             (~bitfield->lovrs & 1) << AVR32_TC_LOVRS_OFFSET |
84
                             (~bitfield->covfs & 1) << AVR32_TC_COVFS_OFFSET;
85
 
86
  return 0;
87
}
88
 
89
 
90
int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src)
91
{
92
  // Check for valid input.
93
  if (channel >= TC_NUMBER_OF_CHANNELS || ext_clk_sig_src >= 1 << AVR32_TC_BMR_TC0XC0S_SIZE)
94
    return TC_INVALID_ARGUMENT;
95
 
96
  // Clear bit-field and set the correct behavior.
97
  tc->bmr = (tc->bmr & ~(AVR32_TC_BMR_TC0XC0S_MASK << (channel * AVR32_TC_BMR_TC0XC0S_SIZE))) |
98
            (ext_clk_sig_src << (channel * AVR32_TC_BMR_TC0XC0S_SIZE));
99
 
100
  return 0;
101
}
102
 
103
 
104
int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt)
105
{
106
  // Check for valid input.
107
  if (opt->channel >= TC_NUMBER_OF_CHANNELS)
108
    return TC_INVALID_ARGUMENT;
109
 
110
  // MEASURE SIGNALS: Capture operating mode.
111
  tc->channel[opt->channel].cmr = opt->ldrb << AVR32_TC_LDRB_OFFSET |
112
                                  opt->ldra << AVR32_TC_LDRA_OFFSET |
113
 
114
                                  opt->cpctrg << AVR32_TC_CPCTRG_OFFSET |
115
                                  opt->abetrg << AVR32_TC_ABETRG_OFFSET |
116
                                  opt->etrgedg << AVR32_TC_ETRGEDG_OFFSET|
117
                                  opt->ldbdis << AVR32_TC_LDBDIS_OFFSET |
118
                                  opt->ldbstop << AVR32_TC_LDBSTOP_OFFSET |
119
                                  opt->burst << AVR32_TC_BURST_OFFSET |
120
                                  opt->clki << AVR32_TC_CLKI_OFFSET |
121
                                  opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
122
 
123
  return 0;
124
}
125
 
126
 
127
int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt)
128
{
129
  // Check for valid input.
130
  if (opt->channel >= TC_NUMBER_OF_CHANNELS)
131
    return TC_INVALID_ARGUMENT;
132
 
133
  // GENERATE SIGNALS: Waveform operating mode.
134
  tc->channel[opt->channel].cmr = opt->bswtrg << AVR32_TC_BSWTRG_OFFSET |
135
                                  opt->beevt << AVR32_TC_BEEVT_OFFSET |
136
                                  opt->bcpc << AVR32_TC_BCPC_OFFSET |
137
                                  opt->bcpb << AVR32_TC_BCPB_OFFSET |
138
                                  opt->aswtrg << AVR32_TC_ASWTRG_OFFSET |
139
                                  opt->aeevt << AVR32_TC_AEEVT_OFFSET |
140
                                  opt->acpc << AVR32_TC_ACPC_OFFSET |
141
                                  opt->acpa << AVR32_TC_ACPA_OFFSET |
142
                                  1 << AVR32_TC_WAVE_OFFSET |
143
                                  opt->wavsel << AVR32_TC_WAVSEL_OFFSET |
144
                                  opt->enetrg << AVR32_TC_ENETRG_OFFSET |
145
                                  opt->eevt << AVR32_TC_EEVT_OFFSET |
146
                                  opt->eevtedg << AVR32_TC_EEVTEDG_OFFSET |
147
                                  opt->cpcdis << AVR32_TC_CPCDIS_OFFSET |
148
                                  opt->cpcstop << AVR32_TC_CPCSTOP_OFFSET |
149
                                  opt->burst << AVR32_TC_BURST_OFFSET |
150
                                  opt->clki << AVR32_TC_CLKI_OFFSET |
151
                                  opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
152
 
153
  return 0;
154
}
155
 
156
 
157
int tc_start(volatile avr32_tc_t *tc, unsigned int channel)
158
{
159
  // Check for valid input.
160
  if (channel >= TC_NUMBER_OF_CHANNELS)
161
    return TC_INVALID_ARGUMENT;
162
 
163
  // Enable, reset and start the selected timer/counter channel.
164
  tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK | AVR32_TC_CLKEN_MASK;
165
 
166
  return 0;
167
}
168
 
169
 
170
int tc_stop(volatile avr32_tc_t *tc, unsigned int channel)
171
{
172
  // Check for valid input.
173
  if (channel >= TC_NUMBER_OF_CHANNELS)
174
    return TC_INVALID_ARGUMENT;
175
 
176
  // Disable the selected timer/counter channel.
177
  tc->channel[channel].ccr = AVR32_TC_CLKDIS_MASK;
178
 
179
  return 0;
180
}
181
 
182
 
183
int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel)
184
{
185
  // Check for valid input.
186
  if (channel >= TC_NUMBER_OF_CHANNELS)
187
    return TC_INVALID_ARGUMENT;
188
 
189
  // Reset the selected timer/counter channel.
190
  tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK;
191
 
192
  return 0;
193
}
194
 
195
 
196
void tc_sync_trigger(volatile avr32_tc_t *tc)
197
{
198
  // Reset all channels of the selected timer/counter.
199
  tc->bcr = AVR32_TC_BCR_SYNC_MASK;
200
}
201
 
202
 
203
int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel)
204
{
205
  // Check for valid input.
206
  if (channel >= TC_NUMBER_OF_CHANNELS)
207
    return TC_INVALID_ARGUMENT;
208
 
209
  return tc->channel[channel].sr;
210
}
211
 
212
 
213
int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel)
214
{
215
  // Check for valid input.
216
  if (channel >= TC_NUMBER_OF_CHANNELS)
217
    return TC_INVALID_ARGUMENT;
218
 
219
  return Rd_bitfield(tc->channel[channel].cv, AVR32_TC_CV_MASK);
220
}
221
 
222
 
223
int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel)
224
{
225
  // Check for valid input.
226
  if (channel >= TC_NUMBER_OF_CHANNELS)
227
    return TC_INVALID_ARGUMENT;
228
 
229
  return Rd_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK);
230
}
231
 
232
 
233
int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel)
234
{
235
  // Check for valid input.
236
  if (channel >= TC_NUMBER_OF_CHANNELS)
237
    return TC_INVALID_ARGUMENT;
238
 
239
  return Rd_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK);
240
}
241
 
242
 
243
int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel)
244
{
245
  // Check for valid input.
246
  if (channel >= TC_NUMBER_OF_CHANNELS)
247
    return TC_INVALID_ARGUMENT;
248
 
249
  return Rd_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK);
250
}
251
 
252
 
253
int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
254
{
255
  // Check for valid input.
256
  if (channel >= TC_NUMBER_OF_CHANNELS)
257
    return TC_INVALID_ARGUMENT;
258
 
259
  // This function is only available in WAVEFORM mode.
260
  if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
261
    Wr_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK, value);
262
 
263
  return value;
264
}
265
 
266
 
267
int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
268
{
269
  // Check for valid input.
270
  if (channel >= TC_NUMBER_OF_CHANNELS)
271
    return TC_INVALID_ARGUMENT;
272
 
273
  // This function is only available in WAVEFORM mode.
274
  if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
275
    Wr_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK, value);
276
 
277
  return value;
278
}
279
 
280
 
281
int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
282
{
283
  // Check for valid input.
284
  if (channel >= TC_NUMBER_OF_CHANNELS)
285
    return TC_INVALID_ARGUMENT;
286
 
287
  // This function is only available in WAVEFORM mode.
288
  if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
289
    Wr_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK, value);
290
 
291
  return value;
292
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.