OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [lwIP_AVR32_UC3/] [DRIVERS/] [USART/] [usart.c] - Blame information for rev 583

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 583 jeremybenn
/*This file is prepared for Doxygen automatic documentation generation.*/
2
/*! \file *********************************************************************
3
 *
4
 * \brief USART driver for AVR32 UC3.
5
 *
6
 * This file contains basic functions for the AVR32 USART, with support for all
7
 * modes, settings and clock speeds.
8
 *
9
 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
10
 * - Supported devices:  All AVR32 devices with a USART module can be used.
11
 * - AppNote:
12
 *
13
 * \author               Atmel Corporation: http://www.atmel.com \n
14
 *                       Support and FAQ: http://support.atmel.no/
15
 *
16
 ******************************************************************************/
17
 
18
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
19
 *
20
 * Redistribution and use in source and binary forms, with or without
21
 * modification, are permitted provided that the following conditions are met:
22
 *
23
 * 1. Redistributions of source code must retain the above copyright notice,
24
 * this list of conditions and the following disclaimer.
25
 *
26
 * 2. Redistributions in binary form must reproduce the above copyright notice,
27
 * this list of conditions and the following disclaimer in the documentation
28
 * and/or other materials provided with the distribution.
29
 *
30
 * 3. The name of ATMEL may not be used to endorse or promote products derived
31
 * from this software without specific prior written permission.
32
 *
33
 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
34
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
35
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
36
 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
37
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
39
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
40
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
42
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43
 */
44
 
45
 
46
#include "usart.h"
47
 
48
 
49
//------------------------------------------------------------------------------
50
/*! \name Private Functions
51
 */
52
//! @{
53
 
54
 
55
/*! \brief Checks if the USART is in multidrop mode.
56
 *
57
 * \param usart Base address of the USART instance.
58
 *
59
 * \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
60
 */
61
#if __GNUC__
62
__attribute__((__always_inline__))
63
#endif
64
static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
65
{
66
  return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
67
}
68
 
69
 
70
/*! \brief Calculates a clock divider (\e CD) that gets the USART as close to a
71
 *         wanted baudrate as possible.
72
 *
73
 * \todo manage the FP fractal part to avoid big errors
74
 *
75
 * Baudrate calculation:
76
 * \f$ baudrate = \frac{Selected Clock}{16 \times CD} \f$ with 16x oversampling or
77
 * \f$ baudrate = \frac{Selected Clock}{8 \times CD} \f$ with 8x oversampling or
78
 * \f$ baudrate = \frac{Selected Clock}{CD} \f$ with SYNC bit set to allow high speed.
79
 *
80
 * \param usart     Base address of the USART instance.
81
 * \param baudrate  Wanted baudrate.
82
 * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
83
 *
84
 * \retval USART_SUCCESS        Baudrate successfully initialized.
85
 * \retval USART_INVALID_INPUT  Wanted baudrate is impossible with given clock speed.
86
 */
87
 
88
static int usart_set_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, long pba_hz)
89
{
90
  // Clock divider.
91
  int cd;
92
 
93
  // Baudrate calculation.
94
  if (baudrate < pba_hz / 16)
95
  {
96
    // Use 16x oversampling, clear SYNC bit.
97
    usart->mr &=~ (AVR32_USART_MR_OVER_MASK | AVR32_USART_MR_SYNC_MASK);
98
    cd = (pba_hz + 8 * baudrate) / (16 * baudrate);
99
 
100
    if ((cd >65535)) return USART_INVALID_INPUT;
101
  }
102
  else if (baudrate < pba_hz / 8)
103
  {
104
    // Use 8x oversampling.
105
    usart->mr |= AVR32_USART_MR_OVER_MASK;
106
    // clear SYNC bit
107
    usart->mr &=~ AVR32_USART_MR_SYNC_MASK;
108
 
109
    cd = (pba_hz + 4 * baudrate) / (8 * baudrate);
110
 
111
    if ((cd < 1)||(cd >65535)) return USART_INVALID_INPUT;
112
  }
113
  else
114
  {
115
    // set SYNC to 1 
116
    usart->mr |= AVR32_USART_MR_SYNC_MASK;
117
    // use PBA/BaudRate
118
    cd = (pba_hz / baudrate);
119
  }
120
  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
121
 
122
  return USART_SUCCESS;
123
}
124
 
125
//! @}
126
 
127
 
128
//------------------------------------------------------------------------------
129
/*! \name Initialization Functions
130
 */
131
//! @{
132
 
133
 
134
void usart_reset(volatile avr32_usart_t *usart)
135
{
136
  // Disable all USART interrupts.
137
  // Interrupts needed should be set explicitly on every reset.
138
  usart->idr = 0xFFFFFFFF;
139
 
140
  // Reset mode and other registers that could cause unpredictable behavior after reset.
141
  usart->mr = 0;
142
  usart->rtor = 0;
143
  usart->ttgr = 0;
144
 
145
  // Shutdown TX and RX (will be re-enabled when setup has successfully completed),
146
  // reset status bits and turn off DTR and RTS.
147
  usart->cr = AVR32_USART_CR_RSTRX_MASK   |
148
              AVR32_USART_CR_RSTTX_MASK   |
149
              AVR32_USART_CR_RSTSTA_MASK  |
150
              AVR32_USART_CR_RSTIT_MASK   |
151
              AVR32_USART_CR_RSTNACK_MASK |
152
              AVR32_USART_CR_DTRDIS_MASK  |
153
              AVR32_USART_CR_RTSDIS_MASK;
154
}
155
 
156
 
157
int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
158
{
159
  // Reset the USART and shutdown TX and RX.
160
  usart_reset(usart);
161
 
162
  // Check input values.
163
  if (!opt) // Null pointer.
164
    return USART_INVALID_INPUT;
165
  if (opt->charlength < 5 || opt->charlength > 9 ||
166
      opt->paritytype > 7 ||
167
      opt->stopbits > 2 + 255 ||
168
      opt->channelmode > 3)
169
    return USART_INVALID_INPUT;
170
 
171
  if (usart_set_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
172
    return USART_INVALID_INPUT;
173
 
174
  if (opt->charlength == 9)
175
  {
176
    // Character length set to 9 bits. MODE9 dominates CHRL.
177
    usart->mr |= AVR32_USART_MR_MODE9_MASK;
178
  }
179
  else
180
  {
181
    // CHRL gives the character length (- 5) when MODE9 = 0.
182
    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
183
  }
184
 
185
  usart->mr |= (opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET) |
186
               (opt->paritytype << AVR32_USART_MR_PAR_OFFSET);
187
 
188
  if (opt->stopbits > USART_2_STOPBITS)
189
  {
190
    // Set two stop bits
191
    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
192
    // and a timeguard period gives the rest.
193
    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
194
  }
195
  else
196
    // Insert 1, 1.5 or 2 stop bits.
197
    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
198
 
199
  // Setup complete; enable communication.
200
  // Enable input and output.
201
  usart->cr |= AVR32_USART_CR_TXEN_MASK |
202
               AVR32_USART_CR_RXEN_MASK;
203
 
204
  return USART_SUCCESS;
205
}
206
 
207
 
208
int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
209
{
210
  // First: Setup standard RS232.
211
  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
212
    return USART_INVALID_INPUT;
213
 
214
  // Clear previous mode.
215
  usart->mr &= ~AVR32_USART_MR_MODE_MASK;
216
  // Hardware handshaking.
217
  usart->mr |= USART_MODE_HW_HSH << AVR32_USART_MR_MODE_OFFSET;
218
 
219
  return USART_SUCCESS;
220
}
221
 
222
 
223
int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
224
                    long pba_hz, unsigned char irda_filter)
225
{
226
  // First: Setup standard RS232.
227
  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
228
    return USART_INVALID_INPUT;
229
 
230
  // Set IrDA counter.
231
  usart->ifr = irda_filter;
232
 
233
  // Activate "low-pass filtering" of input.
234
  usart->mr |= AVR32_USART_MR_FILTER_MASK;
235
 
236
  return USART_SUCCESS;
237
}
238
 
239
 
240
int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
241
{
242
  // First: Setup standard RS232.
243
  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
244
    return USART_INVALID_INPUT;
245
 
246
  // Clear previous mode.
247
  usart->mr &= ~AVR32_USART_MR_MODE_MASK;
248
  // Set modem mode.
249
  usart->mr |= USART_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
250
 
251
  return USART_SUCCESS;
252
}
253
 
254
 
255
int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
256
{
257
  // First: Setup standard RS232.
258
  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
259
    return USART_INVALID_INPUT;
260
 
261
  // Clear previous mode.
262
  usart->mr &= ~AVR32_USART_MR_MODE_MASK;
263
  // Set RS485 mode.
264
  usart->mr |= USART_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
265
 
266
  return USART_SUCCESS;
267
}
268
 
269
 
270
int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz)
271
{
272
  // Reset the USART and shutdown TX and RX.
273
  usart_reset(usart);
274
 
275
  // Check input values.
276
  if (!opt) // Null pointer.
277
    return USART_INVALID_INPUT;
278
 
279
  if (t == 0)
280
  {
281
    // Set USART mode to ISO7816, T=0.
282
    // The T=0 protocol always uses 2 stop bits.
283
    usart->mr = (USART_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET) |
284
                (AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET) |
285
                (opt->bit_order << AVR32_USART_MR_MSBF_OFFSET); // Allow MSBF in T=0.
286
  }
287
  else if (t == 1)
288
  {
289
    // Only LSB first in the T=1 protocol.
290
    // max_iterations field is only used in T=0 mode.
291
    if (opt->bit_order != 0 ||
292
        opt->max_iterations != 0)
293
      return USART_INVALID_INPUT;
294
    // Set USART mode to ISO7816, T=1.
295
    // The T=1 protocol always uses 1 stop bit.
296
    usart->mr = (USART_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET) |
297
                (AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET);
298
  }
299
  else
300
    return USART_INVALID_INPUT;
301
 
302
  if (usart_set_baudrate(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
303
    return USART_INVALID_INPUT;
304
 
305
  // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
306
  usart->fidi = opt->fidi_ratio;
307
  // Set ISO7816 spesific options in the MODE register.
308
  usart->mr |= (opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET) |
309
               (opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET) |
310
               (opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET) |
311
               AVR32_USART_MR_CLKO_MASK;  // Enable clock output.
312
 
313
  // Setup complete; enable input.
314
  // Leave TX disabled for now.
315
  usart->cr |= AVR32_USART_CR_RXEN_MASK;
316
 
317
  return USART_SUCCESS;
318
}
319
//! @}
320
 
321
 
322
//------------------------------------------------------------------------------
323
/*! \name Transmit/Receive Functions
324
 */
325
//! @{
326
 
327
 
328
int usart_send_address(volatile avr32_usart_t *usart, int address)
329
{
330
  // Check if USART is in multidrop / RS485 mode.
331
  if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
332
 
333
  // Prepare to send an address.
334
  usart->cr |= AVR32_USART_CR_SENDA_MASK;
335
 
336
  // Write the address to TX.
337
  usart_bw_write_char(usart, address);
338
 
339
  return USART_SUCCESS;
340
}
341
 
342
 
343
int usart_write_char(volatile avr32_usart_t *usart, int c)
344
{
345
  if (usart->csr & AVR32_USART_CSR_TXRDY_MASK)
346
  {
347
    usart->thr = c;
348
    return USART_SUCCESS;
349
  }
350
  else
351
    return USART_TX_BUSY;
352
}
353
 
354
 
355
int usart_putchar(volatile avr32_usart_t *usart, int c)
356
{
357
  int timeout = USART_DEFAULT_TIMEOUT;
358
 
359
  if (c == '\n')
360
  {
361
    do
362
    {
363
      if (!timeout--) return USART_FAILURE;
364
    } while (usart_write_char(usart, '\r') != USART_SUCCESS);
365
 
366
    timeout = USART_DEFAULT_TIMEOUT;
367
  }
368
 
369
  do
370
  {
371
    if (!timeout--) return USART_FAILURE;
372
  } while (usart_write_char(usart, c) != USART_SUCCESS);
373
 
374
  return USART_SUCCESS;
375
}
376
 
377
 
378
int usart_read_char(volatile avr32_usart_t *usart, int *c)
379
{
380
  // Check for errors: frame, parity and overrun. In RS485 mode, a parity error
381
  // would mean that an address char has been received.
382
  if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
383
                    AVR32_USART_CSR_FRAME_MASK |
384
                    AVR32_USART_CSR_PARE_MASK))
385
    return USART_RX_ERROR;
386
 
387
  // No error; if we really did receive a char, read it and return SUCCESS.
388
  if (usart->csr & AVR32_USART_CSR_RXRDY_MASK)
389
  {
390
    *c = (unsigned short)usart->rhr;
391
    return USART_SUCCESS;
392
  }
393
  else
394
    return USART_RX_EMPTY;
395
}
396
 
397
 
398
int usart_getchar(volatile avr32_usart_t *usart)
399
{
400
  int c, ret;
401
 
402
  while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
403
 
404
  if (ret == USART_RX_ERROR)
405
    return USART_FAILURE;
406
 
407
  return c;
408
}
409
 
410
 
411
void usart_write_line(volatile avr32_usart_t *usart, const char *string)
412
{
413
  while (*string != '\0')
414
    usart_putchar(usart, *string++);
415
}
416
 
417
 
418
int usart_get_echo_line(volatile avr32_usart_t *usart)
419
{
420
  int rx_char;
421
  int retval = USART_SUCCESS;
422
 
423
  while (1)
424
  {
425
    rx_char = usart_getchar(usart);
426
    if (rx_char == USART_FAILURE)
427
    {
428
      usart_write_line(usart, "Error!!!\n");
429
      break;
430
    }
431
    if (rx_char == '\x03')
432
    {
433
      retval = USART_FAILURE;
434
      break;
435
    }
436
    usart_putchar(usart, rx_char);
437
    if (rx_char == '\r')
438
    {
439
      usart_putchar(usart, '\n');
440
      break;
441
    }
442
  }
443
 
444
  return retval;
445
}
446
 
447
 
448
//! @}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.