OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [lwIP_Demo_Rowley_ARM7/] [USB/] [USBIsr.c] - Blame information for rev 867

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 583 jeremybenn
/*
2
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
3
 
4
    ***************************************************************************
5
    *                                                                         *
6
    * If you are:                                                             *
7
    *                                                                         *
8
    *    + New to FreeRTOS,                                                   *
9
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
10
    *    + Looking for basic training,                                        *
11
    *    + Wanting to improve your FreeRTOS skills and productivity           *
12
    *                                                                         *
13
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
14
    *                                                                         *
15
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
16
    *                  http://www.FreeRTOS.org/Documentation                  *
17
    *                                                                         *
18
    * A pdf reference manual is also available.  Both are usually delivered   *
19
    * to your inbox within 20 minutes to two hours when purchased between 8am *
20
    * and 8pm GMT (although please allow up to 24 hours in case of            *
21
    * exceptional circumstances).  Thank you for your support!                *
22
    *                                                                         *
23
    ***************************************************************************
24
 
25
    This file is part of the FreeRTOS distribution.
26
 
27
    FreeRTOS is free software; you can redistribute it and/or modify it under
28
    the terms of the GNU General Public License (version 2) as published by the
29
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
30
    ***NOTE*** The exception to the GPL is included to allow you to distribute
31
    a combined work that includes FreeRTOS without being obliged to provide the
32
    source code for proprietary components outside of the FreeRTOS kernel.
33
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
34
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
35
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
36
    more details. You should have received a copy of the GNU General Public
37
    License and the FreeRTOS license exception along with FreeRTOS; if not it
38
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
39
    by writing to Richard Barry, contact details for whom are available on the
40
    FreeRTOS WEB site.
41
 
42
    1 tab == 4 spaces!
43
 
44
    http://www.FreeRTOS.org - Documentation, latest information, license and
45
    contact details.
46
 
47
    http://www.SafeRTOS.com - A version that is certified for use in safety
48
    critical systems.
49
 
50
    http://www.OpenRTOS.com - Commercial support, development, porting,
51
    licensing and training services.
52
*/
53
 
54
 
55
/*
56
  BASIC INTERRUPT DRIVEN DRIVER FOR USB.
57
 
58
  This file contains all the usb components that must be compiled
59
  to ARM mode.  The components that can be compiled to either ARM or THUMB
60
  mode are contained in USB-CDC.c.
61
 
62
*/
63
 
64
/* Scheduler includes. */
65
#include "FreeRTOS.h"
66
#include "task.h"
67
#include "queue.h"
68
 
69
/* Demo application includes. */
70
#include "Board.h"
71
#include "usb.h"
72
#include "USB-CDC.h"
73
 
74
#define usbINT_CLEAR_MASK       (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
75
/*-----------------------------------------------------------*/
76
 
77
/* Messages and queue used to communicate between the ISR and the USB task. */
78
static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
79
extern xQueueHandle xUSBInterruptQueue;
80
/*-----------------------------------------------------------*/
81
 
82
/* The ISR can cause a context switch so is declared naked. */
83
void vUSB_ISR_Wrapper( void ) __attribute__ ((naked));
84
 
85
/* The function that actually performs the ISR work.  This must be separate
86
from the wrapper function to ensure the correct stack frame gets set up. */
87
void vUSB_ISR_Handler( void );
88
/*-----------------------------------------------------------*/
89
 
90
void vUSB_ISR_Handler( void )
91
{
92
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
93
static volatile unsigned long ulNextMessage = 0;
94
xISRStatus *pxMessage;
95
unsigned long ulRxBytes;
96
unsigned char ucFifoIndex;
97
 
98
    /* Use the next message from the array. */
99
        pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
100
        ulNextMessage++;
101
 
102
    /* Save UDP ISR state for task-level processing. */
103
        pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
104
        pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
105
 
106
    /* Clear interrupts from ICR. */
107
        AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
108
 
109
 
110
        /* Process incoming FIFO data.  Must set DIR (if needed) and clear RXSETUP
111
        before exit. */
112
 
113
    /* Read CSR and get incoming byte count. */
114
        ulRxBytes = ( pxMessage->ulCSR0 >> 16 ) & usbRX_COUNT_MASK;
115
 
116
        /* Receive control transfers on endpoint 0. */
117
        if( pxMessage->ulCSR0 & ( AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 ) )
118
        {
119
                /* Save FIFO data buffer for either a SETUP or DATA stage */
120
                for( ucFifoIndex = 0; ucFifoIndex < ulRxBytes; ucFifoIndex++ )
121
                {
122
                        pxMessage->ucFifoData[ ucFifoIndex ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
123
                }
124
 
125
                /* Set direction for data stage.  Must be done before RXSETUP is
126
                cleared. */
127
                if( ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP ) )
128
                {
129
                        if( ulRxBytes && ( pxMessage->ucFifoData[ usbREQUEST_TYPE_INDEX ] & 0x80 ) )
130
                        {
131
                                AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] |= AT91C_UDP_DIR;
132
 
133
                                /* Might not be wise in an ISR! */
134
                                while( !(AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_DIR) );
135
                        }
136
 
137
                        /* Clear RXSETUP */
138
                        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RXSETUP;
139
 
140
                        /* Might not be wise in an ISR! */
141
                        while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RXSETUP );
142
                }
143
                else
144
                {
145
                   /* Clear RX_DATA_BK0 */
146
                   AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~AT91C_UDP_RX_DATA_BK0;
147
 
148
                   /* Might not be wise in an ISR! */
149
                   while ( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] & AT91C_UDP_RX_DATA_BK0 );
150
                }
151
        }
152
 
153
        /* If we received data on endpoint 1, disable its interrupts until it is
154
        processed in the main loop */
155
        if( AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] & ( AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 ) )
156
        {
157
                AT91C_BASE_UDP->UDP_IDR = AT91C_UDP_EPINT1;
158
        }
159
 
160
        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT );
161
 
162
        /* Clear interrupts for the other endpoints, retain data flags for endpoint
163
        1. */
164
        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] &= ~( AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP );
165
        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_2 ] &= ~usbINT_CLEAR_MASK;
166
        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_3 ] &= ~usbINT_CLEAR_MASK;
167
 
168
        /* Post ISR data to queue for task-level processing */
169
        xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
170
 
171
        /* Clear AIC to complete ISR processing */
172
        AT91C_BASE_AIC->AIC_EOICR = 0;
173
 
174
        /* Do a task switch if needed */
175
        if( xHigherPriorityTaskWoken )
176
        {
177
                /* This call will ensure that the unblocked task will be executed
178
                immediately upon completion of the ISR if it has a priority higher
179
                than the interrupted task. */
180
                portYIELD_FROM_ISR();
181
        }
182
}
183
/*-----------------------------------------------------------*/
184
 
185
void vUSB_ISR_Wrapper( void )
186
{
187
        /* Save the context of the interrupted task. */
188
        portSAVE_CONTEXT();
189
 
190
        /* Call the handler to do the work.  This must be a separate
191
        function to ensure the stack frame is set up correctly. */
192
        vUSB_ISR_Handler();
193
 
194
        /* Restore the context of whichever task will execute next. */
195
        portRESTORE_CONTEXT();
196
}
197
 
198
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.