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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [lwIP_Demo_Rowley_ARM7/] [crt0.s] - Blame information for rev 583

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Line No. Rev Author Line
1 583 jeremybenn
/*****************************************************************************
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 * Copyright (c) 2001, 2002 Rowley Associates Limited.                       *
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 *                                                                           *
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 * This file may be distributed under the terms of the License Agreement     *
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 * provided with this software.                                              *
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 *                                                                           *
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 * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE   *
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 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
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 *****************************************************************************/
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  .section .init, "ax"
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  .code 32
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  .align 0
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14
  .weak _start
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  .global __start
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  .global __gccmain
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  .extern main
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  .extern exit
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/*****************************************************************************
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 * Function    : _start                                                      *
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 * Description : Main entry point and startup code for C system.             *
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 *****************************************************************************/
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_start:
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__start:
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  mrs r0, cpsr
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  bic r0, r0, #0x1F
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  /* Setup stacks */
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  orr r1, r0, #0x1B /* Undefined mode */
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  msr cpsr_cxsf, r1
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  ldr sp, =__stack_und_end__
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  orr r1, r0, #0x17 /* Abort mode */
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  msr cpsr_cxsf, r1
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  ldr sp, =__stack_abt_end__
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  orr r1, r0, #0x12 /* IRQ mode */
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  msr cpsr_cxsf, r1
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  ldr sp, =__stack_irq_end__
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  orr r1, r0, #0x11 /* FIQ mode */
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  msr cpsr_cxsf, r1
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  ldr sp, =__stack_fiq_end__
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  orr r1, r0, #0x13 /* Supervisor mode */
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  msr cpsr_cxsf, r1
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  ldr sp, =__stack_svc_end__
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#ifdef SUPERVISOR_START
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  /* Start application in supervisor mode */
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  ldr r1, =__stack_end__ /* Setup user/system mode stack */
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  mov r2, sp
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  stmfd r2!, {r1}
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  ldmfd r2, {sp}^
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#else
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  /* Start application in system mode */
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  orr r1, r0, #0x1F /* System mode */
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  msr cpsr_cxsf, r1
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  ldr sp, =__stack_end__
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#endif
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  /* Copy from initialised data section to data section (if necessary). */
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  ldr r0, =__data_load_start__
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  ldr r1, =__data_start__
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  cmp r0, r1
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  beq copy_data_end
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  ldr r2, =__data_end__
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  subs r2, r2, r1
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  beq copy_data_end
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copy_data_loop:
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  ldrb r3, [r0], #+1
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  strb r3, [r1], #+1
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  subs r2, r2, #1
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  bne copy_data_loop
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copy_data_end:
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  /* Copy from initialised text section to text section (if necessary). */
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  ldr r0, =__text_load_start__
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  ldr r1, =__text_start__
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  cmp r0, r1
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  beq copy_text_end
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  ldr r2, =__text_end__
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  subs r2, r2, r1
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  beq copy_text_end
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copy_text_loop:
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  ldrb r3, [r0], #+1
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  strb r3, [r1], #+1
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  subs r2, r2, #1
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  bne copy_text_loop
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copy_text_end:
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  /* Copy from initialised fast_text section to fast_text section (if necessary). */
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  ldr r0, =__fast_load_start__
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  ldr r1, =__fast_start__
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  cmp r0, r1
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  beq copy_fast_end
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  ldr r2, =__fast_end__
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  subs r2, r2, r1
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  beq copy_fast_end
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copy_fast_loop:
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  ldrb r3, [r0], #+1
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  strb r3, [r1], #+1
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  subs r2, r2, #1
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  bne copy_fast_loop
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copy_fast_end:
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  /* Zero the bss. */
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  ldr r0, =__bss_start__
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  ldr r1, =__bss_end__
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  mov r2, #0
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zero_bss_loop:
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  cmp r0, r1
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  beq zero_bss_end
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  strb r2, [r0], #+1
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  b zero_bss_loop
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zero_bss_end:
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#ifdef CHECK
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  /* Check data */
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  ldr r0, =__data_load_start__
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  ldr r1, =__data_start__
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  cmp r0, r1
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  beq check_data_end
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  ldr r2, =__data_end__
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  subs r2, r2, r1
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  beq check_data_end
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check_data_loop:
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  ldrb r3, [r0], #+1
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  ldrb r4, [r1], #+1
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  cmp r3, r4
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  bne data_error_loop
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  subs r2, r2, #1
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  bne check_data_loop
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check_data_end:
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  /* Check text */
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  ldr r0, =__text_load_start__
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  ldr r1, =__text_start__
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  cmp r0, r1
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  beq check_text_end
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  ldr r2, =__text_end__
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  subs r2, r2, r1
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  beq check_text_end
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check_text_loop:
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  ldrb r3, [r0], #+1
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  ldrb r4, [r1], #+1
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  cmp r3, r4
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  bne text_error_loop
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  subs r2, r2, #1
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  bne check_text_loop
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check_text_end:
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  /* Check fast */
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  ldr r0, =__fast_load_start__
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  ldr r1, =__fast_start__
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  cmp r0, r1
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  beq check_fast_end
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  ldr r2, =__fast_end__
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  subs r2, r2, r1
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  beq check_fast_end
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check_fast_loop:
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  ldrb r3, [r0], #+1
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  ldrb r4, [r1], #+1
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  cmp r3, r4
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  bne fast_error_loop
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  subs r2, r2, #1
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  bne check_fast_loop
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check_fast_end:
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  /* Check bss */
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  ldr r0, =__bss_start__
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  ldr r1, =__bss_end__
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  mov r2, #0
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check_bss_loop:
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  cmp r0, r1
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  beq check_bss_end
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  ldrb r2, [r0], #+1
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  cmp r2, #0
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  bne bss_error_loop
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  b check_bss_loop
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check_bss_end:
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#endif
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  /* Initialise the heap */
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  ldr r0, = __heap_start__
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  ldr r1, = __heap_end__
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  sub r1, r1, r0     /* r1 = r1-r0 */
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  mov r2, #0
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  str r2, [r0], #+4 /* *r0++ = 0 */
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  str r1, [r0]      /* *r0 = __heap_end__ - __heap_start__ */
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  /* Call constructors */
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  ldr r0, =__ctors_start__
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  ldr r1, =__ctors_end__
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ctor_loop:
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  cmp r0, r1
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  beq ctor_end
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  ldr r2, [r0], #+4
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  stmfd sp!, {r0-r1}
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  mov lr, pc
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  mov pc, r2
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  ldmfd sp!, {r0-r1}
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  b ctor_loop
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ctor_end:
214
 
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  /* Setup initial call frame */
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  mov lr, #4
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  mov r12, sp
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  stmfd sp!, {r11-r12, lr-pc}
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  sub r11, r12, #0x00000004
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start:
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  /* Jump to main entry point */
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  mov r0, #0
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  mov r1, #0
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  ldr r2, =main
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  mov lr, pc
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#ifdef __ARM_ARCH_3__
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  mov pc, r2
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#else
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  bx r2
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#endif
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  /* Call destructors */
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  ldr r0, =__dtors_start__
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  ldr r1, =__dtors_end__
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dtor_loop:
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  cmp r0, r1
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  beq dtor_end
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  ldr r2, [r0], #+4
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  stmfd sp!, {r0-r1}
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  mov lr, pc
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  mov pc, r2
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  ldmfd sp!, {r0-r1}
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  b dtor_loop
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dtor_end:
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  /* Return from main, loop forever. */
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exit_loop:
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  b exit_loop
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#ifdef CHECK
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data_error_loop:
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  b data_error_loop
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text_error_loop:
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  b text_error_loop
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fast_error_loop:
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  b fast_error_loop
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bss_error_loop:
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  b bss_error_loop
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#endif
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