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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [lwIP_MCF5235_GCC/] [include/] [arch/] [mcf523x/] [mcf523x_sram.h] - Blame information for rev 583

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Line No. Rev Author Line
1 583 jeremybenn
/*
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 * These files are taken from the MCF523X source code example package
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 * which is available on the Freescale website. Freescale explicitly
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 * grants the redistribution and modification of these source files.
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 * The complete licensing information is available in the file
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 * LICENSE_FREESCALE.TXT.
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 *
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 * File:        mcf523x_sram.h
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 * Purpose:     Register and bit definitions for the MCF523X
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 *
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 * Notes:
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 *
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 */
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#ifndef __MCF523X_SRAM_H__
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#define __MCF523X_SRAM_H__
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/*********************************************************************
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*
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* 64KByte System SRAM (SRAM)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_SRAM_RAMBAR    (*(vuint32*)(void*)(&__IPSBAR[0x20000000]))
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/* Bit definitions and macros for MCF_SRAM_RAMBAR */
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#define MCF_SRAM_RAMBAR_V        (0x00000001)
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#define MCF_SRAM_RAMBAR_UD       (0x00000002)
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#define MCF_SRAM_RAMBAR_UC       (0x00000004)
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#define MCF_SRAM_RAMBAR_SD       (0x00000008)
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#define MCF_SRAM_RAMBAR_SC       (0x00000010)
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#define MCF_SRAM_RAMBAR_CI       (0x00000020)
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#define MCF_SRAM_RAMBAR_WP       (0x00000100)
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#define MCF_SRAM_RAMBAR_SPV      (0x00000200)
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#define MCF_SRAM_RAMBAR_PRI2     (0x00000400)
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#define MCF_SRAM_RAMBAR_PRI1     (0x00000800)
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#define MCF_SRAM_RAMBAR_BA(x)    (((x)&0x0000FFFF)<<16)
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/********************************************************************/
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#endif /* __MCF523X_SRAM_H__ */

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