OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [msp430_IAR/] [serial/] [serial.c] - Blame information for rev 588

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 583 jeremybenn
/*
2
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
3
 
4
    ***************************************************************************
5
    *                                                                         *
6
    * If you are:                                                             *
7
    *                                                                         *
8
    *    + New to FreeRTOS,                                                   *
9
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
10
    *    + Looking for basic training,                                        *
11
    *    + Wanting to improve your FreeRTOS skills and productivity           *
12
    *                                                                         *
13
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
14
    *                                                                         *
15
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
16
    *                  http://www.FreeRTOS.org/Documentation                  *
17
    *                                                                         *
18
    * A pdf reference manual is also available.  Both are usually delivered   *
19
    * to your inbox within 20 minutes to two hours when purchased between 8am *
20
    * and 8pm GMT (although please allow up to 24 hours in case of            *
21
    * exceptional circumstances).  Thank you for your support!                *
22
    *                                                                         *
23
    ***************************************************************************
24
 
25
    This file is part of the FreeRTOS distribution.
26
 
27
    FreeRTOS is free software; you can redistribute it and/or modify it under
28
    the terms of the GNU General Public License (version 2) as published by the
29
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
30
    ***NOTE*** The exception to the GPL is included to allow you to distribute
31
    a combined work that includes FreeRTOS without being obliged to provide the
32
    source code for proprietary components outside of the FreeRTOS kernel.
33
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
34
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
35
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
36
    more details. You should have received a copy of the GNU General Public
37
    License and the FreeRTOS license exception along with FreeRTOS; if not it
38
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
39
    by writing to Richard Barry, contact details for whom are available on the
40
    FreeRTOS WEB site.
41
 
42
    1 tab == 4 spaces!
43
 
44
    http://www.FreeRTOS.org - Documentation, latest information, license and
45
    contact details.
46
 
47
    http://www.SafeRTOS.com - A version that is certified for use in safety
48
    critical systems.
49
 
50
    http://www.OpenRTOS.com - Commercial support, development, porting,
51
    licensing and training services.
52
*/
53
 
54
 
55
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
56
 *
57
 * This file only supports UART 1
58
 */
59
 
60
/* Standard includes. */
61
#include <stdlib.h>
62
 
63
/* Scheduler includes. */
64
#include "FreeRTOS.h"
65
#include "queue.h"
66
#include "task.h"
67
 
68
/* Demo application includes. */
69
#include "serial.h"
70
 
71
/* Constants required to setup the hardware. */
72
#define serTX_AND_RX                    ( ( unsigned portCHAR ) 0x03 )
73
 
74
/* Misc. constants. */
75
#define serNO_BLOCK                             ( ( portTickType ) 0 )
76
 
77
/* Enable the UART Tx interrupt. */
78
#define vInterruptOn() IFG2 |= UTXIFG1
79
 
80
/* The queue used to hold received characters. */
81
static xQueueHandle xRxedChars;
82
 
83
/* The queue used to hold characters waiting transmission. */
84
static xQueueHandle xCharsForTx;
85
 
86
static volatile portSHORT sTHREEmpty;
87
 
88
/*-----------------------------------------------------------*/
89
 
90
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
91
{
92
unsigned portLONG ulBaudRateCount;
93
 
94
        /* Initialise the hardware. */
95
 
96
        /* Generate the baud rate constants for the wanted baud rate. */
97
        ulBaudRateCount = configCPU_CLOCK_HZ / ulWantedBaud;
98
 
99
        portENTER_CRITICAL();
100
        {
101
                /* Create the queues used by the com test task. */
102
                xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
103
                xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
104
 
105
                /* Reset UART. */
106
                UCTL1 |= SWRST;
107
 
108
                /* Set pin function. */
109
                P4SEL |= serTX_AND_RX;
110
 
111
                /* All other bits remain at zero for n, 8, 1 interrupt driven operation.
112
                LOOPBACK MODE!*/
113
                U1CTL |= CHAR + LISTEN;
114
                U1TCTL |= SSEL1;
115
 
116
                /* Setup baud rate low byte. */
117
                U1BR0 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
118
 
119
                /* Setup baud rate high byte. */
120
                ulBaudRateCount >>= 8UL;
121
                U1BR1 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
122
 
123
                /* Enable ports. */
124
                ME2 |= UTXE1 + URXE1;
125
 
126
                /* Set. */
127
                UCTL1 &= ~SWRST;
128
 
129
                /* Nothing in the buffer yet. */
130
                sTHREEmpty = pdTRUE;
131
 
132
                /* Enable interrupts. */
133
                IE2 |= URXIE1 + UTXIE1;
134
        }
135
        portEXIT_CRITICAL();
136
 
137
        /* Unlike other ports, this serial code does not allow for more than one
138
        com port.  We therefore don't return a pointer to a port structure and can
139
        instead just return NULL. */
140
        return NULL;
141
}
142
/*-----------------------------------------------------------*/
143
 
144
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
145
{
146
        /* Get the next character from the buffer.  Return false if no characters
147
        are available, or arrive before xBlockTime expires. */
148
        if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
149
        {
150
                return pdTRUE;
151
        }
152
        else
153
        {
154
                return pdFALSE;
155
        }
156
}
157
/*-----------------------------------------------------------*/
158
 
159
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
160
{
161
signed portBASE_TYPE xReturn;
162
 
163
        /* Transmit a character. */
164
 
165
        portENTER_CRITICAL();
166
        {
167
                if( sTHREEmpty == pdTRUE )
168
                {
169
                        /* If sTHREEmpty is true then the UART Tx ISR has indicated that
170
                        there are no characters queued to be transmitted - so we can
171
                        write the character directly to the shift Tx register. */
172
                        sTHREEmpty = pdFALSE;
173
                        U1TXBUF = cOutChar;
174
                        xReturn = pdPASS;
175
                }
176
                else
177
                {
178
                        /* sTHREEmpty is false, so there are still characters waiting to be
179
                        transmitted.  We have to queue this character so it gets
180
                        transmitted     in turn. */
181
 
182
                        /* Return false if after the block time there is no room on the Tx
183
                        queue.  It is ok to block inside a critical section as each task
184
                        maintains it's own critical section status. */
185
                        xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
186
 
187
                        /* Depending on queue sizing and task prioritisation:  While we
188
                        were blocked waiting to post on the queue interrupts were not
189
                        disabled.  It is possible that the serial ISR has emptied the
190
                        Tx queue, in which case we need to start the Tx off again
191
                        writing directly to the Tx register. */
192
                        if( ( sTHREEmpty == pdTRUE ) && ( xReturn == pdPASS ) )
193
                        {
194
                                /* Get back the character we just posted. */
195
                                xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
196
                                sTHREEmpty = pdFALSE;
197
                                U1TXBUF = cOutChar;
198
                        }
199
                }
200
        }
201
        portEXIT_CRITICAL();
202
 
203
        return pdPASS;
204
}
205
/*-----------------------------------------------------------*/
206
 
207
#if configINTERRUPT_EXAMPLE_METHOD == 1
208
 
209
        /*
210
         * UART RX interrupt service routine.
211
         */
212
        #pragma vector=UART1RX_VECTOR
213
        __interrupt void vRxISR( void )
214
        {
215
        signed portCHAR cChar;
216
        portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
217
 
218
                /* Get the character from the UART and post it on the queue of Rxed
219
                characters. */
220
                cChar = U1RXBUF;
221
 
222
                xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
223
 
224
                if( xHigherPriorityTaskWoken )
225
                {
226
                        /*If the post causes a task to wake force a context switch
227
                        as the woken task may have a higher priority than the task we have
228
                        interrupted. */
229
                        taskYIELD();
230
                }
231
 
232
        /* Make sure any low power mode bits are clear before leaving the ISR. */
233
        __bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
234
        }
235
        /*-----------------------------------------------------------*/
236
 
237
        /*
238
         * UART Tx interrupt service routine.
239
         */
240
        #pragma vector=UART1TX_VECTOR
241
        __interrupt void vTxISR( void )
242
        {
243
        signed portCHAR cChar;
244
        portBASE_TYPE xTaskWoken = pdFALSE;
245
 
246
                /* The previous character has been transmitted.  See if there are any
247
                further characters waiting transmission. */
248
 
249
                if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
250
                {
251
                        /* There was another character queued - transmit it now. */
252
                        U1TXBUF = cChar;
253
                }
254
                else
255
                {
256
                        /* There were no other characters to transmit. */
257
                        sTHREEmpty = pdTRUE;
258
                }
259
 
260
        /* Make sure any low power mode bits are clear before leaving the ISR. */
261
        __bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
262
        }
263
    /*-----------------------------------------------------------*/
264
 
265
#elif configINTERRUPT_EXAMPLE_METHOD == 2
266
 
267
    /* This is a standard C function as an assembly file wrapper is used as an
268
    interrupt entry point. */
269
        void vRxISR( void )
270
        {
271
        signed portCHAR cChar;
272
        portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
273
 
274
                /* Get the character from the UART and post it on the queue of Rxed
275
                characters. */
276
                cChar = U1RXBUF;
277
 
278
                xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
279
 
280
        /*If the post causes a task to wake force a context switch
281
        as the woken task may have a higher priority than the task we have
282
        interrupted. */
283
        portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
284
        }
285
        /*-----------------------------------------------------------*/
286
 
287
    /* This is a standard C function as an assembly file wrapper is used as an
288
    interrupt entry point. */
289
        void vTxISR( void )
290
        {
291
        signed portCHAR cChar;
292
        portBASE_TYPE xTaskWoken = pdFALSE;
293
 
294
                /* The previous character has been transmitted.  See if there are any
295
                further characters waiting transmission. */
296
 
297
                if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
298
                {
299
                        /* There was another character queued - transmit it now. */
300
                        U1TXBUF = cChar;
301
                }
302
                else
303
                {
304
                        /* There were no other characters to transmit. */
305
                        sTHREEmpty = pdTRUE;
306
                }
307
        }
308
 
309
#endif /* configINTERRUPT_EXAMPLE_METHOD */
310
/*-----------------------------------------------------------*/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.