OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [uIP_Demo_IAR_ARM7/] [SrcIAR/] [dbgu.h] - Blame information for rev 866

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 583 jeremybenn
//*----------------------------------------------------------------------------
2
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
3
//*----------------------------------------------------------------------------
4
//* The software is delivered "AS IS" without warranty or condition of any
5
//* kind, either express, implied or statutory. This includes without
6
//* limitation any warranty or condition with respect to merchantability or
7
//* fitness for any particular purpose, or against the infringements of
8
//* intellectual property rights of others.
9
//*----------------------------------------------------------------------------
10
//* File Name           : dbgu.c
11
//* Object              : DBGU routines written in C
12
//* Creation            : JG   16/Aug/2004
13
//*----------------------------------------------------------------------------
14
 
15
// Include Standard files
16
extern void APPLI_DBGU(void);
17
extern void D1_TEST_REGISTER_RESET_VALUES(void);
18
extern void D2_CHIP_ID_VALUES(void);
19
 
20
 
21
 
22
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.