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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [uIP_Demo_IAR_ARM7/] [resource/] [SAM7.mac] - Blame information for rev 587

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Line No. Rev Author Line
1 583 jeremybenn 
// ---------------------------------------------------------
2 
//               Microcontroller Software Support  -  ROUSSET  -
3 
// ---------------------------------------------------------
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// The software is delivered "AS IS" without warranty or
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// condition of any  kind, either express, implied or
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// statutory. This includes without limitation any warranty
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// or condition with respect to merchantability or fitness
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// for any particular purpose, or against the infringements of
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// intellectual property rights of others.
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// ---------------------------------------------------------
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//  File: SAM7.mac
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//
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//  1.0 08/Mar/04 JPP    : Creation
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//  1.1 23/Mar/05 JPP    : Change Variable name
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//
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//  $Revision: 2 $
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//
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// ---------------------------------------------------------
19 
 
20 
__var __mac_i;
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__var __mac_pt;
22 
 
23 
execUserReset()
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{
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   AIC();
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//*  Watchdog Disable
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   Watchdog();
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}
29 
 
30 
execUserPreload()
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{
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//*  Set the RAM memory at 0x0020 0000 for code AT 0 flash area
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     CheckRemap();
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//*  Get the Chip ID (AT91C_DBGU_C1R & AT91C_DBGU_C2R
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    __mac_i =__readMemory32(0xFFFFF240,"Memory");
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    __message " ---------------------------------------- Chip ID   0x",__mac_i:%X;
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    __mac_i =__readMemory32(0xFFFFF244,"Memory");
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    __message " ---------------------------------------- Extention 0x",__mac_i:%X;
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//* Get the chip status
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//* Init AIC
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   AIC();
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//*  Watchdog Disable
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   Watchdog();
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}
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48 
 
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//-----------------------------------------------------------------------------
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// Watchdog
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//-------------------------------
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// Normally, the Watchdog is enable at the reset for load it's preferable to
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// Disable.
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//-----------------------------------------------------------------------------
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Watchdog()
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{
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//* Watchdog Disable
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//      AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
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   __writeMemory32(0x00008000,0xFFFFFD44,"Memory");
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   __message "------------------------------- Watchdog Disable ----------------------------------------";
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}
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//-----------------------------------------------------------------------------
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// Check Remap
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//-------------
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//-----------------------------------------------------------------------------
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CheckRemap()
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{
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//* Read the value at 0x0
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    __mac_i =__readMemory32(0x00000000,"Memory");
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    __mac_i =__mac_i+1;
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    __writeMemory32(__mac_i,0x00,"Memory");
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    __mac_pt =__readMemory32(0x00000000,"Memory");
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 if (__mac_i == __mac_pt)
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 {
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   __message "------------------------------- The Remap is done ----------------------------------------";
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//*   Toggel RESET The remap
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    __writeMemory32(0x00000001,0xFFFFFF00,"Memory");
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 } else {
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   __message "------------------------------- The Remap is NOT -----------------------------------------";
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 }
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}
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execUserSetup()
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{
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 ini();
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     __message "-------------------------------Set PC ----------------------------------------";
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     __writeMemory32(0x00000000,0xB4,"Register");
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}
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//-----------------------------------------------------------------------------
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// Reset the Interrupt Controller
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//-------------------------------
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// Normally, the code is executed only if a reset has been actually performed.
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// So, the AIC initialization resumes at setting up the default vectors.
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//-----------------------------------------------------------------------------
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AIC()
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{
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// Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
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    __writeMemory32(0xffffffff,0xFFFFF124,"Memory");
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    __writeMemory32(0xffffffff,0xFFFFF128,"Memory");
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// disable peripheral clock  Peripheral Clock Disable Register
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    __writeMemory32(0xffffffff,0xFFFFFC14,"Memory");
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// #define AT91C_TC0_SR    ((AT91_REG *)        0xFFFA0020) // (TC0) Status Register
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// #define AT91C_TC1_SR    ((AT91_REG *)        0xFFFA0060) // (TC1) Status Register
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// #define AT91C_TC2_SR    ((AT91_REG *)        0xFFFA00A0) // (TC2) Status Register
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    __readMemory32(0xFFFA0020,"Memory");
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    __readMemory32(0xFFFA0060,"Memory");
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    __readMemory32(0xFFFA00A0,"Memory");
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    for (__mac_i=0;__mac_i < 8; __mac_i++)
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    {
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      // AT91C_BASE_AIC->AIC_EOICR
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      __mac_pt  =  __readMemory32(0xFFFFF130,"Memory");
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    }
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   __message "------------------------------- AIC 2 INIT ---------------------------------------------";
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}
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ini()
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{
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__writeMemory32(0x0,0x00,"Register");
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__writeMemory32(0x0,0x04,"Register");
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__writeMemory32(0x0,0x08,"Register");
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__writeMemory32(0x0,0x0C,"Register");
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__writeMemory32(0x0,0x10,"Register");
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__writeMemory32(0x0,0x14,"Register");
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__writeMemory32(0x0,0x18,"Register");
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__writeMemory32(0x0,0x1C,"Register");
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__writeMemory32(0x0,0x20,"Register");
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__writeMemory32(0x0,0x24,"Register");
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__writeMemory32(0x0,0x28,"Register");
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__writeMemory32(0x0,0x2C,"Register");
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__writeMemory32(0x0,0x30,"Register");
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__writeMemory32(0x0,0x34,"Register");
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__writeMemory32(0x0,0x38,"Register");
143 
 
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// Set CPSR
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__writeMemory32(0x0D3,0x98,"Register");
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147 
 
148 
}
149 
 
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RG()
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{
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__mac_i =__readMemory32(0x00,"Register");   __message "R00 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x04,"Register");   __message "R01 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x08,"Register");   __message "R02 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x0C,"Register");   __message "R03 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x10,"Register");   __message "R04 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x14,"Register");   __message "R05 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x18,"Register");   __message "R06 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x1C,"Register");   __message "R07 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x20,"Register");   __message "R08 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x24,"Register");   __message "R09 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x28,"Register");   __message "R10 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x2C,"Register");   __message "R11 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x30,"Register");   __message "R12 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x34,"Register");   __message "R13 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x38,"Register");   __message "R14 0x",__mac_i:%X;
168 
__mac_i =__readMemory32(0x3C,"Register");   __message "R13 SVC 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x40,"Register");   __message "R14 SVC 0x",__mac_i:%X;
170 
__mac_i =__readMemory32(0x44,"Register");   __message "R13 ABT 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x48,"Register");   __message "R14 ABT 0x",__mac_i:%X;
172 
__mac_i =__readMemory32(0x4C,"Register");   __message "R13 UND 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x50,"Register");   __message "R14 UND 0x",__mac_i:%X;
174 
__mac_i =__readMemory32(0x54,"Register");   __message "R13 IRQ 0x",__mac_i:%X;
175 
__mac_i =__readMemory32(0x58,"Register");   __message "R14 IRQ 0x",__mac_i:%X;
176 
__mac_i =__readMemory32(0x5C,"Register");   __message "R08 FIQ 0x",__mac_i:%X;
177 
__mac_i =__readMemory32(0x60,"Register");   __message "R09 FIQ 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x64,"Register");   __message "R10 FIQ 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x68,"Register");   __message "R11 FIQ 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x6C,"Register");   __message "R12 FIQ 0x",__mac_i:%X;
181 
__mac_i =__readMemory32(0x70,"Register");   __message "R13 FIQ 0x",__mac_i:%X;
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__mac_i =__readMemory32(0x74,"Register");   __message "R14 FIQ0x",__mac_i:%X;
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__mac_i =__readMemory32(0x98,"Register");   __message "CPSR     ",__mac_i:%X;
184 
__mac_i =__readMemory32(0x94,"Register");   __message "SPSR     ",__mac_i:%X;
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__mac_i =__readMemory32(0x9C,"Register");   __message "SPSR ABT ",__mac_i:%X;
186 
__mac_i =__readMemory32(0xA0,"Register");   __message "SPSR ABT ",__mac_i:%X;
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__mac_i =__readMemory32(0xA4,"Register");   __message "SPSR UND ",__mac_i:%X;
188 
__mac_i =__readMemory32(0xA8,"Register");   __message "SPSR IRQ ",__mac_i:%X;
189 
__mac_i =__readMemory32(0xAC,"Register");   __message "SPSR FIQ ",__mac_i:%X;
190 
 
191 
__mac_i =__readMemory32(0xB4,"Register");   __message "PC 0x",__mac_i:%X;
192 
 
193 
}
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