OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [GCC/] [ARM7_LPC23xx/] [port.c] - Blame information for rev 572

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 572 jeremybenn
/*
2
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
3
 
4
    ***************************************************************************
5
    *                                                                         *
6
    * If you are:                                                             *
7
    *                                                                         *
8
    *    + New to FreeRTOS,                                                   *
9
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
10
    *    + Looking for basic training,                                        *
11
    *    + Wanting to improve your FreeRTOS skills and productivity           *
12
    *                                                                         *
13
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
14
    *                                                                         *
15
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
16
    *                  http://www.FreeRTOS.org/Documentation                  *
17
    *                                                                         *
18
    * A pdf reference manual is also available.  Both are usually delivered   *
19
    * to your inbox within 20 minutes to two hours when purchased between 8am *
20
    * and 8pm GMT (although please allow up to 24 hours in case of            *
21
    * exceptional circumstances).  Thank you for your support!                *
22
    *                                                                         *
23
    ***************************************************************************
24
 
25
    This file is part of the FreeRTOS distribution.
26
 
27
    FreeRTOS is free software; you can redistribute it and/or modify it under
28
    the terms of the GNU General Public License (version 2) as published by the
29
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
30
    ***NOTE*** The exception to the GPL is included to allow you to distribute
31
    a combined work that includes FreeRTOS without being obliged to provide the
32
    source code for proprietary components outside of the FreeRTOS kernel.
33
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
34
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
35
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
36
    more details. You should have received a copy of the GNU General Public
37
    License and the FreeRTOS license exception along with FreeRTOS; if not it
38
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
39
    by writing to Richard Barry, contact details for whom are available on the
40
    FreeRTOS WEB site.
41
 
42
    1 tab == 4 spaces!
43
 
44
    http://www.FreeRTOS.org - Documentation, latest information, license and
45
    contact details.
46
 
47
    http://www.SafeRTOS.com - A version that is certified for use in safety
48
    critical systems.
49
 
50
    http://www.OpenRTOS.com - Commercial support, development, porting,
51
    licensing and training services.
52
*/
53
 
54
 
55
/*-----------------------------------------------------------
56
 * Implementation of functions defined in portable.h for the ARM7 port.
57
 *
58
 * Components that can be compiled to either ARM or THUMB mode are
59
 * contained in this file.  The ISR routines, which can only be compiled
60
 * to ARM mode are contained in portISR.c.
61
 *----------------------------------------------------------*/
62
 
63
 
64
/* Standard includes. */
65
#include <stdlib.h>
66
 
67
/* Scheduler includes. */
68
#include "FreeRTOS.h"
69
#include "task.h"
70
 
71
/* Constants required to setup the task context. */
72
#define portINITIAL_SPSR                                ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
73
#define portTHUMB_MODE_BIT                              ( ( portSTACK_TYPE ) 0x20 )
74
#define portINSTRUCTION_SIZE                    ( ( portSTACK_TYPE ) 4 )
75
#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
76
 
77
/* Constants required to setup the tick ISR. */
78
#define portENABLE_TIMER                ( ( unsigned portCHAR ) 0x01 )
79
#define portPRESCALE_VALUE              0x00
80
#define portINTERRUPT_ON_MATCH          ( ( unsigned portLONG ) 0x01 )
81
#define portRESET_COUNT_ON_MATCH        ( ( unsigned portLONG ) 0x02 )
82
 
83
/* Constants required to setup the VIC for the tick ISR. */
84
#define portTIMER_VIC_CHANNEL           ( ( unsigned portLONG ) 0x0004 )
85
#define portTIMER_VIC_CHANNEL_BIT       ( ( unsigned portLONG ) 0x0010 )
86
#define portTIMER_VIC_ENABLE            ( ( unsigned portLONG ) 0x0020 )
87
 
88
/*-----------------------------------------------------------*/
89
 
90
/* Setup the timer to generate the tick interrupts. */
91
static void prvSetupTimerInterrupt( void );
92
 
93
/*
94
 * The scheduler can only be started from ARM mode, so
95
 * vPortISRStartFirstSTask() is defined in portISR.c.
96
 */
97
extern void vPortISRStartFirstTask( void );
98
 
99
/*-----------------------------------------------------------*/
100
 
101
/*
102
 * Initialise the stack of a task to look exactly as if a call to
103
 * portSAVE_CONTEXT had been called.
104
 *
105
 * See header file for description.
106
 */
107
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
108
{
109
portSTACK_TYPE *pxOriginalTOS;
110
 
111
        pxOriginalTOS = pxTopOfStack;
112
 
113
        /* Setup the initial stack of the task.  The stack is set exactly as
114
        expected by the portRESTORE_CONTEXT() macro. */
115
 
116
        /* First on the stack is the return address - which in this case is the
117
        start of the task.  The offset is added to make the return address appear
118
        as it would within an IRQ ISR. */
119
        *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
120
        pxTopOfStack--;
121
 
122
        *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;  /* R14 */
123
        pxTopOfStack--;
124
        *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
125
        pxTopOfStack--;
126
        *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212;  /* R12 */
127
        pxTopOfStack--;
128
        *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;  /* R11 */
129
        pxTopOfStack--;
130
        *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010;  /* R10 */
131
        pxTopOfStack--;
132
        *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909;  /* R9 */
133
        pxTopOfStack--;
134
        *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808;  /* R8 */
135
        pxTopOfStack--;
136
        *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707;  /* R7 */
137
        pxTopOfStack--;
138
        *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606;  /* R6 */
139
        pxTopOfStack--;
140
        *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505;  /* R5 */
141
        pxTopOfStack--;
142
        *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404;  /* R4 */
143
        pxTopOfStack--;
144
        *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303;  /* R3 */
145
        pxTopOfStack--;
146
        *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202;  /* R2 */
147
        pxTopOfStack--;
148
        *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101;  /* R1 */
149
        pxTopOfStack--;
150
 
151
        /* When the task starts is will expect to find the function parameter in
152
        R0. */
153
        *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
154
        pxTopOfStack--;
155
 
156
        /* The last thing onto the stack is the status register, which is set for
157
        system mode, with interrupts enabled. */
158
        *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
159
 
160
        if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )
161
        {
162
                /* We want the task to start in thumb mode. */
163
                *pxTopOfStack |= portTHUMB_MODE_BIT;
164
        }
165
 
166
        pxTopOfStack--;
167
 
168
        /* Some optimisation levels use the stack differently to others.  This
169
        means the interrupt flags cannot always be stored on the stack and will
170
        instead be stored in a variable, which is then saved as part of the
171
        tasks context. */
172
        *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
173
 
174
        return pxTopOfStack;
175
}
176
/*-----------------------------------------------------------*/
177
 
178
portBASE_TYPE xPortStartScheduler( void )
179
{
180
        /* Start the timer that generates the tick ISR.  Interrupts are disabled
181
        here already. */
182
        prvSetupTimerInterrupt();
183
 
184
        /* Start the first task. */
185
        vPortISRStartFirstTask();
186
 
187
        /* Should not get here! */
188
        return 0;
189
}
190
/*-----------------------------------------------------------*/
191
 
192
void vPortEndScheduler( void )
193
{
194
        /* It is unlikely that the ARM port will require this function as there
195
        is nothing to return to.  */
196
}
197
/*-----------------------------------------------------------*/
198
 
199
/*
200
 * Setup the timer 0 to generate the tick interrupts at the required frequency.
201
 */
202
static void prvSetupTimerInterrupt( void )
203
{
204
unsigned portLONG ulCompareMatch;
205
 
206
        PCLKSEL0 = (PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);
207
        T0TCR  = 2;         /* Stop and reset the timer */
208
        T0CTCR = 0;         /* Timer mode               */
209
 
210
        /* A 1ms tick does not require the use of the timer prescale.  This is
211
        defaulted to zero but can be used if necessary. */
212
        T0PR = portPRESCALE_VALUE;
213
 
214
        /* Calculate the match value required for our wanted tick rate. */
215
        ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
216
 
217
        /* Protect against divide by zero.  Using an if() statement still results
218
        in a warning - hence the #if. */
219
        #if portPRESCALE_VALUE != 0
220
        {
221
                ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
222
        }
223
        #endif
224
        T0MR1 = ulCompareMatch;
225
 
226
        /* Generate tick with timer 0 compare match. */
227
        T0MCR  = (3 << 3);  /* Reset timer on match and generate interrupt */
228
 
229
        /* Setup the VIC for the timer. */
230
        VICIntEnable = 0x00000010;
231
 
232
        /* The ISR installed depends on whether the preemptive or cooperative
233
        scheduler is being used. */
234
        #if configUSE_PREEMPTION == 1
235
        {
236
                extern void ( vPreemptiveTick )( void );
237
                VICVectAddr4 = ( portLONG ) vPreemptiveTick;
238
        }
239
        #else
240
        {
241
                extern void ( vNonPreemptiveTick )( void );
242
                VICVectAddr4 = ( portLONG ) vNonPreemptiveTick;
243
        }
244
        #endif
245
 
246
        VICVectCntl4 = 1;
247
 
248
        /* Start the timer - interrupts are disabled when this function is called
249
        so it is okay to do this here. */
250
        T0TCR = portENABLE_TIMER;
251
}
252
/*-----------------------------------------------------------*/
253
 
254
 
255
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.