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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [GCC/] [AVR32_UC3/] [port.c] - Blame information for rev 665

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1 572 jeremybenn
/*This file has been prepared for Doxygen automatic documentation generation.*/
2
/*! \file *********************************************************************
3
 *
4
 * \brief FreeRTOS port source for AVR32 UC3.
5
 *
6
 * - Compiler:           GNU GCC for AVR32
7
 * - Supported devices:  All AVR32 devices can be used.
8
 * - AppNote:
9
 *
10
 * \author               Atmel Corporation: http://www.atmel.com \n
11
 *                       Support and FAQ: http://support.atmel.no/
12
 *
13
 *****************************************************************************/
14
 
15
/*
16
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
17
 
18
    ***************************************************************************
19
    *                                                                         *
20
    * If you are:                                                             *
21
    *                                                                         *
22
    *    + New to FreeRTOS,                                                   *
23
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
24
    *    + Looking for basic training,                                        *
25
    *    + Wanting to improve your FreeRTOS skills and productivity           *
26
    *                                                                         *
27
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
28
    *                                                                         *
29
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
30
    *                  http://www.FreeRTOS.org/Documentation                  *
31
    *                                                                         *
32
    * A pdf reference manual is also available.  Both are usually delivered   *
33
    * to your inbox within 20 minutes to two hours when purchased between 8am *
34
    * and 8pm GMT (although please allow up to 24 hours in case of            *
35
    * exceptional circumstances).  Thank you for your support!                *
36
    *                                                                         *
37
    ***************************************************************************
38
 
39
    This file is part of the FreeRTOS distribution.
40
 
41
    FreeRTOS is free software; you can redistribute it and/or modify it under
42
    the terms of the GNU General Public License (version 2) as published by the
43
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
44
    ***NOTE*** The exception to the GPL is included to allow you to distribute
45
    a combined work that includes FreeRTOS without being obliged to provide the
46
    source code for proprietary components outside of the FreeRTOS kernel.
47
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
48
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
49
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
50
    more details. You should have received a copy of the GNU General Public
51
    License and the FreeRTOS license exception along with FreeRTOS; if not it
52
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
53
    by writing to Richard Barry, contact details for whom are available on the
54
    FreeRTOS WEB site.
55
 
56
    1 tab == 4 spaces!
57
 
58
    http://www.FreeRTOS.org - Documentation, latest information, license and
59
    contact details.
60
 
61
    http://www.SafeRTOS.com - A version that is certified for use in safety
62
    critical systems.
63
 
64
    http://www.OpenRTOS.com - Commercial support, development, porting,
65
    licensing and training services.
66
*/
67
 
68
 
69
/* Standard includes. */
70
#include <sys/cpu.h>
71
#include <sys/usart.h>
72
#include <malloc.h>
73
 
74
/* Scheduler includes. */
75
#include "FreeRTOS.h"
76
#include "task.h"
77
 
78
/* AVR32 UC3 includes. */
79
#include <avr32/io.h>
80
#include "gpio.h"
81
#if( configTICK_USE_TC==1 )
82
        #include "tc.h"
83
#endif
84
 
85
 
86
/* Constants required to setup the task context. */
87
#define portINITIAL_SR            ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
88
#define portINSTRUCTION_SIZE      ( ( portSTACK_TYPE ) 0 )
89
 
90
/* Each task maintains its own critical nesting variable. */
91
#define portNO_CRITICAL_NESTING   ( ( unsigned long ) 0 )
92
volatile unsigned long ulCriticalNesting = 9999UL;
93
 
94
#if( configTICK_USE_TC==0 )
95
        static void prvScheduleNextTick( void );
96
#else
97
        static void prvClearTcInt( void );
98
#endif
99
 
100
/* Setup the timer to generate the tick interrupts. */
101
static void prvSetupTimerInterrupt( void );
102
 
103
/*-----------------------------------------------------------*/
104
 
105
/*
106
 * Low-level initialization routine called during startup, before the main
107
 * function.
108
 * This version comes in replacement to the default one provided by Newlib.
109
 * Newlib's _init_startup only calls init_exceptions, but Newlib's exception
110
 * vectors are not compatible with the SCALL management in the current FreeRTOS
111
 * port. More low-level initializations are besides added here.
112
 */
113
void _init_startup(void)
114
{
115
        /* Import the Exception Vector Base Address. */
116
        extern void _evba;
117
 
118
        #if configHEAP_INIT
119
                extern void __heap_start__;
120
                extern void __heap_end__;
121
                portBASE_TYPE *pxMem;
122
        #endif
123
 
124
        /* Load the Exception Vector Base Address in the corresponding system register. */
125
        Set_system_register( AVR32_EVBA, ( int ) &_evba );
126
 
127
        /* Enable exceptions. */
128
        ENABLE_ALL_EXCEPTIONS();
129
 
130
        /* Initialize interrupt handling. */
131
        INTC_init_interrupts();
132
 
133
        #if configHEAP_INIT
134
 
135
                /* Initialize the heap used by malloc. */
136
                for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )
137
                {
138
                        *pxMem++ = 0xA5A5A5A5;
139
                }
140
 
141
        #endif
142
 
143
        /* Give the used CPU clock frequency to Newlib, so it can work properly. */
144
        set_cpu_hz( configCPU_CLOCK_HZ );
145
 
146
        /* Code section present if and only if the debug trace is activated. */
147
        #if configDBG
148
        {
149
                static const gpio_map_t DBG_USART_GPIO_MAP =
150
                {
151
                        { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
152
                        { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
153
                };
154
 
155
                /* Initialize the USART used for the debug trace with the configured parameters. */
156
                set_usart_base( ( void * ) configDBG_USART );
157
                gpio_enable_module( DBG_USART_GPIO_MAP,
158
                                    sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
159
                usart_init( configDBG_USART_BAUDRATE );
160
        }
161
        #endif
162
}
163
/*-----------------------------------------------------------*/
164
 
165
/*
166
 * malloc, realloc and free are meant to be called through respectively
167
 * pvPortMalloc, pvPortRealloc and vPortFree.
168
 * The latter functions call the former ones from within sections where tasks
169
 * are suspended, so the latter functions are task-safe. __malloc_lock and
170
 * __malloc_unlock use the same mechanism to also keep the former functions
171
 * task-safe as they may be called directly from Newlib's functions.
172
 * However, all these functions are interrupt-unsafe and SHALL THEREFORE NOT BE
173
 * CALLED FROM WITHIN AN INTERRUPT, because __malloc_lock and __malloc_unlock do
174
 * not call portENTER_CRITICAL and portEXIT_CRITICAL in order not to disable
175
 * interrupts during memory allocation management as this may be a very time-
176
 * consuming process.
177
 */
178
 
179
/*
180
 * Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
181
 * safe section as memory allocation management uses global data.
182
 * See the aforementioned details.
183
 */
184
void __malloc_lock(struct _reent *ptr)
185
{
186
        vTaskSuspendAll();
187
}
188
 
189
/*
190
 * Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
191
 * a safe section as memory allocation management uses global data.
192
 * See the aforementioned details.
193
 */
194
void __malloc_unlock(struct _reent *ptr)
195
{
196
        xTaskResumeAll();
197
}
198
/*-----------------------------------------------------------*/
199
 
200
/* Added as there is no such function in FreeRTOS. */
201
void *pvPortRealloc( void *pv, size_t xWantedSize )
202
{
203
void *pvReturn;
204
 
205
        vTaskSuspendAll();
206
        {
207
                pvReturn = realloc( pv, xWantedSize );
208
        }
209
        xTaskResumeAll();
210
 
211
        return pvReturn;
212
}
213
/*-----------------------------------------------------------*/
214
 
215
/* The cooperative scheduler requires a normal IRQ service routine to
216
simply increment the system tick. */
217
/* The preemptive scheduler is defined as "naked" as the full context is saved
218
on entry as part of the context switch. */
219
__attribute__((__naked__)) static void vTick( void )
220
{
221
        /* Save the context of the interrupted task. */
222
        portSAVE_CONTEXT_OS_INT();
223
 
224
        #if( configTICK_USE_TC==1 )
225
                /* Clear the interrupt flag. */
226
                prvClearTcInt();
227
        #else
228
                /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
229
                clock cycles from now. */
230
                prvScheduleNextTick();
231
        #endif
232
 
233
        /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
234
        calls in a critical section . */
235
        portENTER_CRITICAL();
236
                vTaskIncrementTick();
237
        portEXIT_CRITICAL();
238
 
239
        /* Restore the context of the "elected task". */
240
        portRESTORE_CONTEXT_OS_INT();
241
}
242
/*-----------------------------------------------------------*/
243
 
244
__attribute__((__naked__)) void SCALLYield( void )
245
{
246
        /* Save the context of the interrupted task. */
247
        portSAVE_CONTEXT_SCALL();
248
        vTaskSwitchContext();
249
        portRESTORE_CONTEXT_SCALL();
250
}
251
/*-----------------------------------------------------------*/
252
 
253
/* The code generated by the GCC compiler uses the stack in different ways at
254
different optimisation levels.  The interrupt flags can therefore not always
255
be saved to the stack.  Instead the critical section nesting level is stored
256
in a variable, which is then saved as part of the stack context. */
257
__attribute__((__noinline__)) void vPortEnterCritical( void )
258
{
259
        /* Disable interrupts */
260
        portDISABLE_INTERRUPTS();
261
 
262
        /* Now interrupts are disabled ulCriticalNesting can be accessed
263
         directly.  Increment ulCriticalNesting to keep a count of how many times
264
         portENTER_CRITICAL() has been called. */
265
        ulCriticalNesting++;
266
}
267
/*-----------------------------------------------------------*/
268
 
269
__attribute__((__noinline__)) void vPortExitCritical( void )
270
{
271
        if(ulCriticalNesting > portNO_CRITICAL_NESTING)
272
        {
273
                ulCriticalNesting--;
274
                if( ulCriticalNesting == portNO_CRITICAL_NESTING )
275
                {
276
                        /* Enable all interrupt/exception. */
277
                        portENABLE_INTERRUPTS();
278
                }
279
        }
280
}
281
/*-----------------------------------------------------------*/
282
 
283
/*
284
 * Initialise the stack of a task to look exactly as if a call to
285
 * portSAVE_CONTEXT had been called.
286
 *
287
 * See header file for description.
288
 */
289
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
290
{
291
        /* Setup the initial stack of the task.  The stack is set exactly as
292
        expected by the portRESTORE_CONTEXT() macro. */
293
 
294
        /* When the task starts, it will expect to find the function parameter in R12. */
295
        pxTopOfStack--;
296
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808;                                        /* R8 */
297
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909;                                        /* R9 */
298
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A;                                        /* R10 */
299
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B;                                        /* R11 */
300
        *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters;                                      /* R12 */
301
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF;                                        /* R14/LR */
302
        *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
303
        *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR;                            /* SR */
304
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF;                                        /* R0 */
305
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101;                                        /* R1 */
306
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202;                                        /* R2 */
307
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303;                                        /* R3 */
308
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404;                                        /* R4 */
309
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505;                                        /* R5 */
310
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606;                                        /* R6 */
311
        *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707;                                        /* R7 */
312
        *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING;                     /* ulCriticalNesting */
313
 
314
        return pxTopOfStack;
315
}
316
/*-----------------------------------------------------------*/
317
 
318
portBASE_TYPE xPortStartScheduler( void )
319
{
320
        /* Start the timer that generates the tick ISR.  Interrupts are disabled
321
        here already. */
322
        prvSetupTimerInterrupt();
323
 
324
        /* Start the first task. */
325
        portRESTORE_CONTEXT();
326
 
327
        /* Should not get here! */
328
        return 0;
329
}
330
/*-----------------------------------------------------------*/
331
 
332
void vPortEndScheduler( void )
333
{
334
        /* It is unlikely that the AVR32 port will require this function as there
335
        is nothing to return to.  */
336
}
337
/*-----------------------------------------------------------*/
338
 
339
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
340
clock cycles from now. */
341
#if( configTICK_USE_TC==0 )
342
        static void prvScheduleFirstTick(void)
343
        {
344
                unsigned long lCycles;
345
 
346
                lCycles = Get_system_register(AVR32_COUNT);
347
                lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
348
                // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
349
                // generation feature does not get disabled.
350
                if(0 == lCycles)
351
                {
352
                        lCycles++;
353
                }
354
                Set_system_register(AVR32_COMPARE, lCycles);
355
        }
356
 
357
        __attribute__((__noinline__)) static void prvScheduleNextTick(void)
358
        {
359
                unsigned long lCycles, lCount;
360
 
361
                lCycles = Get_system_register(AVR32_COMPARE);
362
                lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
363
                // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
364
                // generation feature does not get disabled.
365
                if(0 == lCycles)
366
                {
367
                        lCycles++;
368
                }
369
                lCount = Get_system_register(AVR32_COUNT);
370
                if( lCycles < lCount )
371
                {               // We missed a tick, recover for the next.
372
                        lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
373
                }
374
                Set_system_register(AVR32_COMPARE, lCycles);
375
        }
376
#else
377
        __attribute__((__noinline__)) static void prvClearTcInt(void)
378
        {
379
                AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
380
        }
381
#endif
382
/*-----------------------------------------------------------*/
383
 
384
/* Setup the timer to generate the tick interrupts. */
385
static void prvSetupTimerInterrupt(void)
386
{
387
#if( configTICK_USE_TC==1 )
388
 
389
        volatile avr32_tc_t *tc = &AVR32_TC;
390
 
391
        // Options for waveform genration.
392
        tc_waveform_opt_t waveform_opt =
393
        {
394
        .channel  = configTICK_TC_CHANNEL,             /* Channel selection. */
395
 
396
        .bswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOB. */
397
        .beevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOB. */
398
        .bcpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOB. */
399
        .bcpb     = TC_EVT_EFFECT_NOOP,                /* RB compare effect on TIOB. */
400
 
401
        .aswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOA. */
402
        .aeevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOA. */
403
        .acpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOA: toggle. */
404
        .acpa     = TC_EVT_EFFECT_NOOP,                /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
405
 
406
        .wavsel   = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
407
        .enetrg   = FALSE,                             /* External event trigger enable. */
408
        .eevt     = 0,                                 /* External event selection. */
409
        .eevtedg  = TC_SEL_NO_EDGE,                    /* External event edge selection. */
410
        .cpcdis   = FALSE,                             /* Counter disable when RC compare. */
411
        .cpcstop  = FALSE,                             /* Counter clock stopped with RC compare. */
412
 
413
        .burst    = FALSE,                             /* Burst signal selection. */
414
        .clki     = FALSE,                             /* Clock inversion. */
415
        .tcclks   = TC_CLOCK_SOURCE_TC2                /* Internal source clock 2. */
416
        };
417
 
418
        tc_interrupt_t tc_interrupt =
419
        {
420
                .etrgs=0,
421
                .ldrbs=0,
422
                .ldras=0,
423
                .cpcs =1,
424
                .cpbs =0,
425
                .cpas =0,
426
                .lovrs=0,
427
                .covfs=0,
428
        };
429
 
430
#endif
431
 
432
        /* Disable all interrupt/exception. */
433
        portDISABLE_INTERRUPTS();
434
 
435
        /* Register the compare interrupt handler to the interrupt controller and
436
        enable the compare interrupt. */
437
 
438
        #if( configTICK_USE_TC==1 )
439
        {
440
                INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
441
 
442
                /* Initialize the timer/counter. */
443
                tc_init_waveform(tc, &waveform_opt);
444
 
445
                /* Set the compare triggers.
446
                Remember TC counter is 16-bits, so counting second is not possible!
447
                That's why we configure it to count ms. */
448
                tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
449
 
450
                tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
451
 
452
                /* Start the timer/counter. */
453
                tc_start(tc, configTICK_TC_CHANNEL);
454
        }
455
        #else
456
        {
457
                INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
458
                prvScheduleFirstTick();
459
        }
460
        #endif
461
}

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