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jeremybenn |
/*
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FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS books - available as PDF or paperback *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the SH2A port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Library includes. */
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#include "string.h"
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/* Hardware specifics. */
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#include "iodefine.h"
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/*-----------------------------------------------------------*/
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )
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/* These macros allow a critical section to be added around the call to
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vTaskIncrementTick(), which is only ever called from interrupts at the kernel
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priority - ie a known priority. Therefore these local macros are a slight
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optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
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which would require the old IPL to be read first and stored in a local variable. */
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#define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
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#define portENABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
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/*-----------------------------------------------------------*/
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/*
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* Function to start the first task executing - written in asm code as direct
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* access to registers is required.
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*/
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static void prvStartFirstTask( void ) __attribute__((naked));
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/*
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* Software interrupt handler. Performs the actual context switch (saving and
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* restoring of registers). Written in asm code as direct register access is
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* required.
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*/
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void vSoftwareInterruptISR( void ) __attribute__((naked));
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/*
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* The tick interrupt handler.
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*/
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void vTickISR( void ) __attribute__((interrupt));
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/*-----------------------------------------------------------*/
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extern void *pxCurrentTCB;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* R0 is not included as it is the stack pointer. */
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*pxTopOfStack = 0xdeadbeef;
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_PSW;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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/* When debugging it can be useful if every register is set to a known
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value. Otherwise code space can be saved by just setting the registers
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that need to be set. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack--;
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*pxTopOfStack = 0xffffffff; /* r15. */
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pxTopOfStack--;
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*pxTopOfStack = 0xeeeeeeee;
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pxTopOfStack--;
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*pxTopOfStack = 0xdddddddd;
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pxTopOfStack--;
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*pxTopOfStack = 0xcccccccc;
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pxTopOfStack--;
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*pxTopOfStack = 0xbbbbbbbb;
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pxTopOfStack--;
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*pxTopOfStack = 0xaaaaaaaa;
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pxTopOfStack--;
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*pxTopOfStack = 0x99999999;
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pxTopOfStack--;
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*pxTopOfStack = 0x88888888;
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pxTopOfStack--;
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*pxTopOfStack = 0x77777777;
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pxTopOfStack--;
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*pxTopOfStack = 0x66666666;
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pxTopOfStack--;
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*pxTopOfStack = 0x55555555;
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pxTopOfStack--;
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*pxTopOfStack = 0x44444444;
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pxTopOfStack--;
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*pxTopOfStack = 0x33333333;
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pxTopOfStack--;
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*pxTopOfStack = 0x22222222;
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pxTopOfStack--;
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}
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#else
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{
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pxTopOfStack -= 15;
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}
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#endif
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_FPSW;
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pxTopOfStack--;
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*pxTopOfStack = 0x12345678; /* Accumulator. */
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pxTopOfStack--;
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*pxTopOfStack = 0x87654321; /* Accumulator. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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extern void vApplicationSetupTimerInterrupt( void );
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/* Use pxCurrentTCB just so it does not get optimised away. */
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if( pxCurrentTCB != NULL )
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{
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/* Call an application function to set up the timer that will generate the
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tick interrupt. This way the application can decide which peripheral to
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use. A demo application is provided to show a suitable example. */
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vApplicationSetupTimerInterrupt();
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/* Enable the software interrupt. */
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_IEN( _ICU_SWINT ) = 1;
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/* Ensure the software interrupt is clear. */
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_IR( _ICU_SWINT ) = 0;
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/* Ensure the software interrupt is set to the kernel priority. */
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_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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/* Start the first task. */
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prvStartFirstTask();
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}
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/* Should not get here. */
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return pdFAIL;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented as there is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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static void prvStartFirstTask( void )
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{
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__asm volatile
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(
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/* When starting the scheduler there is nothing that needs moving to the
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interrupt stack because the function is not called from an interrupt.
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Just ensure the current stack is the user stack. */
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"SETPSW U \n" \
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/* Obtain the location of the stack associated with which ever task
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pxCurrentTCB is currently pointing to. */
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"MOV.L #_pxCurrentTCB, R15 \n" \
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"MOV.L [R15], R15 \n" \
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"MOV.L [R15], R0 \n" \
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/* Restore the registers from the stack of the task pointed to by
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pxCurrentTCB. */
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"POP R15 \n" \
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/* Accumulator low 32 bits. */
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"MVTACLO R15 \n" \
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"POP R15 \n" \
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/* Accumulator high 32 bits. */
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"MVTACHI R15 \n" \
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"POP R15 \n" \
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/* Floating point status word. */
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"MVTC R15, FPSW \n" \
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/* R1 to R15 - R0 is not included as it is the SP. */
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"POPM R1-R15 \n" \
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/* This pops the remaining registers. */
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"RTE \n" \
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"NOP \n" \
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"NOP \n"
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);
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}
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/*-----------------------------------------------------------*/
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void vSoftwareInterruptISR( void )
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{
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__asm volatile
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(
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/* Re-enable interrupts. */
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"SETPSW I \n" \
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/* Move the data that was automatically pushed onto the interrupt stack when
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the interrupt occurred from the interrupt stack to the user stack.
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R15 is saved before it is clobbered. */
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"PUSH.L R15 \n" \
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/* Read the user stack pointer. */
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"MVFC USP, R15 \n" \
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/* Move the address down to the data being moved. */
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"SUB #12, R15 \n" \
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"MVTC R15, USP \n" \
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/* Copy the data across, R15, then PC, then PSW. */
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"MOV.L [ R0 ], [ R15 ] \n" \
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"MOV.L 4[ R0 ], 4[ R15 ] \n" \
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"MOV.L 8[ R0 ], 8[ R15 ] \n" \
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/* Move the interrupt stack pointer to its new correct position. */
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"ADD #12, R0 \n" \
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/* All the rest of the registers are saved directly to the user stack. */
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"SETPSW U \n" \
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/* Save the rest of the general registers (R15 has been saved already). */
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"PUSHM R1-R14 \n" \
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/* Save the FPSW and accumulator. */
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"MVFC FPSW, R15 \n" \
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"PUSH.L R15 \n" \
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"MVFACHI R15 \n" \
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"PUSH.L R15 \n" \
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/* Middle word. */
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"MVFACMI R15 \n" \
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/* Shifted left as it is restored to the low order word. */
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"SHLL #16, R15 \n" \
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"PUSH.L R15 \n" \
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/* Save the stack pointer to the TCB. */
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"MOV.L #_pxCurrentTCB, R15 \n" \
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"MOV.L [ R15 ], R15 \n" \
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"MOV.L R0, [ R15 ] \n" \
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/* Ensure the interrupt mask is set to the syscall priority while the kernel
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| 305 |
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structures are being accessed. */
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| 306 |
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"MVTIPL %0 \n" \
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/* Select the next task to run. */
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"BSR.A _vTaskSwitchContext \n" \
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| 311 |
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/* Reset the interrupt mask as no more data structure access is required. */
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"MVTIPL %1 \n" \
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/* Load the stack pointer of the task that is now selected as the Running
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| 315 |
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state task from its TCB. */
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"MOV.L #_pxCurrentTCB,R15 \n" \
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"MOV.L [ R15 ], R15 \n" \
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"MOV.L [ R15 ], R0 \n" \
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| 320 |
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/* Restore the context of the new task. The PSW (Program Status Word) and
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PC will be popped by the RTE instruction. */
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"POP R15 \n" \
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"MVTACLO R15 \n" \
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| 324 |
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"POP R15 \n" \
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| 325 |
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"MVTACHI R15 \n" \
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| 326 |
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"POP R15 \n" \
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| 327 |
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"MVTC R15, FPSW \n" \
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| 328 |
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"POPM R1-R15 \n" \
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| 329 |
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"RTE \n" \
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| 330 |
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"NOP \n" \
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| 331 |
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"NOP "
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:: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)
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| 333 |
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);
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| 334 |
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}
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| 335 |
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|
/*-----------------------------------------------------------*/
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| 336 |
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|
| 337 |
|
|
void vTickISR( void )
|
| 338 |
|
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{
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| 339 |
|
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/* Re-enabled interrupts. */
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| 340 |
|
|
__asm volatile( "SETPSW I" );
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| 341 |
|
|
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| 342 |
|
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/* Increment the tick, and perform any processing the new tick value
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| 343 |
|
|
necessitates. Ensure IPL is at the max syscall value first. */
|
| 344 |
|
|
portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();
|
| 345 |
|
|
{
|
| 346 |
|
|
vTaskIncrementTick();
|
| 347 |
|
|
}
|
| 348 |
|
|
portENABLE_INTERRUPTS_FROM_KERNEL_ISR();
|
| 349 |
|
|
|
| 350 |
|
|
/* Only select a new task if the preemptive scheduler is being used. */
|
| 351 |
|
|
#if( configUSE_PREEMPTION == 1 )
|
| 352 |
|
|
taskYIELD();
|
| 353 |
|
|
#endif
|
| 354 |
|
|
}
|
| 355 |
|
|
/*-----------------------------------------------------------*/
|
| 356 |
|
|
|
| 357 |
|
|
unsigned long ulPortGetIPL( void )
|
| 358 |
|
|
{
|
| 359 |
|
|
__asm volatile
|
| 360 |
|
|
(
|
| 361 |
|
|
"MVFC PSW, R1 \n" \
|
| 362 |
|
|
"SHLR #24, R1 \n" \
|
| 363 |
|
|
"RTS "
|
| 364 |
|
|
);
|
| 365 |
|
|
|
| 366 |
|
|
/* This will never get executed, but keeps the compiler from complaining. */
|
| 367 |
|
|
return 0;
|
| 368 |
|
|
}
|
| 369 |
|
|
/*-----------------------------------------------------------*/
|
| 370 |
|
|
|
| 371 |
|
|
void vPortSetIPL( unsigned long ulNewIPL )
|
| 372 |
|
|
{
|
| 373 |
|
|
__asm volatile
|
| 374 |
|
|
(
|
| 375 |
|
|
"PUSH R5 \n" \
|
| 376 |
|
|
"MVFC PSW, R5 \n" \
|
| 377 |
|
|
"SHLL #24, R1 \n" \
|
| 378 |
|
|
"AND #-0F000001H, R5 \n" \
|
| 379 |
|
|
"OR R1, R5 \n" \
|
| 380 |
|
|
"MVTC R5, PSW \n" \
|
| 381 |
|
|
"POP R5 \n" \
|
| 382 |
|
|
"RTS "
|
| 383 |
|
|
);
|
| 384 |
|
|
}
|
