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1 572 jeremybenn
/*This file is prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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 *
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 * \brief Exception and interrupt vectors.
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 *
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 * This file maps all events supported by an AVR32UC.
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 *
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 * - Compiler:           IAR EWAVR32
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 * - Supported devices:  All AVR32UC devices with an INTC module can be used.
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 * - AppNote:
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 *
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 * \author               Atmel Corporation: http://www.atmel.com \n
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 *                       Support and FAQ: http://support.atmel.no/
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 *
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 ******************************************************************************/
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/* Copyright (c) 2007, Atmel Corporation All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *
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 * 1. Redistributions of source code must retain the above copyright notice,
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 * this list of conditions and the following disclaimer.
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 *
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 * 2. Redistributions in binary form must reproduce the above copyright notice,
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 * this list of conditions and the following disclaimer in the documentation
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 * and/or other materials provided with the distribution.
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 *
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 * 3. The name of ATMEL may not be used to endorse or promote products derived
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 * from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include 
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#include "intc.h"
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//! @{
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//! \verbatim
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// Start of Exception Vector Table.
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  // EVBA must be aligned with a power of two strictly greater than the EVBA-
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  // relative offset of the last vector.
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  COMMON  EVTAB:CODE:ROOT(9)
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  // Force EVBA initialization.
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  EXTERN  ??init_EVBA
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  REQUIRE ??init_EVBA
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  // Export symbol.
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  PUBLIC  ??EVBA
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  PUBLIC  _evba
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??EVBA:
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_evba:
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        ORG 0x000
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        // Unrecoverable Exception.
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_handle_Unrecoverable_Exception:
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        rjmp $
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        ORG 0x004
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        // TLB Multiple Hit: UNUSED IN AVR32UC.
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_handle_TLB_Multiple_Hit:
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        rjmp $
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        ORG 0x008
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        // Bus Error Data Fetch.
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_handle_Bus_Error_Data_Fetch:
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        rjmp $
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        ORG 0x00C
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         // Bus Error Instruction Fetch.
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_handle_Bus_Error_Instruction_Fetch:
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        rjmp $
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        ORG 0x010
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        // NMI.
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_handle_NMI:
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        rjmp $
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        ORG 0x014
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        // Instruction Address.
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_handle_Instruction_Address:
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        rjmp $
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        ORG 0x018
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        // ITLB Protection.
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_handle_ITLB_Protection:
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        rjmp $
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        ORG 0x01C
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        // Breakpoint.
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_handle_Breakpoint:
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        rjmp $
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        ORG 0x020
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        // Illegal Opcode.
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_handle_Illegal_Opcode:
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        rjmp $
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        ORG 0x024
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        // Unimplemented Instruction.
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_handle_Unimplemented_Instruction:
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        rjmp $
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        ORG 0x028
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        // Privilege Violation.
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_handle_Privilege_Violation:
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        rjmp $
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        ORG 0x02C
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        // Floating-Point: UNUSED IN AVR32UC.
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_handle_Floating_Point:
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        rjmp $
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        ORG 0x030
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        // Coprocessor Absent: UNUSED IN AVR32UC.
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_handle_Coprocessor_Absent:
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        rjmp $
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        ORG 0x034
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        // Data Address (Read).
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_handle_Data_Address_Read:
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        rjmp $
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        ORG 0x038
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        // Data Address (Write).
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_handle_Data_Address_Write:
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        rjmp $
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        ORG 0x03C
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        // DTLB Protection (Read).
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_handle_DTLB_Protection_Read:
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        rjmp $
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        ORG 0x040
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        // DTLB Protection (Write).
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_handle_DTLB_Protection_Write:
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        rjmp $
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        ORG 0x044
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        // DTLB Modified: UNUSED IN AVR32UC.
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_handle_DTLB_Modified:
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        rjmp $
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        ORG 0x050
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        // ITLB Miss: UNUSED IN AVR32UC.
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_handle_ITLB_Miss:
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        rjmp $
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        ORG 0x060
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        // DTLB Miss (Read): UNUSED IN AVR32UC.
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_handle_DTLB_Miss_Read:
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        rjmp $
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        ORG 0x070
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        // DTLB Miss (Write): UNUSED IN AVR32UC.
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_handle_DTLB_Miss_Write:
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        rjmp $
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        ORG 0x100
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        // Supervisor Call.
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_handle_Supervisor_Call:
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        lddpc   pc, __SCALLYield
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// Interrupt support.
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// The interrupt controller must provide the offset address relative to EVBA.
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// Important note:
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//   All interrupts call a C function named _get_interrupt_handler.
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//   This function will read group and interrupt line number to then return in
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//   R12 a pointer to a user-provided interrupt handler.
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  ALIGN 2
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_int0:
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  // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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  // CPU upon interrupt entry.
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#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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  mfsr    r12, AVR32_SR
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  bfextu  r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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  cp.w    r12, 110b
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  brlo    _int0_normal
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  lddsp   r12, sp[0 * 4]
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  stdsp   sp[6 * 4], r12
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  lddsp   r12, sp[1 * 4]
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  stdsp   sp[7 * 4], r12
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  lddsp   r12, sp[3 * 4]
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  sub     sp, -6 * 4
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  rete
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_int0_normal:
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#endif
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  mov     r12, 0  // Pass the int_lev parameter to the _get_interrupt_handler function.
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  mcall   __get_interrupt_handler
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  cp.w    r12, 0  // Get the pointer to the interrupt handler returned by the function.
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  movne   pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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  rete            // If this was a spurious interrupt (R12 == NULL), return from event handler.
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_int1:
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  // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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  // CPU upon interrupt entry.
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#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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  mfsr    r12, AVR32_SR
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  bfextu  r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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  cp.w    r12, 110b
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  brlo    _int1_normal
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  lddsp   r12, sp[0 * 4]
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  stdsp   sp[6 * 4], r12
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  lddsp   r12, sp[1 * 4]
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  stdsp   sp[7 * 4], r12
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  lddsp   r12, sp[3 * 4]
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  sub     sp, -6 * 4
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  rete
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_int1_normal:
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#endif
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  mov     r12, 1  // Pass the int_lev parameter to the _get_interrupt_handler function.
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  mcall   __get_interrupt_handler
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  cp.w    r12, 0  // Get the pointer to the interrupt handler returned by the function.
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  movne   pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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  rete            // If this was a spurious interrupt (R12 == NULL), return from event handler.
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_int2:
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  // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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  // CPU upon interrupt entry.
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#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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  mfsr    r12, AVR32_SR
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  bfextu  r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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  cp.w    r12, 110b
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  brlo    _int2_normal
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  lddsp   r12, sp[0 * 4]
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  stdsp   sp[6 * 4], r12
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  lddsp   r12, sp[1 * 4]
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  stdsp   sp[7 * 4], r12
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  lddsp   r12, sp[3 * 4]
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  sub     sp, -6 * 4
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  rete
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_int2_normal:
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#endif
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  mov     r12, 2  // Pass the int_lev parameter to the _get_interrupt_handler function.
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  mcall   __get_interrupt_handler
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  cp.w    r12, 0  // Get the pointer to the interrupt handler returned by the function.
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  movne   pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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  rete            // If this was a spurious interrupt (R12 == NULL), return from event handler.
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_int3:
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  // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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  // CPU upon interrupt entry.
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#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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  mfsr    r12, AVR32_SR
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  bfextu  r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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  cp.w    r12, 110b
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  brlo    _int3_normal
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  lddsp   r12, sp[0 * 4]
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  stdsp   sp[6 * 4], r12
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  lddsp   r12, sp[1 * 4]
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  stdsp   sp[7 * 4], r12
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  lddsp   r12, sp[3 * 4]
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  sub     sp, -6 * 4
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  rete
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_int3_normal:
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#endif
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  mov     r12, 3  // Pass the int_lev parameter to the _get_interrupt_handler function.
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  mcall   __get_interrupt_handler
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  cp.w    r12, 0  // Get the pointer to the interrupt handler returned by the function.
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  movne   pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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  rete            // If this was a spurious interrupt (R12 == NULL), return from event handler.
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// Constant data area.
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285
  ALIGN 2
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  // Import symbols.
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  EXTERN  SCALLYield
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  EXTERN  _get_interrupt_handler
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__SCALLYield:
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  DC32  SCALLYield
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__get_interrupt_handler:
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  DC32  _get_interrupt_handler
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  // Values to store in the interrupt priority registers for the various interrupt priority levels.
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  // The interrupt priority registers contain the interrupt priority level and
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  // the EVBA-relative interrupt vector offset.
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  PUBLIC  ipr_val
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ipr_val:
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  DC32  (INT0 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int0 - _evba),\
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        (INT1 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int1 - _evba),\
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        (INT2 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int2 - _evba),\
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        (INT3 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int3 - _evba)
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  END
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//! \endverbatim
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//! @}

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