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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [IAR/] [AtmelSAM7S64/] [port.c] - Blame information for rev 572

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1 572 jeremybenn
/*
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    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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    ***************************************************************************
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    *                                                                         *
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    * If you are:                                                             *
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    *                                                                         *
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    *    + New to FreeRTOS,                                                   *
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    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
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    *    + Looking for basic training,                                        *
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    *    + Wanting to improve your FreeRTOS skills and productivity           *
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    *                                                                         *
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    * then take a look at the FreeRTOS books - available as PDF or paperback  *
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    *                                                                         *
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    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
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    *                  http://www.FreeRTOS.org/Documentation                  *
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    *                                                                         *
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    * A pdf reference manual is also available.  Both are usually delivered   *
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    * to your inbox within 20 minutes to two hours when purchased between 8am *
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    * and 8pm GMT (although please allow up to 24 hours in case of            *
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    * exceptional circumstances).  Thank you for your support!                *
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    *                                                                         *
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    ***************************************************************************
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    This file is part of the FreeRTOS distribution.
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    FreeRTOS is free software; you can redistribute it and/or modify it under
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    the terms of the GNU General Public License (version 2) as published by the
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    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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    ***NOTE*** The exception to the GPL is included to allow you to distribute
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    a combined work that includes FreeRTOS without being obliged to provide the
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    source code for proprietary components outside of the FreeRTOS kernel.
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    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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    more details. You should have received a copy of the GNU General Public
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    License and the FreeRTOS license exception along with FreeRTOS; if not it
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    can be viewed here: http://www.freertos.org/a00114.html and also obtained
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    by writing to Richard Barry, contact details for whom are available on the
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    FreeRTOS WEB site.
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    1 tab == 4 spaces!
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    http://www.FreeRTOS.org - Documentation, latest information, license and
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    contact details.
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    http://www.SafeRTOS.com - A version that is certified for use in safety
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    critical systems.
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    http://www.OpenRTOS.com - Commercial support, development, porting,
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    licensing and training services.
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*/
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/*-----------------------------------------------------------
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 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
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 *----------------------------------------------------------*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup the initial stack. */
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#define portINITIAL_SPSR                                ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT                              ( ( portSTACK_TYPE ) 0x20 )
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#define portINSTRUCTION_SIZE                    ( ( portSTACK_TYPE ) 4 )
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/* Constants required to setup the PIT. */
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#define portPIT_CLOCK_DIVISOR                   ( ( unsigned long ) 16 )
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#define portPIT_COUNTER_VALUE                   ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING                 ( ( unsigned long ) 0 )
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#define portINT_LEVEL_SENSITIVE  0
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#define portPIT_ENABLE          ( ( unsigned short ) 0x1 << 24 )
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#define portPIT_INT_ENABLE      ( ( unsigned short ) 0x1 << 25 )
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/*-----------------------------------------------------------*/
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/* Setup the PIT to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/* ulCriticalNesting will get set to zero when the first task starts.  It
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cannot be initialised to 0 as this will cause interrupts to be enabled
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during the kernel initialisation process. */
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unsigned long ulCriticalNesting = ( unsigned long ) 9999;
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/*-----------------------------------------------------------*/
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/*
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 * Initialise the stack of a task to look exactly as if a call to
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 * portSAVE_CONTEXT had been called.
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 *
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 * See header file for description.
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 */
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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portSTACK_TYPE *pxOriginalTOS;
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        pxOriginalTOS = pxTopOfStack;
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        /* Setup the initial stack of the task.  The stack is set exactly as
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        expected by the portRESTORE_CONTEXT() macro. */
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        /* First on the stack is the return address - which in this case is the
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        start of the task.  The offset is added to make the return address appear
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        as it would within an IRQ ISR. */
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        *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa;  /* R14 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212;  /* R12 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;  /* R11 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010;  /* R10 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909;  /* R9 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808;  /* R8 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707;  /* R7 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606;  /* R6 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505;  /* R5 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404;  /* R4 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303;  /* R3 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202;  /* R2 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101;  /* R1 */
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        pxTopOfStack--;
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        /* When the task starts is will expect to find the function parameter in
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        R0. */
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        *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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        pxTopOfStack--;
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        /* The status register is set for system mode, with interrupts enabled. */
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        *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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        if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )
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        {
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                /* We want the task to start in thumb mode. */
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                *pxTopOfStack |= portTHUMB_MODE_BIT;
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        }
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        pxTopOfStack--;
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        /* Interrupt flags cannot always be stored on the stack and will
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        instead be stored in a variable, which is then saved as part of the
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        tasks context. */
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        *pxTopOfStack = portNO_CRITICAL_NESTING;
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        return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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extern void vPortStartFirstTask( void );
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        /* Start the timer that generates the tick ISR.  Interrupts are disabled
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        here already. */
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        prvSetupTimerInterrupt();
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        /* Start the first task. */
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        vPortStartFirstTask();
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        /* Should not get here! */
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        return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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        /* It is unlikely that the ARM port will require this function as there
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        is nothing to return to.  */
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}
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/*-----------------------------------------------------------*/
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#if configUSE_PREEMPTION == 0
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        /* The cooperative scheduler requires a normal IRQ service routine to
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        simply increment the system tick. */
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        static __arm __irq void vPortNonPreemptiveTick( void );
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        static __arm __irq void vPortNonPreemptiveTick( void )
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        {
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                unsigned long ulDummy;
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                /* Increment the tick count - which may wake some tasks but as the
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                preemptive scheduler is not being used any woken task is not given
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                processor time no matter what its priority. */
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                vTaskIncrementTick();
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                /* Clear the PIT interrupt. */
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                ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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                /* End the interrupt in the AIC. */
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                AT91C_BASE_AIC->AIC_EOICR = ulDummy;
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        }
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#else
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        /* Currently the IAR port requires the preemptive tick function to be
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        defined in an asm file. */
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#endif
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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AT91PS_PITC pxPIT = AT91C_BASE_PITC;
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        /* Setup the AIC for PIT interrupts.  The interrupt routine chosen depends
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        on whether the preemptive or cooperative scheduler is being used. */
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        #if configUSE_PREEMPTION == 0
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                AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortNonPreemptiveTick );
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        #else
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                extern void ( vPortPreemptiveTick )( void );
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                AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortPreemptiveTick );
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        #endif
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        /* Configure the PIT period. */
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        pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
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        /* Enable the interrupt.  Global interrupts are disables at this point so
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        this is safe. */
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        AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_SYS );
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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        /* Disable interrupts first! */
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        __disable_interrupt();
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        /* Now interrupts are disabled ulCriticalNesting can be accessed
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        directly.  Increment ulCriticalNesting to keep a count of how many times
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        portENTER_CRITICAL() has been called. */
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        ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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        if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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        {
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                /* Decrement the nesting count as we are leaving a critical section. */
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                ulCriticalNesting--;
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                /* If the nesting level has reached zero then interrupts should be
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                re-enabled. */
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                if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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                {
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                        __enable_interrupt();
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                }
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        }
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}
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/*-----------------------------------------------------------*/
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