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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [IAR/] [LPC2000/] [port.c] - Blame information for rev 572

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1 572 jeremybenn
/*
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    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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    ***************************************************************************
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    *                                                                         *
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    * If you are:                                                             *
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    *                                                                         *
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    *    + New to FreeRTOS,                                                   *
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    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
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    *    + Looking for basic training,                                        *
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    *    + Wanting to improve your FreeRTOS skills and productivity           *
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    *                                                                         *
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    * then take a look at the FreeRTOS books - available as PDF or paperback  *
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    *                                                                         *
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    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
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    *                  http://www.FreeRTOS.org/Documentation                  *
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    *                                                                         *
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    * A pdf reference manual is also available.  Both are usually delivered   *
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    * to your inbox within 20 minutes to two hours when purchased between 8am *
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    * and 8pm GMT (although please allow up to 24 hours in case of            *
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    * exceptional circumstances).  Thank you for your support!                *
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    *                                                                         *
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    ***************************************************************************
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    This file is part of the FreeRTOS distribution.
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    FreeRTOS is free software; you can redistribute it and/or modify it under
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    the terms of the GNU General Public License (version 2) as published by the
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    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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    ***NOTE*** The exception to the GPL is included to allow you to distribute
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    a combined work that includes FreeRTOS without being obliged to provide the
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    source code for proprietary components outside of the FreeRTOS kernel.
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    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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    more details. You should have received a copy of the GNU General Public
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    License and the FreeRTOS license exception along with FreeRTOS; if not it
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    can be viewed here: http://www.freertos.org/a00114.html and also obtained
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    by writing to Richard Barry, contact details for whom are available on the
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    FreeRTOS WEB site.
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    1 tab == 4 spaces!
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    http://www.FreeRTOS.org - Documentation, latest information, license and
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    contact details.
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    http://www.SafeRTOS.com - A version that is certified for use in safety
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    critical systems.
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    http://www.OpenRTOS.com - Commercial support, development, porting,
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    licensing and training services.
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*/
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/*-----------------------------------------------------------
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 * Implementation of functions defined in portable.h for the Philips ARM7 port.
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 *----------------------------------------------------------*/
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/*
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        Changes from V3.2.2
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        + Bug fix - The prescale value for the timer setup is now written to T0PR
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          instead of T0PC.  This bug would have had no effect unless a prescale
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          value was actually used.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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#include <intrinsics.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup the tick ISR. */
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#define portENABLE_TIMER                        ( ( unsigned char ) 0x01 )
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#define portPRESCALE_VALUE                      0x00
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#define portINTERRUPT_ON_MATCH          ( ( unsigned long ) 0x01 )
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#define portRESET_COUNT_ON_MATCH        ( ( unsigned long ) 0x02 )
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/* Constants required to setup the initial stack. */
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#define portINITIAL_SPSR                                ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT                              ( ( portSTACK_TYPE ) 0x20 )
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#define portINSTRUCTION_SIZE                    ( ( portSTACK_TYPE ) 4 )
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/* Constants required to setup the PIT. */
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#define portPIT_CLOCK_DIVISOR                   ( ( unsigned long ) 16 )
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#define portPIT_COUNTER_VALUE                   ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
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/* Constants required to handle interrupts. */
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#define portTIMER_MATCH_ISR_BIT         ( ( unsigned char ) 0x01 )
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#define portCLEAR_VIC_INTERRUPT         ( ( unsigned long ) 0 )
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING                 ( ( unsigned long ) 0 )
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96
 
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#define portINT_LEVEL_SENSITIVE  0
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#define portPIT_ENABLE          ( ( unsigned short ) 0x1 << 24 )
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#define portPIT_INT_ENABLE      ( ( unsigned short ) 0x1 << 25 )
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/* Constants required to setup the VIC for the tick ISR. */
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#define portTIMER_VIC_CHANNEL           ( ( unsigned long ) 0x0004 )
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#define portTIMER_VIC_CHANNEL_BIT       ( ( unsigned long ) 0x0010 )
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#define portTIMER_VIC_ENABLE            ( ( unsigned long ) 0x0020 )
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106
/*-----------------------------------------------------------*/
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/* Setup the PIT to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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111
/* ulCriticalNesting will get set to zero when the first task starts.  It
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cannot be initialised to 0 as this will cause interrupts to be enabled
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during the kernel initialisation process. */
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unsigned long ulCriticalNesting = ( unsigned long ) 9999;
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/*-----------------------------------------------------------*/
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/*
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 * Initialise the stack of a task to look exactly as if a call to
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 * portSAVE_CONTEXT had been called.
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 *
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 * See header file for description.
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 */
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
125
{
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portSTACK_TYPE *pxOriginalTOS;
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        pxOriginalTOS = pxTopOfStack;
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        /* Setup the initial stack of the task.  The stack is set exactly as
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        expected by the portRESTORE_CONTEXT() macro. */
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        /* First on the stack is the return address - which in this case is the
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        start of the task.  The offset is added to make the return address appear
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        as it would within an IRQ ISR. */
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        *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa;  /* R14 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212;  /* R12 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;  /* R11 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010;  /* R10 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909;  /* R9 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808;  /* R8 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707;  /* R7 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606;  /* R6 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505;  /* R5 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404;  /* R4 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303;  /* R3 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202;  /* R2 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101;  /* R1 */
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        pxTopOfStack--;
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        /* When the task starts is will expect to find the function parameter in
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        R0. */
170
        *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
171
        pxTopOfStack--;
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173
        /* The status register is set for system mode, with interrupts enabled. */
174
        *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
175
 
176
        if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )
177
        {
178
                /* We want the task to start in thumb mode. */
179
                *pxTopOfStack |= portTHUMB_MODE_BIT;
180
        }
181
 
182
        pxTopOfStack--;
183
 
184
        /* Interrupt flags cannot always be stored on the stack and will
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        instead be stored in a variable, which is then saved as part of the
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        tasks context. */
187
        *pxTopOfStack = portNO_CRITICAL_NESTING;
188
 
189
        return pxTopOfStack;
190
}
191
/*-----------------------------------------------------------*/
192
 
193
portBASE_TYPE xPortStartScheduler( void )
194
{
195
extern void vPortStartFirstTask( void );
196
 
197
        /* Start the timer that generates the tick ISR.  Interrupts are disabled
198
        here already. */
199
        prvSetupTimerInterrupt();
200
 
201
        /* Start the first task. */
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        vPortStartFirstTask();
203
 
204
        /* Should not get here! */
205
        return 0;
206
}
207
/*-----------------------------------------------------------*/
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209
void vPortEndScheduler( void )
210
{
211
        /* It is unlikely that the ARM port will require this function as there
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        is nothing to return to.  */
213
}
214
/*-----------------------------------------------------------*/
215
 
216
#if configUSE_PREEMPTION == 0
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218
        /* The cooperative scheduler requires a normal IRQ service routine to
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        simply increment the system tick. */
220
        static __arm __irq void vPortNonPreemptiveTick( void );
221
        static __arm __irq void vPortNonPreemptiveTick( void )
222
        {
223
                /* Increment the tick count - which may wake some tasks but as the
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                preemptive scheduler is not being used any woken task is not given
225
                processor time no matter what its priority. */
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                vTaskIncrementTick();
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                /* Ready for the next interrupt. */
229
                T0IR = portTIMER_MATCH_ISR_BIT;
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                VICVectAddr = portCLEAR_VIC_INTERRUPT;
231
        }
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#else
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        /* This function is called from an asm wrapper, so does not require the __irq
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        keyword. */
237
        void vPortPreemptiveTick( void );
238
        void vPortPreemptiveTick( void )
239
        {
240
                /* Increment the tick counter. */
241
                vTaskIncrementTick();
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243
                /* The new tick value might unblock a task.  Ensure the highest task that
244
                is ready to execute is the task that will execute when the tick ISR
245
                exits. */
246
                vTaskSwitchContext();
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                /* Ready for the next interrupt. */
249
                T0IR = portTIMER_MATCH_ISR_BIT;
250
                VICVectAddr = portCLEAR_VIC_INTERRUPT;
251
        }
252
 
253
#endif
254
 
255
/*-----------------------------------------------------------*/
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257
static void prvSetupTimerInterrupt( void )
258
{
259
unsigned long ulCompareMatch;
260
 
261
        /* A 1ms tick does not require the use of the timer prescale.  This is
262
        defaulted to zero but can be used if necessary. */
263
        T0PR = portPRESCALE_VALUE;
264
 
265
        /* Calculate the match value required for our wanted tick rate. */
266
        ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
267
 
268
        /* Protect against divide by zero.  Using an if() statement still results
269
        in a warning - hence the #if. */
270
        #if portPRESCALE_VALUE != 0
271
        {
272
                ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
273
        }
274
        #endif
275
 
276
        T0MR0 = ulCompareMatch;
277
 
278
        /* Generate tick with timer 0 compare match. */
279
        T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
280
 
281
        /* Setup the VIC for the timer. */
282
        VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
283
        VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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285
        /* The ISR installed depends on whether the preemptive or cooperative
286
        scheduler is being used. */
287
        #if configUSE_PREEMPTION == 1
288
        {
289
                extern void ( vPortPreemptiveTickEntry )( void );
290
 
291
                VICVectAddr0 = ( unsigned long ) vPortPreemptiveTickEntry;
292
        }
293
        #else
294
        {
295
                extern void ( vNonPreemptiveTick )( void );
296
 
297
                VICVectAddr0 = ( long ) vPortNonPreemptiveTick;
298
        }
299
        #endif
300
 
301
        VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
302
 
303
        /* Start the timer - interrupts are disabled when this function is called
304
        so it is okay to do this here. */
305
        T0TCR = portENABLE_TIMER;
306
}
307
/*-----------------------------------------------------------*/
308
 
309
void vPortEnterCritical( void )
310
{
311
        /* Disable interrupts first! */
312
        __disable_interrupt();
313
 
314
        /* Now interrupts are disabled ulCriticalNesting can be accessed
315
        directly.  Increment ulCriticalNesting to keep a count of how many times
316
        portENTER_CRITICAL() has been called. */
317
        ulCriticalNesting++;
318
}
319
/*-----------------------------------------------------------*/
320
 
321
void vPortExitCritical( void )
322
{
323
        if( ulCriticalNesting > portNO_CRITICAL_NESTING )
324
        {
325
                /* Decrement the nesting count as we are leaving a critical section. */
326
                ulCriticalNesting--;
327
 
328
                /* If the nesting level has reached zero then interrupts should be
329
                re-enabled. */
330
                if( ulCriticalNesting == portNO_CRITICAL_NESTING )
331
                {
332
                        __enable_interrupt();
333
                }
334
        }
335
}
336
/*-----------------------------------------------------------*/
337
 
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