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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [MPLAB/] [PIC32MX/] [ISR_Support.h] - Blame information for rev 572

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1 572 jeremybenn
/*
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    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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    ***************************************************************************
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    *                                                                         *
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    * If you are:                                                             *
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    *                                                                         *
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    *    + New to FreeRTOS,                                                   *
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    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
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    *    + Looking for basic training,                                        *
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    *    + Wanting to improve your FreeRTOS skills and productivity           *
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    *                                                                         *
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    * then take a look at the FreeRTOS books - available as PDF or paperback  *
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    *                                                                         *
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    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
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    *                  http://www.FreeRTOS.org/Documentation                  *
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    *                                                                         *
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    * A pdf reference manual is also available.  Both are usually delivered   *
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    * to your inbox within 20 minutes to two hours when purchased between 8am *
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    * and 8pm GMT (although please allow up to 24 hours in case of            *
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    * exceptional circumstances).  Thank you for your support!                *
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    *                                                                         *
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    ***************************************************************************
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    This file is part of the FreeRTOS distribution.
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    FreeRTOS is free software; you can redistribute it and/or modify it under
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    the terms of the GNU General Public License (version 2) as published by the
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    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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    ***NOTE*** The exception to the GPL is included to allow you to distribute
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    a combined work that includes FreeRTOS without being obliged to provide the
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    source code for proprietary components outside of the FreeRTOS kernel.
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    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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    more details. You should have received a copy of the GNU General Public
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    License and the FreeRTOS license exception along with FreeRTOS; if not it
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    can be viewed here: http://www.freertos.org/a00114.html and also obtained
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    by writing to Richard Barry, contact details for whom are available on the
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    FreeRTOS WEB site.
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    1 tab == 4 spaces!
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    http://www.FreeRTOS.org - Documentation, latest information, license and
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    contact details.
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    http://www.SafeRTOS.com - A version that is certified for use in safety
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    critical systems.
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    http://www.OpenRTOS.com - Commercial support, development, porting,
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    licensing and training services.
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*/
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#include "FreeRTOSConfig.h"
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#define portCONTEXT_SIZE 132
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#define portEPC_STACK_LOCATION  124
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#define portSTATUS_STACK_LOCATION 128
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/******************************************************************/
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.macro  portSAVE_CONTEXT
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        /* Make room for the context. First save the current status so we can
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        manipulate it, and the cause and EPC registers so we capture their
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        original values in case of interrupt nesting. */
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        mfc0            k0, _CP0_CAUSE
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        addiu           sp,     sp, -portCONTEXT_SIZE
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        mfc0            k1, _CP0_STATUS
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        /* Also save s6 and s5 so we can use them during this interrupt.  Any
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        nesting interrupts should maintain the values of these registers
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        across the ISR. */
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        sw                      s6, 44(sp)
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        sw                      s5, 40(sp)
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        sw                      k1, portSTATUS_STACK_LOCATION(sp)
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        /* Enable interrupts above the current priority. */
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        srl                     k0, k0, 0xa
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        ins             k1, k0, 10, 6
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        ins                     k1, zero, 1, 4
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        /* s5 is used as the frame pointer. */
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        add                     s5, zero, sp
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        /* Check the nesting count value. */
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        la                      k0, uxInterruptNesting
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        lw                      s6, (k0)
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        /* If the nesting count is 0 then swap to the the system stack, otherwise
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        the system stack is already being used. */
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        bne                     s6, zero, .+20
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        nop
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        /* Swap to the system stack. */
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        la                      sp, xISRStackTop
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        lw                      sp, (sp)
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        /* Increment and save the nesting count. */
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        addiu           s6, s6, 1
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        sw                      s6, 0(k0)
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        /* s6 holds the EPC value, this is saved after interrupts are re-enabled. */
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        mfc0            s6, _CP0_EPC
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        /* Re-enable interrupts. */
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        mtc0            k1, _CP0_STATUS
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        /* Save the context into the space just created.  s6 is saved again
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        here as it now contains the EPC value.  No other s registers need be
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        saved. */
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        sw                      ra,     120(s5)
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        sw                      s8, 116(s5)
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        sw                      t9, 112(s5)
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        sw                      t8,     108(s5)
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        sw                      t7,     104(s5)
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        sw                      t6, 100(s5)
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        sw                      t5, 96(s5)
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        sw                      t4, 92(s5)
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        sw                      t3, 88(s5)
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        sw                      t2, 84(s5)
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        sw                      t1, 80(s5)
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        sw                      t0, 76(s5)
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        sw                      a3, 72(s5)
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        sw                      a2, 68(s5)
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        sw                      a1, 64(s5)
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        sw                      a0, 60(s5)
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        sw                      v1, 56(s5)
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        sw                      v0, 52(s5)
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        sw                      s6, portEPC_STACK_LOCATION(s5)
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        sw                      $1, 16(s5)
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        /* s6 is used as a scratch register. */
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        mfhi            s6
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        sw                      s6, 12(s5)
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        mflo            s6
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        sw                      s6, 8(s5)
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        /* Update the task stack pointer value if nesting is zero. */
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        la                      s6, uxInterruptNesting
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        lw                      s6, (s6)
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        addiu           s6, s6, -1
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        bne                     s6, zero, .+20
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        nop
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        /* Save the stack pointer. */
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        la                      s6, uxSavedTaskStackPointer
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        sw                      s5, (s6)
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        .endm
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/******************************************************************/
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.macro  portRESTORE_CONTEXT
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        /* Restore the stack pointer from the TCB.  This is only done if the
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        nesting count is 1. */
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        la                      s6, uxInterruptNesting
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        lw                      s6, (s6)
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        addiu           s6, s6, -1
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        bne                     s6, zero, .+20
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        nop
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        la                      s6, uxSavedTaskStackPointer
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        lw                      s5, (s6)
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        /* Restore the context. */
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        lw                      s6, 8(s5)
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        mtlo            s6
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        lw                      s6, 12(s5)
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        mthi            s6
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        lw                      $1, 16(s5)
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        /* s6 is loaded as it was used as a scratch register and therefore saved
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        as part of the interrupt context. */
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        lw                      s6, 44(s5)
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        lw                      v0, 52(s5)
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        lw                      v1, 56(s5)
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        lw                      a0, 60(s5)
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        lw                      a1, 64(s5)
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        lw                      a2, 68(s5)
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        lw                      a3, 72(s5)
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        lw                      t0, 76(s5)
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        lw                      t1, 80(s5)
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        lw                      t2, 84(s5)
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        lw                      t3, 88(s5)
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        lw                      t4, 92(s5)
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        lw                      t5, 96(s5)
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        lw                      t6, 100(s5)
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        lw                      t7, 104(s5)
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        lw                      t8, 108(s5)
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        lw                      t9, 112(s5)
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        lw                      s8, 116(s5)
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        lw                      ra, 120(s5)
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        /* Protect access to the k registers, and others. */
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        di
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        /* Decrement the nesting count. */
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        la                      k0, uxInterruptNesting
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        lw                      k1, (k0)
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        addiu           k1, k1, -1
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        sw                      k1, 0(k0)
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        lw                      k0, portSTATUS_STACK_LOCATION(s5)
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        lw                      k1, portEPC_STACK_LOCATION(s5)
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        /* Leave the stack how we found it.  First load sp from s5, then restore
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        s5 from the stack. */
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        add                     sp, zero, s5
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        lw                      s5, 40(sp)
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        addiu           sp,     sp,     portCONTEXT_SIZE
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        mtc0            k0, _CP0_STATUS
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        ehb
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        mtc0            k1, _CP0_EPC
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        eret
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        nop
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        .endm
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