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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [RVDS/] [ARM7_LPC21xx/] [port.c] - Blame information for rev 572

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1 572 jeremybenn
/*
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    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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    ***************************************************************************
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    *                                                                         *
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    * If you are:                                                             *
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    *                                                                         *
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    *    + New to FreeRTOS,                                                   *
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    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
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    *    + Looking for basic training,                                        *
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    *    + Wanting to improve your FreeRTOS skills and productivity           *
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    *                                                                         *
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    * then take a look at the FreeRTOS books - available as PDF or paperback  *
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    *                                                                         *
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    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
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    *                  http://www.FreeRTOS.org/Documentation                  *
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    *                                                                         *
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    * A pdf reference manual is also available.  Both are usually delivered   *
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    * to your inbox within 20 minutes to two hours when purchased between 8am *
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    * and 8pm GMT (although please allow up to 24 hours in case of            *
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    * exceptional circumstances).  Thank you for your support!                *
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    *                                                                         *
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    ***************************************************************************
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    This file is part of the FreeRTOS distribution.
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    FreeRTOS is free software; you can redistribute it and/or modify it under
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    the terms of the GNU General Public License (version 2) as published by the
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    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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    ***NOTE*** The exception to the GPL is included to allow you to distribute
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    a combined work that includes FreeRTOS without being obliged to provide the
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    source code for proprietary components outside of the FreeRTOS kernel.
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    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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    more details. You should have received a copy of the GNU General Public
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    License and the FreeRTOS license exception along with FreeRTOS; if not it
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    can be viewed here: http://www.freertos.org/a00114.html and also obtained
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    by writing to Richard Barry, contact details for whom are available on the
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    FreeRTOS WEB site.
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    1 tab == 4 spaces!
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    http://www.FreeRTOS.org - Documentation, latest information, license and
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    contact details.
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    http://www.SafeRTOS.com - A version that is certified for use in safety
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    critical systems.
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    http://www.OpenRTOS.com - Commercial support, development, porting,
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    licensing and training services.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup the initial task context. */
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#define portINITIAL_SPSR                                ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT                              ( ( portSTACK_TYPE ) 0x20 )
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#define portINSTRUCTION_SIZE                    ( ( portSTACK_TYPE ) 4 )
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#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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/* Constants required to setup the tick ISR. */
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#define portENABLE_TIMER                        ( ( unsigned portCHAR ) 0x01 )
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#define portPRESCALE_VALUE                      0x00
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#define portINTERRUPT_ON_MATCH          ( ( unsigned portLONG ) 0x01 )
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#define portRESET_COUNT_ON_MATCH        ( ( unsigned portLONG ) 0x02 )
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/* Constants required to setup the VIC for the tick ISR. */
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#define portTIMER_VIC_CHANNEL           ( ( unsigned portLONG ) 0x0004 )
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#define portTIMER_VIC_CHANNEL_BIT       ( ( unsigned portLONG ) 0x0010 )
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#define portTIMER_VIC_ENABLE            ( ( unsigned portLONG ) 0x0020 )
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/* Constants required to handle interrupts. */
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#define portTIMER_MATCH_ISR_BIT         ( ( unsigned portCHAR ) 0x01 )
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#define portCLEAR_VIC_INTERRUPT         ( ( unsigned portLONG ) 0 )
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/*-----------------------------------------------------------*/
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/* The code generated by the Keil compiler does not maintain separate
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stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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use the stack as per other ports.  Instead a variable is used to keep
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track of the critical section nesting.  This variable has to be stored
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as part of the task context and must be initialised to a non zero value. */
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#define portNO_CRITICAL_NESTING         ( ( unsigned portLONG ) 0 )
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volatile unsigned portLONG ulCriticalNesting = 9999UL;
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/*-----------------------------------------------------------*/
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*
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 * The scheduler can only be started from ARM mode, so
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 * vPortStartFirstSTask() is defined in portISR.c.
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 */
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extern __asm void vPortStartFirstTask( void );
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/*-----------------------------------------------------------*/
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/*
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 * See header file for description.
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 */
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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portSTACK_TYPE *pxOriginalTOS;
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        /* Setup the initial stack of the task.  The stack is set exactly as
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        expected by the portRESTORE_CONTEXT() macro.
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        Remember where the top of the (simulated) stack is before we place
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        anything on it. */
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        pxOriginalTOS = pxTopOfStack;
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        /* First on the stack is the return address - which in this case is the
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        start of the task.  The offset is added to make the return address appear
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        as it would within an IRQ ISR. */
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        *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa;  /* R14 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212;  /* R12 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;  /* R11 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010;  /* R10 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909;  /* R9 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808;  /* R8 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707;  /* R7 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606;  /* R6 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505;  /* R5 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404;  /* R4 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303;  /* R3 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202;  /* R2 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101;  /* R1 */
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        pxTopOfStack--;
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        *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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        pxTopOfStack--;
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        /* The last thing onto the stack is the status register, which is set for
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        system mode, with interrupts enabled. */
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        *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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        if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )
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        {
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                /* We want the task to start in thumb mode. */
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                *pxTopOfStack |= portTHUMB_MODE_BIT;
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        }
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        pxTopOfStack--;
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        /* The code generated by the Keil compiler does not maintain separate
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        stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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        use the stack as per other ports.  Instead a variable is used to keep
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        track of the critical section nesting.  This variable has to be stored
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        as part of the task context and is initially set to zero. */
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        *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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        return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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        /* Start the timer that generates the tick ISR. */
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        prvSetupTimerInterrupt();
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        /* Start the first task.  This is done from portISR.c as ARM mode must be
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        used. */
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        vPortStartFirstTask();
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        /* Should not get here! */
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        return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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        /* It is unlikely that the ARM port will require this function as there
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        is nothing to return to.  If this is required - stop the tick ISR then
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        return back to main. */
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}
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/*-----------------------------------------------------------*/
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#if configUSE_PREEMPTION == 0
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        /*
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         * The cooperative scheduler requires a normal IRQ service routine to
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         * simply increment the system tick.
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         */
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        void vNonPreemptiveTick( void ) __irq;
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        void vNonPreemptiveTick( void ) __irq
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        {
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                /* Increment the tick count - this may make a delaying task ready
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                to run - but a context switch is not performed. */
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                vTaskIncrementTick();
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                T0IR = portTIMER_MATCH_ISR_BIT;                         /* Clear the timer event */
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                VICVectAddr = portCLEAR_VIC_INTERRUPT;          /* Acknowledge the Interrupt */
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        }
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 #else
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        /*
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         **************************************************************************
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         * The preemptive scheduler ISR is written in assembler and can be found
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         * in the portASM.s file. This will only get used if portUSE_PREEMPTION
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         * is set to 1 in portmacro.h
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         **************************************************************************
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         */
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          void vPreemptiveTick( void );
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#endif
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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unsigned portLONG ulCompareMatch;
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        /* A 1ms tick does not require the use of the timer prescale.  This is
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        defaulted to zero but can be used if necessary. */
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        T0PR = portPRESCALE_VALUE;
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        /* Calculate the match value required for our wanted tick rate. */
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        ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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        /* Protect against divide by zero.  Using an if() statement still results
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        in a warning - hence the #if. */
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        #if portPRESCALE_VALUE != 0
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        {
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                ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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        }
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        #endif
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        T0MR0 = ulCompareMatch;
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        /* Generate tick with timer 0 compare match. */
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        T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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        /* Setup the VIC for the timer. */
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        VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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        VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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        /* The ISR installed depends on whether the preemptive or cooperative
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        scheduler is being used. */
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        #if configUSE_PREEMPTION == 1
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        {
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                VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;
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        }
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        #else
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        {
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                VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick;
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        }
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        #endif
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        VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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        /* Start the timer - interrupts are disabled when this function is called
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        so it is okay to do this here. */
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        T0TCR = portENABLE_TIMER;
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
284
{
285
        /* Disable interrupts as per portDISABLE_INTERRUPTS();                                                  */
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        __disable_irq();
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        /* Now interrupts are disabled ulCriticalNesting can be accessed
289
        directly.  Increment ulCriticalNesting to keep a count of how many times
290
        portENTER_CRITICAL() has been called. */
291
        ulCriticalNesting++;
292
}
293
/*-----------------------------------------------------------*/
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295
void vPortExitCritical( void )
296
{
297
        if( ulCriticalNesting > portNO_CRITICAL_NESTING )
298
        {
299
                /* Decrement the nesting count as we are leaving a critical section. */
300
                ulCriticalNesting--;
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302
                /* If the nesting level has reached zero then interrupts should be
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                re-enabled. */
304
                if( ulCriticalNesting == portNO_CRITICAL_NESTING )
305
                {
306
                        /* Enable interrupts as per portEXIT_CRITICAL(). */
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                        __enable_irq();
308
                }
309
        }
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}
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/*-----------------------------------------------------------*/
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