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jeremybenn |
/*
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FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS books - available as PDF or paperback *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the Cygnal port.
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*----------------------------------------------------------*/
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/* Standard includes. */
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#include <string.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to setup timer 2 to produce the RTOS tick. */
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#define portCLOCK_DIVISOR ( ( unsigned long ) 12 )
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#define portMAX_TIMER_VALUE ( ( unsigned long ) 0xffff )
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#define portENABLE_TIMER ( ( unsigned char ) 0x04 )
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#define portTIMER_2_INTERRUPT_ENABLE ( ( unsigned char ) 0x20 )
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/* The value used in the IE register when a task first starts. */
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#define portGLOBAL_INTERRUPT_BIT ( ( portSTACK_TYPE ) 0x80 )
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/* The value used in the PSW register when a task first starts. */
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#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00 )
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/* Macro to clear the timer 2 interrupt flag. */
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#define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;
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/* Used during a context switch to store the size of the stack being copied
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to or from XRAM. */
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data static unsigned char ucStackBytes;
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/* Used during a context switch to point to the next byte in XRAM from/to which
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a RAM byte is to be copied. */
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xdata static portSTACK_TYPE * data pxXRAMStack;
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/* Used during a context switch to point to the next byte in RAM from/to which
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an XRAM byte is to be copied. */
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data static portSTACK_TYPE * data pxRAMStack;
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/* We require the address of the pxCurrentTCB variable, but don't want to know
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any details of its type. */
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typedef void tskTCB;
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extern volatile tskTCB * volatile pxCurrentTCB;
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/*
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* Setup the hardware to generate an interrupt off timer 2 at the required
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* frequency.
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*/
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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* Macro that copies the current stack from internal RAM to XRAM. This is
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* required as the 8051 only contains enough internal RAM for a single stack,
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* but we have a stack for every task.
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*/
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#define portCOPY_STACK_TO_XRAM() \
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{ \
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/* pxCurrentTCB points to a TCB which itself points to the location into \
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which the first stack byte should be copied. Set pxXRAMStack to point \
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to the location into which the first stack byte is to be copied. */ \
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pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
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\
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/* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
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pxRAMStack = ( data portSTACK_TYPE * data ) configSTACK_START; \
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\
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/* Calculate the size of the stack we are about to copy from the current \
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stack pointer value. */ \
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ucStackBytes = SP - ( configSTACK_START - 1 ); \
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\
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/* Before starting to copy the stack, store the calculated stack size so \
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the stack can be restored when the task is resumed. */ \
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*pxXRAMStack = ucStackBytes; \
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\
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/* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
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have already stored the stack size into XRAM. */ \
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while( ucStackBytes ) \
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{ \
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pxXRAMStack++; \
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*pxXRAMStack = *pxRAMStack; \
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pxRAMStack++; \
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ucStackBytes--; \
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} \
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}
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/*-----------------------------------------------------------*/
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/*
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* Macro that copies the stack of the task being resumed from XRAM into
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* internal RAM.
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*/
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#define portCOPY_XRAM_TO_STACK() \
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{ \
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/* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
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copy the data back out of XRAM and into the stack. */ \
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pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
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pxRAMStack = ( data portSTACK_TYPE * data ) ( configSTACK_START - 1 ); \
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\
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/* The first value stored in XRAM was the size of the stack - i.e. the \
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number of bytes we need to copy back. */ \
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ucStackBytes = pxXRAMStack[ 0 ]; \
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\
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/* Copy the required number of bytes back into the stack. */ \
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do \
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{ \
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pxXRAMStack++; \
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pxRAMStack++; \
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*pxRAMStack = *pxXRAMStack; \
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ucStackBytes--; \
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} while( ucStackBytes ); \
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\
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/* Restore the stack pointer ready to use the restored stack. */ \
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SP = ( unsigned char ) pxRAMStack; \
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}
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/*-----------------------------------------------------------*/
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/*
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* Macro to push the current execution context onto the stack, before the stack
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* is moved to XRAM.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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_asm \
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/* Push ACC first, as when restoring the context it must be restored \
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last (it is used to set the IE register). */ \
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push ACC \
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/* Store the IE register then disable interrupts. */ \
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push IE \
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clr _EA \
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push DPL \
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push DPH \
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push b \
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push ar2 \
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push ar3 \
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push ar4 \
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push ar5 \
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push ar6 \
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push ar7 \
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push ar0 \
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push ar1 \
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push PSW \
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_endasm; \
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PSW = 0; \
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_asm \
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push _bp \
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_endasm; \
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}
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/*-----------------------------------------------------------*/
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/*
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* Macro that restores the execution context from the stack. The execution
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* context was saved into the stack before the stack was copied into XRAM.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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_asm \
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pop _bp \
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pop PSW \
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pop ar1 \
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pop ar0 \
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pop ar7 \
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pop ar6 \
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pop ar5 \
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pop ar4 \
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pop ar3 \
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pop ar2 \
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pop b \
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pop DPH \
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pop DPL \
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/* The next byte of the stack is the IE register. Only the global \
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enable bit forms part of the task context. Pop off the IE then set \
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the global enable bit to match that of the stored IE register. */ \
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pop ACC \
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JB ACC.7,0098$ \
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CLR IE.7 \
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LJMP 0099$ \
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0098$: \
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SETB IE.7 \
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0099$: \
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/* Finally pop off the ACC, which was the first register saved. */ \
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pop ACC \
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reti \
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_endasm; \
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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unsigned long ulAddress;
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portSTACK_TYPE *pxStartOfStack;
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/* Leave space to write the size of the stack as the first byte. */
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pxStartOfStack = pxTopOfStack;
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pxTopOfStack++;
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/* Place a few bytes of known values on the bottom of the stack.
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This is just useful for debugging and can be uncommented if required.
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*pxTopOfStack = 0x11;
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pxTopOfStack++;
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*pxTopOfStack = 0x22;
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pxTopOfStack++;
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*pxTopOfStack = 0x33;
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pxTopOfStack++;
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*/
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/* Simulate how the stack would look after a call to the scheduler tick
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ISR.
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The return address that would have been pushed by the MCU. */
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ulAddress = ( unsigned long ) pxCode;
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*pxTopOfStack = ( portSTACK_TYPE ) ulAddress;
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ulAddress >>= 8;
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress );
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pxTopOfStack++;
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/* Next all the registers will have been pushed by portSAVE_CONTEXT(). */
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*pxTopOfStack = 0xaa; /* acc */
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pxTopOfStack++;
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/* We want tasks to start with interrupts enabled. */
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*pxTopOfStack = portGLOBAL_INTERRUPT_BIT;
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pxTopOfStack++;
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/* The function parameters will be passed in the DPTR and B register as
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a three byte generic pointer is used. */
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ulAddress = ( unsigned long ) pvParameters;
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*pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPL */
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ulAddress >>= 8;
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*pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPH */
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ulAddress >>= 8;
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pxTopOfStack++;
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*pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* b */
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pxTopOfStack++;
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/* The remaining registers are straight forward. */
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*pxTopOfStack = 0x02; /* R2 */
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pxTopOfStack++;
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*pxTopOfStack = 0x03; /* R3 */
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pxTopOfStack++;
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*pxTopOfStack = 0x04; /* R4 */
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pxTopOfStack++;
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*pxTopOfStack = 0x05; /* R5 */
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pxTopOfStack++;
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*pxTopOfStack = 0x06; /* R6 */
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pxTopOfStack++;
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*pxTopOfStack = 0x07; /* R7 */
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pxTopOfStack++;
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*pxTopOfStack = 0x00; /* R0 */
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pxTopOfStack++;
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*pxTopOfStack = 0x01; /* R1 */
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pxTopOfStack++;
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*pxTopOfStack = 0x00; /* PSW */
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pxTopOfStack++;
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*pxTopOfStack = 0xbb; /* BP */
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/* Dont increment the stack size here as we don't want to include
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the stack size byte as part of the stack size count.
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Finally we place the stack size at the beginning. */
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*pxStartOfStack = ( portSTACK_TYPE ) ( pxTopOfStack - pxStartOfStack );
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/* Unlike most ports, we return the start of the stack as this is where the
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size of the stack is stored. */
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return pxStartOfStack;
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}
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/*-----------------------------------------------------------*/
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| 324 |
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/*
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| 325 |
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* See header file for description.
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*/
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| 327 |
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portBASE_TYPE xPortStartScheduler( void )
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| 328 |
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{
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| 329 |
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/* Setup timer 2 to generate the RTOS tick. */
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| 330 |
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prvSetupTimerInterrupt();
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| 331 |
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| 332 |
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/* Make sure we start with the expected SFR page. This line should not
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| 333 |
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really be required. */
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| 334 |
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SFRPAGE = 0;
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| 335 |
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| 336 |
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/* Copy the stack for the first task to execute from XRAM into the stack,
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| 337 |
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restore the task context from the new stack, then start running the task. */
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| 338 |
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portCOPY_XRAM_TO_STACK();
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| 339 |
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portRESTORE_CONTEXT();
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| 340 |
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| 341 |
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|
/* Should never get here! */
|
| 342 |
|
|
return pdTRUE;
|
| 343 |
|
|
}
|
| 344 |
|
|
/*-----------------------------------------------------------*/
|
| 345 |
|
|
|
| 346 |
|
|
void vPortEndScheduler( void )
|
| 347 |
|
|
{
|
| 348 |
|
|
/* Not implemented for this port. */
|
| 349 |
|
|
}
|
| 350 |
|
|
/*-----------------------------------------------------------*/
|
| 351 |
|
|
|
| 352 |
|
|
/*
|
| 353 |
|
|
* Manual context switch. The first thing we do is save the registers so we
|
| 354 |
|
|
* can use a naked attribute.
|
| 355 |
|
|
*/
|
| 356 |
|
|
void vPortYield( void ) _naked
|
| 357 |
|
|
{
|
| 358 |
|
|
/* Save the execution context onto the stack, then copy the entire stack
|
| 359 |
|
|
to XRAM. This is necessary as the internal RAM is only large enough to
|
| 360 |
|
|
hold one stack, and we want one per task.
|
| 361 |
|
|
|
| 362 |
|
|
PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
|
| 363 |
|
|
IS REQUIRED. */
|
| 364 |
|
|
portSAVE_CONTEXT();
|
| 365 |
|
|
portCOPY_STACK_TO_XRAM();
|
| 366 |
|
|
|
| 367 |
|
|
/* Call the standard scheduler context switch function. */
|
| 368 |
|
|
vTaskSwitchContext();
|
| 369 |
|
|
|
| 370 |
|
|
/* Copy the stack of the task about to execute from XRAM into RAM and
|
| 371 |
|
|
restore it's context ready to run on exiting. */
|
| 372 |
|
|
portCOPY_XRAM_TO_STACK();
|
| 373 |
|
|
portRESTORE_CONTEXT();
|
| 374 |
|
|
}
|
| 375 |
|
|
/*-----------------------------------------------------------*/
|
| 376 |
|
|
|
| 377 |
|
|
#if configUSE_PREEMPTION == 1
|
| 378 |
|
|
void vTimer2ISR( void ) interrupt 5 _naked
|
| 379 |
|
|
{
|
| 380 |
|
|
/* Preemptive context switch function triggered by the timer 2 ISR.
|
| 381 |
|
|
This does the same as vPortYield() (see above) with the addition
|
| 382 |
|
|
of incrementing the RTOS tick count. */
|
| 383 |
|
|
|
| 384 |
|
|
portSAVE_CONTEXT();
|
| 385 |
|
|
portCOPY_STACK_TO_XRAM();
|
| 386 |
|
|
|
| 387 |
|
|
vTaskIncrementTick();
|
| 388 |
|
|
vTaskSwitchContext();
|
| 389 |
|
|
|
| 390 |
|
|
portCLEAR_INTERRUPT_FLAG();
|
| 391 |
|
|
portCOPY_XRAM_TO_STACK();
|
| 392 |
|
|
portRESTORE_CONTEXT();
|
| 393 |
|
|
}
|
| 394 |
|
|
#else
|
| 395 |
|
|
void vTimer2ISR( void ) interrupt 5
|
| 396 |
|
|
{
|
| 397 |
|
|
/* When using the cooperative scheduler the timer 2 ISR is only
|
| 398 |
|
|
required to increment the RTOS tick count. */
|
| 399 |
|
|
|
| 400 |
|
|
vTaskIncrementTick();
|
| 401 |
|
|
portCLEAR_INTERRUPT_FLAG();
|
| 402 |
|
|
}
|
| 403 |
|
|
#endif
|
| 404 |
|
|
/*-----------------------------------------------------------*/
|
| 405 |
|
|
|
| 406 |
|
|
static void prvSetupTimerInterrupt( void )
|
| 407 |
|
|
{
|
| 408 |
|
|
unsigned char ucOriginalSFRPage;
|
| 409 |
|
|
|
| 410 |
|
|
/* Constants calculated to give the required timer capture values. */
|
| 411 |
|
|
const unsigned long ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;
|
| 412 |
|
|
const unsigned long ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;
|
| 413 |
|
|
const unsigned long ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;
|
| 414 |
|
|
const unsigned char ucLowCaptureByte = ( unsigned char ) ( ulCaptureValue & ( unsigned long ) 0xff );
|
| 415 |
|
|
const unsigned char ucHighCaptureByte = ( unsigned char ) ( ulCaptureValue >> ( unsigned long ) 8 );
|
| 416 |
|
|
|
| 417 |
|
|
/* NOTE: This uses a timer only present on 8052 architecture. */
|
| 418 |
|
|
|
| 419 |
|
|
/* Remember the current SFR page so we can restore it at the end of the
|
| 420 |
|
|
function. */
|
| 421 |
|
|
ucOriginalSFRPage = SFRPAGE;
|
| 422 |
|
|
SFRPAGE = 0;
|
| 423 |
|
|
|
| 424 |
|
|
/* TMR2CF can be left in its default state. */
|
| 425 |
|
|
TMR2CF = ( unsigned char ) 0;
|
| 426 |
|
|
|
| 427 |
|
|
/* Setup the overflow reload value. */
|
| 428 |
|
|
RCAP2L = ucLowCaptureByte;
|
| 429 |
|
|
RCAP2H = ucHighCaptureByte;
|
| 430 |
|
|
|
| 431 |
|
|
/* The initial load is performed manually. */
|
| 432 |
|
|
TMR2L = ucLowCaptureByte;
|
| 433 |
|
|
TMR2H = ucHighCaptureByte;
|
| 434 |
|
|
|
| 435 |
|
|
/* Enable the timer 2 interrupts. */
|
| 436 |
|
|
IE |= portTIMER_2_INTERRUPT_ENABLE;
|
| 437 |
|
|
|
| 438 |
|
|
/* Interrupts are disabled when this is called so the timer can be started
|
| 439 |
|
|
here. */
|
| 440 |
|
|
TMR2CN = portENABLE_TIMER;
|
| 441 |
|
|
|
| 442 |
|
|
/* Restore the original SFR page. */
|
| 443 |
|
|
SFRPAGE = ucOriginalSFRPage;
|
| 444 |
|
|
}
|
| 445 |
|
|
|
| 446 |
|
|
|
| 447 |
|
|
|
| 448 |
|
|
|
