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/*  modes.h
 *
 *  This include file contains all constants and structures associated
 *  with the RTEMS thread and RTEMS_ASR modes.
 *
 *  COPYRIGHT (c) 1989-1999.
 *  On-Line Applications Research Corporation (OAR).
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id: modes.h,v 1.2 2001-09-27 11:59:18 chris Exp $
 */
 
#ifndef __RTEMS_MODES_h
#define __RTEMS_MODES_h
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <rtems/score/isr.h>
 
/*
 *  The following type defines the control block used to manage
 *  each a mode set.
 */
 
typedef unsigned32 Modes_Control;
 
/*
 *  The following constants define the individual modes and masks
 *  which may be used to compose a mode set and to alter modes.
 */
 
#define RTEMS_ALL_MODE_MASKS     0x0000ffff
 
#define RTEMS_DEFAULT_MODES     0x00000000
#define RTEMS_CURRENT_MODE      0
 
#define RTEMS_PREEMPT_MASK    0x00000100  /* preemption bit           */
#define RTEMS_TIMESLICE_MASK  0x00000200  /* timeslice bit            */
#define RTEMS_ASR_MASK        0x00000400  /* RTEMS_ASR enable bit           */
#define RTEMS_INTERRUPT_MASK  CPU_MODES_INTERRUPT_MASK
 
#define RTEMS_PREEMPT      0x00000000     /* enable preemption        */
#define RTEMS_NO_PREEMPT   0x00000100     /* disable preemption       */
 
#define RTEMS_NO_TIMESLICE 0x00000000     /* disable timeslicing      */
#define RTEMS_TIMESLICE    0x00000200     /* enable timeslicing       */
 
#define RTEMS_ASR          0x00000000     /* enable RTEMS_ASR               */
#define RTEMS_NO_ASR       0x00000400     /* disable RTEMS_ASR              */
 
/*
 *  The number of bits for interrupt levels is CPU dependent.
 *  RTEMS supports 0 to 256 levels in bits 0-7 of the mode.
 */
 
/*PAGE
 *
 *  RTEMS_INTERRUPT_LEVEL
 *
 *  DESCRIPTION:
 *
 *  This function returns the processor dependent interrupt
 *  level which corresponds to the requested interrupt level.
 *
 * NOTE: RTEMS supports 256 interrupt levels using the least
 *       significant eight bits of MODES.CONTROL.  On any
 *       particular CPU, fewer than 256 levels may be supported.
 */
 
#define RTEMS_INTERRUPT_LEVEL( _mode_set ) \
  ( (_mode_set) & RTEMS_INTERRUPT_MASK )
 
 
#ifndef __RTEMS_APPLICATION__
#include <rtems/rtems/modes.inl>
#endif
 
#ifdef __cplusplus
}
#endif
 
#endif
/* end of include file */

Line No.	Rev	Author	Line
1	30	unneback	`/* modes.h`
2			`*`
3			`* This include file contains all constants and structures associated`
4			`* with the RTEMS thread and RTEMS_ASR modes.`
5			`*`
6			`* COPYRIGHT (c) 1989-1999.`
7			`* On-Line Applications Research Corporation (OAR).`
8			`*`
9			`* The license and distribution terms for this file may be`
10			`* found in the file LICENSE in this distribution or at`
11			`* http://www.OARcorp.com/rtems/license.html.`
12			`*`
13			`* $Id: modes.h,v 1.2 2001-09-27 11:59:18 chris Exp $`
14			`*/`
15
16			`#ifndef __RTEMS_MODES_h`
17			`#define __RTEMS_MODES_h`
18
19			`#ifdef __cplusplus`
20			`extern "C" {`
21			`#endif`
22
23			`#include <rtems/score/isr.h>`
24
25			`/*`
26			`* The following type defines the control block used to manage`
27			`* each a mode set.`
28			`*/`
29
30			`typedef unsigned32 Modes_Control;`
31
32			`/*`
33			`* The following constants define the individual modes and masks`
34			`* which may be used to compose a mode set and to alter modes.`
35			`*/`
36
37			`#define RTEMS_ALL_MODE_MASKS 0x0000ffff`
38
39			`#define RTEMS_DEFAULT_MODES 0x00000000`
40			`#define RTEMS_CURRENT_MODE 0`
41
42			`#define RTEMS_PREEMPT_MASK 0x00000100 /* preemption bit */`
43			`#define RTEMS_TIMESLICE_MASK 0x00000200 /* timeslice bit */`
44			`#define RTEMS_ASR_MASK 0x00000400 /* RTEMS_ASR enable bit */`
45			`#define RTEMS_INTERRUPT_MASK CPU_MODES_INTERRUPT_MASK`
46
47			`#define RTEMS_PREEMPT 0x00000000 /* enable preemption */`
48			`#define RTEMS_NO_PREEMPT 0x00000100 /* disable preemption */`
49
50			`#define RTEMS_NO_TIMESLICE 0x00000000 /* disable timeslicing */`
51			`#define RTEMS_TIMESLICE 0x00000200 /* enable timeslicing */`
52
53			`#define RTEMS_ASR 0x00000000 /* enable RTEMS_ASR */`
54			`#define RTEMS_NO_ASR 0x00000400 /* disable RTEMS_ASR */`
55
56			`/*`
57			`* The number of bits for interrupt levels is CPU dependent.`
58			`* RTEMS supports 0 to 256 levels in bits 0-7 of the mode.`
59			`*/`
60
61			`/*PAGE`
62			`*`
63			`* RTEMS_INTERRUPT_LEVEL`
64			`*`
65			`* DESCRIPTION:`
66			`*`
67			`* This function returns the processor dependent interrupt`
68			`* level which corresponds to the requested interrupt level.`
69			`*`
70			`* NOTE: RTEMS supports 256 interrupt levels using the least`
71			`* significant eight bits of MODES.CONTROL. On any`
72			`* particular CPU, fewer than 256 levels may be supported.`
73			`*/`
74
75			`#define RTEMS_INTERRUPT_LEVEL( _mode_set ) \`
76			`( (_mode_set) & RTEMS_INTERRUPT_MASK )`
77
78
79			`#ifndef __RTEMS_APPLICATION__`
80			`#include <rtems/rtems/modes.inl>`
81			`#endif`
82
83			`#ifdef __cplusplus`
84			`}`
85			`#endif`
86
87			`#endif`
88			`/* end of include file */`

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [exec/] [rtems/] [include/] [rtems/] [rtems/] [modes.h] - Blame information for rev 173