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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [exec/] [score/] [cpu/] [no_cpu/] [cpu.c] - Blame information for rev 773

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Line No. Rev Author Line
1 30 unneback
/*
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 *  Or1k Dependent Source
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 *
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 */
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#include <rtems/system.h>
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#include <rtems/score/isr.h>
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#include <rtems/score/wkspace.h>
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/*  _CPU_Initialize
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 *
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 *  This routine performs processor dependent initialization.
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 *
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 *  INPUT PARAMETERS:
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 *    cpu_table       - CPU table to initialize
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 *    thread_dispatch - address of disptaching routine
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 *
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 */
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void _CPU_Initialize(
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  rtems_cpu_table  *cpu_table,
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  void      (*thread_dispatch)      /* ignored on this CPU */
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)
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{
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  /*
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   *  The thread_dispatch argument is the address of the entry point
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   *  for the routine called at the end of an ISR once it has been
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   *  decided a context switch is necessary.  On some compilation
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   *  systems it is difficult to call a high-level language routine
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   *  from assembly.  This allows us to trick these systems.
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   *
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   *  If you encounter this problem save the entry point in a CPU
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   *  dependent variable.
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   */
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  _CPU_Thread_dispatch_pointer = thread_dispatch;
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  /*
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   *  If there is not an easy way to initialize the FP context
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   *  during Context_Initialize, then it is usually easier to
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   *  save an "uninitialized" FP context here and copy it to
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   *  the task's during Context_Initialize.
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   */
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  /* FP context initialization support goes here */
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  _CPU_Table = *cpu_table;
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}
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/*PAGE
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 *
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 *  _CPU_ISR_Get_level
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 *
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 */
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unsigned32 _CPU_ISR_Get_level( void )
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{
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  /*
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   *  This routine returns the current interrupt level.
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   */
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  return 0;
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}
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/*PAGE
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 *
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 *  _CPU_ISR_install_raw_handler
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 *
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 */
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void _CPU_ISR_install_raw_handler(
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  unsigned32  vector,
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  proc_ptr    new_handler,
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  proc_ptr   *old_handler
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)
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{
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  /*
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   *  This is where we install the interrupt handler into the "raw" interrupt
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   *  table used by the CPU to dispatch interrupt handlers.
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   */
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}
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/*PAGE
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 *
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 *  _CPU_ISR_install_vector
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 *
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 *  This kernel routine installs the RTEMS handler for the
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 *  specified vector.
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 *
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 *  Input parameters:
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 *    vector      - interrupt vector number
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 *    old_handler - former ISR for this vector number
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 *    new_handler - replacement ISR for this vector number
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 *
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 *  Output parameters:  NONE
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 *
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 *
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 */
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void _CPU_ISR_install_vector(
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  unsigned32  vector,
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  proc_ptr    new_handler,
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  proc_ptr   *old_handler
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)
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{
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   *old_handler = _ISR_Vector_table[ vector ];
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   /*
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    *  If the interrupt vector table is a table of pointer to isr entry
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    *  points, then we need to install the appropriate RTEMS interrupt
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    *  handler for this vector number.
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    */
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   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
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   /*
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    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
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    *  be used by the _ISR_Handler so the user gets control.
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    */
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    _ISR_Vector_table[ vector ] = new_handler;
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}
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/*PAGE
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 *
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 *  _CPU_Install_interrupt_stack
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 *
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 */
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void _CPU_Install_interrupt_stack( void )
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{
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}
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/*PAGE
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 *
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 *  _CPU_Thread_Idle_body
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 *
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 *  NOTES:
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 *
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 *  1. This is the same as the regular CPU independent algorithm.
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 *
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 *  2. If you implement this using a "halt", "idle", or "shutdown"
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 *     instruction, then don't forget to put it in an infinite loop.
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 *
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 *  3. Be warned. Some processors with onboard DMA have been known
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 *     to stop the DMA if the CPU were put in IDLE mode.  This might
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 *     also be a problem with other on-chip peripherals.  So use this
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 *     hook with caution.
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 *
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 */
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void _CPU_Thread_Idle_body( void )
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{
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  for( ; ; )
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    /* insert your "halt" instruction here */ ;
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}

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