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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [exec/] [score/] [cpu/] [no_cpu/] [cpu_asm.c] - Blame information for rev 173

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/*  cpu_asm.c  ===> cpu_asm.S or cpu_asm.s
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 *
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 *  This file contains the basic algorithms for all assembly code used
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 *  in an specific CPU port of RTEMS.  These algorithms must be implemented
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 *  in assembly language
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 *
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 *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: cpu_asm.c,v 1.2 2001-09-27 11:59:28 chris Exp $
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 */
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/*
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 *  This is supposed to be an assembly file.  This means that system.h
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 *  and cpu.h should not be included in a "real" cpu_asm file.  An
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 *  implementation in assembly should include "cpu_asm.h>
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 */
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#include <rtems/system.h>
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#include <rtems/score/cpu.h>
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/* #include "cpu_asm.h> */
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/*
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 *  _CPU_Context_save_fp_context
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 *
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 *  This routine is responsible for saving the FP context
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 *  at *fp_context_ptr.  If the point to load the FP context
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 *  from is changed then the pointer is modified by this routine.
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 *
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 *  Sometimes a macro implementation of this is in cpu.h which dereferences
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 *  the ** and a similarly named routine in this file is passed something
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 *  like a (Context_Control_fp *).  The general rule on making this decision
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 *  is to avoid writing assembly language.
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 *
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 *  NO_CPU Specific Information:
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 *
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 *  XXX document implementation including references if appropriate
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 */
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void _CPU_Context_save_fp(
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  void **fp_context_ptr
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)
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{
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}
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/*
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 *  _CPU_Context_restore_fp_context
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 *
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 *  This routine is responsible for restoring the FP context
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 *  at *fp_context_ptr.  If the point to load the FP context
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 *  from is changed then the pointer is modified by this routine.
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 *
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 *  Sometimes a macro implementation of this is in cpu.h which dereferences
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 *  the ** and a similarly named routine in this file is passed something
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 *  like a (Context_Control_fp *).  The general rule on making this decision
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 *  is to avoid writing assembly language.
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 *
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 *  NO_CPU Specific Information:
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 *
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 *  XXX document implementation including references if appropriate
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 */
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void _CPU_Context_restore_fp(
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  void **fp_context_ptr
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)
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{
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}
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/*  _CPU_Context_switch
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 *
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 *  This routine performs a normal non-FP context switch.
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 *
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 *  NO_CPU Specific Information:
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 *
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 *  XXX document implementation including references if appropriate
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 */
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void _CPU_Context_switch(
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  Context_Control  *run,
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  Context_Control  *heir
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)
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{
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}
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/*
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 *  _CPU_Context_restore
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 *
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 *  This routine is generally used only to restart self in an
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 *  efficient manner.  It may simply be a label in _CPU_Context_switch.
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 *
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 *  NOTE: May be unnecessary to reload some registers.
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 *
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 *  NO_CPU Specific Information:
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 *
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 *  XXX document implementation including references if appropriate
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 */
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void _CPU_Context_restore(
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  Context_Control *new_context
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)
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{
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}
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/*  void __ISR_Handler()
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 *
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 *  This routine provides the RTEMS interrupt management.
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 *
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 *  NO_CPU Specific Information:
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 *
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 *  XXX document implementation including references if appropriate
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 */
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void _ISR_Handler()
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{
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   /*
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    *  This discussion ignores a lot of the ugly details in a real
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    *  implementation such as saving enough registers/state to be
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    *  able to do something real.  Keep in mind that the goal is
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    *  to invoke a user's ISR handler which is written in C and
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    *  uses a certain set of registers.
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    *
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    *  Also note that the exact order is to a large extent flexible.
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    *  Hardware will dictate a sequence for a certain subset of
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    *  _ISR_Handler while requirements for setting
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    */
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  /*
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   *  At entry to "common" _ISR_Handler, the vector number must be
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   *  available.  On some CPUs the hardware puts either the vector
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   *  number or the offset into the vector table for this ISR in a
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   *  known place.  If the hardware does not give us this information,
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   *  then the assembly portion of RTEMS for this port will contain
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   *  a set of distinct interrupt entry points which somehow place
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   *  the vector number in a known place (which is safe if another
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   *  interrupt nests this one) and branches to _ISR_Handler.
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   *
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   *  save some or all context on stack
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   *  may need to save some special interrupt information for exit
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   *
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   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
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   *    if ( _ISR_Nest_level == 0 )
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   *      switch to software interrupt stack
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   *  #endif
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   *
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   *  _ISR_Nest_level++;
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   *
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   *  _Thread_Dispatch_disable_level++;
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   *
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   *  (*_ISR_Vector_table[ vector ])( vector );
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   *
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   *  --_ISR_Nest_level;
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   *
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   *  if ( _ISR_Nest_level )
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   *    goto the label "exit interrupt (simple case)"
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   *
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   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
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   *    restore stack
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   *  #endif
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   *
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   *  if ( !_Context_Switch_necessary )
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   *    goto the label "exit interrupt (simple case)"
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   *
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   *  if ( !_ISR_Signals_to_thread_executing )
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   *    _ISR_Signals_to_thread_executing = FALSE;
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   *    goto the label "exit interrupt (simple case)"
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   *
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   *  call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
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   *
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   *  prepare to get out of interrupt
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   *  return from interrupt  (maybe to _ISR_Dispatch)
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   *
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   *  LABEL "exit interrupt (simple case):
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   *  prepare to get out of interrupt
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   *  return from interrupt
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   */
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}
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