OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [exec/] [score/] [cpu/] [or1k/] [rtems/] [score/] [cpu_asm.h] - Blame information for rev 173

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback 
/*
2 
 *  cpu_asm.h
3 
 *
4 
 *  Very loose template for an include file for the cpu_asm.? file
5 
 *  if it is implemented as a ".S" file (preprocessed by cpp) instead
6 
 *  of a ".s" file (preprocessed by gm4 or gasp). Currently unused in
7 
 *  the or1k port.
8 
 *
9 
 *  COPYRIGHT (c) 1989-1999.
10 
 *  On-Line Applications Research Corporation (OAR).
11 
 *
12 
 *  The license and distribution terms for this file may be
13 
 *  found in the file LICENSE in this distribution or at
14 
 *  http://www.OARcorp.com/rtems/license.html.
15 
 *
16 
 *  This file adapted from no_cpu example of the RTEMS distribution.
17 
 *  The body has been modified for the Opencores Or1k implementation by
18 
 *  Chris Ziomkowski. <chris@asics.ws>
19 
 *
20 
 */
21 
 
22 
#ifndef __CPU_ASM_h
23 
#define __CPU_ASM_h
24 
 
25 
/* pull in the generated offsets */
26 
 
27 
#include <rtems/score/offsets.h>
28 
 
29 
/*
30 
 * Hardware General Registers
31 
 */
32 
 
33 
/* put something here */
34 
 
35 
/*
36 
 * Hardware Floating Point Registers
37 
 */
38 
 
39 
/* put something here */
40 
 
41 
/*
42 
 * Hardware Control Registers
43 
 */
44 
 
45 
/* put something here */
46 
 
47 
/*
48 
 * Calling Convention
49 
 */
50 
 
51 
/* put something here */
52 
 
53 
/*
54 
 * Temporary registers
55 
 */
56 
 
57 
/* put something here */
58 
 
59 
/*
60 
 * Floating Point Registers - SW Conventions
61 
 */
62 
 
63 
/* put something here */
64 
 
65 
/*
66 
 * Temporary floating point registers
67 
 */
68 
 
69 
/* put something here */
70 
 
71 
#endif
72 
 
73 
/* end of file */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.