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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [exec/] [score/] [cpu/] [powerpc/] [new_exception_processing/] [c_isr.inl] - Blame information for rev 173

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RTEMS_INLINE_ROUTINE boolean _ISR_Is_in_progress( void )
{
        register unsigned int isr_nesting_level;
        /*
         * Move from special purpose register 0 (mfspr SPRG0, r3)
         */
        asm volatile ("mfspr    %0, 272" : "=r" (isr_nesting_level));
        return isr_nesting_level;
}

Line No.	Rev	Author	Line
1	30	unneback	`RTEMS_INLINE_ROUTINE boolean _ISR_Is_in_progress( void )`
2			`{`
3			`register unsigned int isr_nesting_level;`
4			`/*`
5			`* Move from special purpose register 0 (mfspr SPRG0, r3)`
6			`*/`
7			`asm volatile ("mfspr %0, 272" : "=r" (isr_nesting_level));`
8			`return isr_nesting_level;`
9			`}`

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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [exec/] [score/] [cpu/] [powerpc/] [new_exception_processing/] [c_isr.inl] - Blame information for rev 173