OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [exec/] [score/] [cpu/] [sparc/] [asm.h] - Blame information for rev 173

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*  asm.h
2
 *
3
 *  This include file attempts to address the problems
4
 *  caused by incompatible flavors of assemblers and
5
 *  toolsets.  It primarily addresses variations in the
6
 *  use of leading underscores on symbols and the requirement
7
 *  that register names be preceded by a %.
8
 *
9
 *
10
 *  NOTE: The spacing in the use of these macros
11
 *        is critical to them working as advertised.
12
 *
13
 *  COPYRIGHT:
14
 *
15
 *  This file is based on similar code found in newlib available
16
 *  from ftp.cygnus.com.  The file which was used had no copyright
17
 *  notice.  This file is freely distributable as long as the source
18
 *  of the file is noted.
19
 *
20
 *  $Id: asm.h,v 1.2 2001-09-27 11:59:30 chris Exp $
21
 */
22
 
23
#ifndef __SPARC_ASM_h
24
#define __SPARC_ASM_h
25
 
26
/*
27
 *  Indicate we are in an assembly file and get the basic CPU definitions.
28
 */
29
 
30
#ifndef ASM
31
#define ASM
32
#endif
33
 
34
#include <rtems/score/targopts.h>
35
#include <rtems/score/cpu.h>
36
 
37
/*
38
 *  Recent versions of GNU cpp define variables which indicate the
39
 *  need for underscores and percents.  If not using GNU cpp or
40
 *  the version does not support this, then you will obviously
41
 *  have to define these as appropriate.
42
 */
43
 
44
/* XXX __USER_LABEL_PREFIX__ and __REGISTER_PREFIX__ do not work on gcc 2.7.0 */
45
/* XXX The following ifdef magic fixes the problem but results in a warning   */
46
/* XXX when compiling assembly code.                                          */
47
 
48
#ifndef __USER_LABEL_PREFIX__
49
#define __USER_LABEL_PREFIX__ _
50
#endif
51
 
52
#ifndef __REGISTER_PREFIX__
53
#define __REGISTER_PREFIX__
54
#endif
55
 
56
/* ANSI concatenation macros.  */
57
 
58
#define CONCAT1(a, b) CONCAT2(a, b)
59
#define CONCAT2(a, b) a ## b
60
 
61
/* Use the right prefix for global labels.  */
62
 
63
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
64
 
65
/* Use the right prefix for registers.  */
66
 
67
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
68
 
69
/*
70
 *  define macros for all of the registers on this CPU
71
 *
72
 *  EXAMPLE:     #define d0 REG (d0)
73
 */
74
 
75
/*
76
 *  Define macros to handle section beginning and ends.
77
 */
78
 
79
 
80
#define BEGIN_CODE_DCL .text
81
#define END_CODE_DCL
82
#define BEGIN_DATA_DCL .data
83
#define END_DATA_DCL
84
#define BEGIN_CODE .text
85
#define END_CODE
86
#define BEGIN_DATA
87
#define END_DATA
88
#define BEGIN_BSS
89
#define END_BSS
90
#define END
91
 
92
/*
93
 *  Following must be tailor for a particular flavor of the C compiler.
94
 *  They may need to put underscores in front of the symbols.
95
 */
96
 
97
#define PUBLIC(sym) .globl SYM (sym)
98
#define EXTERN(sym) .globl SYM (sym)
99
 
100
/*
101
 *  Entry for traps which jump to a programmer-specified trap handler.
102
 */
103
 
104
#define TRAP(_vector, _handler)  \
105
  mov   %psr, %l0 ; \
106
  sethi %hi(_handler), %l4 ; \
107
  jmp   %l4+%lo(_handler); \
108
  mov   _vector, %l3
109
 
110
/*
111
 *  Used for the reset trap for ERC32 to avoid a supervisor instruction
112
 */
113
 
114
#define RTRAP(_vector, _handler)  \
115
  mov   %g0, %l0 ; \
116
  sethi %hi(_handler), %l4 ; \
117
  jmp   %l4+%lo(_handler); \
118
  mov   _vector, %l3
119
 
120
#endif
121
/* end of include file */
122
 
123
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.