OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [a29k/] [portsw/] [include/] [bsp.h] - Blame information for rev 562

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*  bsp.h
2
 *
3
 *  This include file contains all board IO definitions.
4
 *
5
 *  XXX : put yours in here
6
 *
7
 *  COPYRIGHT (c) 1989-1999.
8
 *  On-Line Applications Research Corporation (OAR).
9
 *
10
 *  The license and distribution terms for this file may be
11
 *  found in the file LICENSE in this distribution or at
12
 *  http://www.OARcorp.com/rtems/license.html.
13
 *
14
 *  $Id: bsp.h,v 1.2 2001-09-27 11:59:38 chris Exp $
15
 */
16
 
17
#ifndef __PORTSW_h
18
#define __PORTSW_h
19
 
20
#ifdef __cplusplus
21
extern "C" {
22
#endif
23
 
24
#include <rtems.h>
25
#include <console.h>
26
#include <clockdrv.h>
27
 
28
/*
29
 *  confdefs.h overrides for this BSP:
30
 *   - number of termios serial ports (defaults to 1)
31
 *   - Interrupt stack space is not minimum if defined.
32
 */
33
 
34
/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
35
#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
36
 
37
/*
38
 *  Define the time limits for RTEMS Test Suite test durations.
39
 *  Long test and short test duration limits are provided.  These
40
 *  values are in seconds and need to be converted to ticks for the
41
 *  application.
42
 *
43
 */
44
 
45
#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
46
#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
47
 
48
/*
49
 *  Stuff for Time Test 27
50
 */
51
 
52
#define MUST_WAIT_FOR_INTERRUPT 0
53
 
54
#define Install_tm27_vector( handler ) set_vector( (handler), 0, 1 )
55
 
56
#define Cause_tm27_intr()
57
 
58
#define Clear_tm27_intr()
59
 
60
#define Lower_tm27_intr()
61
 
62
/*
63
 *  Simple spin delay in microsecond units for device drivers.
64
 *  This is very dependent on the clock speed of the target.
65
 */
66
 
67
#define delay( microseconds ) \
68
  { \
69
  }
70
 
71
/* Constants */
72
#define CPU_CLOCK_RATE_MHZ 25
73
 
74
#define RAM_START 0
75
#define RAM_END   0x100000
76
 
77
/* miscellaneous stuff assumed to exist */
78
 
79
extern rtems_configuration_table BSP_Configuration;
80
 
81
/*
82
 *  Device Driver Table Entries
83
 */
84
 
85
/*
86
 * NOTE: Use the standard Console driver entry
87
 */
88
 
89
/*
90
 * NOTE: Use the standard Clock driver entry
91
 */
92
 
93
/* functions */
94
 
95
void bsp_cleanup( void );
96
 
97
no_cpu_isr_entry set_vector(                    /* returns old vector */
98
  rtems_isr_entry     handler,                  /* isr routine        */
99
  rtems_vector_number vector,                   /* vector number      */
100
  int                 type                      /* RTEMS or RAW intr  */
101
);
102
 
103
#ifdef __cplusplus
104
}
105
#endif
106
 
107
#endif
108
/* end of include file */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.