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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [a29k/] [portsw/] [start/] [register.ah] - Blame information for rev 594

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; /* @(#)register.ah    1.1 96/05/23 08:56:57, TEI */
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;                naming of various registers
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;  /* $Id: register.ah,v 1.2 2001-09-27 11:59:42 chris Exp $ */
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;* File information and includes.
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        .file   "register.ah"
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        .ident  "@(#)register.ah        1.1 96/05/23 08:56:57, TEI\n"
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;* Register Stack pointer and frame pointer registers.
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        .extern Rrsp, Rfp
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        .reg    regsp,          %%Rrsp
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        .reg    fp,             %%Rfp
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        .extern RTrapReg
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        .extern Rtrapreg
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        .reg    TrapReg,        %%RTrapReg
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        .reg    trapreg,        %%Rtrapreg
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;* Operating system Interrupt handler registers (gr64-gr67)
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        .extern ROSint0, ROSint1, ROSint2, ROSint3
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        .reg    OSint0,         %%ROSint0
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        .reg    OSint1,         %%ROSint1
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        .reg    OSint2,         %%ROSint2
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        .reg    OSint3,         %%ROSint3
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        .reg    it0,            %%ROSint0
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        .reg    it1,            %%ROSint1
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        .reg    it2,            %%ROSint2
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        .reg    it3,            %%ROSint3
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;* Operating system temporary (or scratch) registers (gr68-gr79)
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        .extern ROStmp0, ROStmp1, ROStmp2, ROStmp3
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        .extern ROStmp4, ROStmp5, ROStmp6, ROStmp7
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        .extern ROStmp8, ROStmp9, ROStmp10, ROStmp11
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        .reg    OStmp0,         %%ROStmp0
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        .reg    OStmp1,         %%ROStmp1
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        .reg    OStmp2,         %%ROStmp2
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        .reg    OStmp3,         %%ROStmp3
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        .reg    OStmp4,         %%ROStmp4
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        .reg    OStmp5,         %%ROStmp5
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        .reg    OStmp6,         %%ROStmp6
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        .reg    OStmp7,         %%ROStmp7
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        .reg    OStmp8,         %%ROStmp8
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        .reg    OStmp9,         %%ROStmp9
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        .reg    OStmp10,        %%ROStmp10
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        .reg    OStmp11,        %%ROStmp11
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        .reg    kt0,            %%ROStmp0
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        .reg    kt1,            %%ROStmp1
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        .reg    kt2,            %%ROStmp2
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        .reg    kt3,            %%ROStmp3
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        .reg    kt4,            %%ROStmp4
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        .reg    kt5,            %%ROStmp5
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        .reg    kt6,            %%ROStmp6
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        .reg    kt7,            %%ROStmp7
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        .reg    kt8,            %%ROStmp8
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        .reg    kt9,            %%ROStmp9
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        .reg    kt10,           %%ROStmp10
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        .reg    kt11,           %%ROStmp11
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        .reg    TempReg0,       %%ROSint0
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        .reg    TempReg1,       %%ROSint1
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        .reg    TempReg2,       %%ROSint2
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        .reg    TempReg3,       %%ROSint3
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        .reg    TempReg4,       %%ROStmp0
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        .reg    TempReg5,       %%ROStmp1
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        .reg    TempReg6,       %%ROStmp2
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        .reg    TempReg7,       %%ROStmp3
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        .reg    TempReg8,       %%ROStmp4
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        .reg    TempReg9,       %%ROStmp5
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        .reg    TempReg10,      %%ROStmp6
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        .reg    TempReg11,      %%ROStmp7
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        .reg    TempReg12,      %%ROStmp8
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        .reg    TempReg13,      %%ROStmp9
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        .reg    TempReg14,      %%ROStmp10
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        .reg    TempReg15,      %%ROStmp11
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;* Assigned static registers
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        .extern RSpillAddrReg, RFillAddrReg, RSignalAddrReg
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        .extern Rpcb, Retc
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        .extern RTimerExt, RTimerUtil, RLEDReg, RERRReg
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        .extern Ret0, Ret1, Ret2, Ret3, Ret4, Ret5, Ret6, Ret7, Reta, Retb
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        .extern Retx, Rety, Retz
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        .reg    SpillAddrReg,   %%RSpillAddrReg
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        .reg    FillAddrReg,    %%RFillAddrReg
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        .reg    SignalAddrReg,  %%RSignalAddrReg
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        .reg    pcb,            %%Rpcb
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        .reg    etx,            %%Retx
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        .reg    ety,            %%Rety
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        .reg    etz,            %%Retz
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        .reg    eta,            %%Reta
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        .reg    etb,            %%Retb
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        .reg    etc,            %%Retc
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        .reg    TimerExt,       %%RTimerExt
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        .reg    TimerUtil,      %%RTimerUtil
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        .reg    LEDReg,         %%RLEDReg
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        .reg    ERRReg,         %%RERRReg
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        .reg    et0,            %%Ret0
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        .reg    et1,            %%Ret1
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        .reg    et2,            %%Ret2
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        .reg    et3,            %%Ret3
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        .reg    et4,            %%Ret4
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        .reg    et5,            %%Ret5
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        .reg    et6,            %%Ret6
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        .reg    et7,            %%Ret7
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;
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        .equ    SCB1REG_NUM,    88
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        .reg    SCB1REG_PTR,    %%Ret0
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; The floating point trap handlers need a few static registers
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        .extern RFPStat0, RFPStat1, RFPStat2, RFPStat3
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        .extern Rheapptr, RHeapPtr, RArgvPtr
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        .reg    FPStat0,        %%RFPStat0
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        .reg    FPStat1,        %%RFPStat1
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        .reg    FPStat2,        %%RFPStat2
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        .reg    FPStat3,        %%RFPStat3
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        .reg    heapptr,        %%Rheapptr
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        .reg    HeapPtr,        %%RHeapPtr
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        .reg    ArgvPtr,        %%RArgvPtr
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        .extern RXLINXReg, RVMBCReg, RUARTReg, RETHERReg
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        .reg    XLINXReg,       %%RXLINXReg
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        .reg    VMBCReg,        %%RVMBCReg
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        .reg    UARTReg,        %%RUARTReg
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        .reg    ETHERReg,       %%RXLINXReg
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;* Compiler and programmer registers. (gr96-gr127)
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        .extern Rv0, Rv1, Rv2, Rv3, Rv4, Rv5, Rv6, Rv7, Rv8, Rv9
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        .extern Rv10, Rv11, Rv12, Rv13, Rv14, Rv15
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        .reg    v0,             %%Rv0
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        .reg    v1,             %%Rv1
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        .reg    v2,             %%Rv2
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        .reg    v3,             %%Rv3
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        .reg    v4,             %%Rv4
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        .reg    v5,             %%Rv5
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        .reg    v6,             %%Rv6
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        .reg    v7,             %%Rv7
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        .reg    v8,             %%Rv8
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        .reg    v9,             %%Rv9
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        .reg    v10,            %%Rv10
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        .reg    v11,            %%Rv11
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        .reg    v12,            %%Rv12
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        .reg    v13,            %%Rv13
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        .reg    v14,            %%Rv14
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        .reg    v15,            %%Rv15
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        .extern Rtv0, Rtv1, Rtv2, Rtv3, Rtv4
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        .reg    tv0,            %%Rtv0
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        .reg    tv1,            %%Rtv1
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        .reg    tv2,            %%Rtv2
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        .reg    tv3,            %%Rtv3
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        .reg    tv4,            %%Rtv4
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; ****************************************************************************
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;       For uatrap
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; register definitions -- since this trap handler must allow for
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; nested traps and interrupts such as TLB miss, protection violation,
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; or Data Access Exception, and these trap handlers use the shared
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; Temp registers, we must maintain our own that are safe over user-
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; mode loads and stores.  The following must be assigned global
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; registers which are not used in INTR[0-3], TRAP[0-1], TLB miss,
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; TLB protection violation, or data exception trap handlers.
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;       .reg    cha_cpy,        OStmp4          ; copy of CHA
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;       .reg    chd_cpy,        OStmp5          ; copy of CHD
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;       .reg    chc_cpy,        OStmp6          ; copy of CHC
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;       .reg    LTemp0,         OStmp7          ; local temp 0
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;       .reg    LTemp1,         OStmp8          ; local temp 1
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; ****************************************************************************

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