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1 30 unneback
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;  $Id: romlink,v 1.2 2001-09-27 11:59:42 chris Exp $
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;
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;#{
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;# SCCS INFORMATION:
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;# SID          = @(#)sa29200.lnk       4.1;    DLU=95/09/14-11:05:57
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;# Q            = @(#)  Copyright (C) 1995 Advanced Micro Devices, Inc.
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;# Module Type  = @(#)  OSBOOT/DBG_CORE absolute liker file (AMD-EPD-29K, AMIR)
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;# SCCS Path    = %P\%
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;# SCCS File    = %F\%
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;# FileName     = sa29200.lnk
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;# SCCS ID      = 4.1
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;# Date Update  = 14 Sep 1995, (DLU=95/09/14-11:05:57)
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;# Date Extract = 12 Oct 1995, (DLE=95/10/12-16:27:31)
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;#}
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; @(#)sa29200.lnk       3.6 94/08/22 11:58:54, Srini, AMD.
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; This is the linker command file used to bind the inrementally linked
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; osboot.o module to a memory map. This also defines some link-time constants
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; used in the code. These constants are genral for all 29K family members.
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; You only need to customize, if necessary, the definitions that affect
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; your target processor, and leave the rest alone.
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; The default values in this file are for binding osboot.o for use with
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; SA29200 stand-alone board with the -29200/-29205 option.
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;
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; Order the code segments according to the memory map structure.
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; The defaul OSBOOT has only .text and .bss sections. You need to ORDER
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; other sections of your applications that are not included below.
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; We use separate ORDER statements below to distinguish the two memory
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; regions used. The text section is bound to ROM memory region, and the
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; data region to RAM memory space.
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; MAKE SURE to order the BSS section at the very end. This is because the
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; BSS section size could get adjusted after linking with raminit.o (produced
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; by romcoff utility) or other initialization routines. This change in size
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; could affect the offsets used by the program to refer to the remaining data
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; sections that follow BSS.
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ALIGN   ProcInit=16
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ORDER   Reset=0x0
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ORDER   ProcInit,OsbText,.text,!text
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ORDER   .lit,!lit
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ORDER   vectable=0x40000000
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ORDER   msg_data=0x40000400
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ORDER   .data,!data
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ORDER   OsbBss,dbg_030,dbg_bss,cfg_bss,.bss,!bss
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ORDER   HeapBase
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ORDER   .comment
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; For Stand-Alone application out of ROM use the ORDER statements below:
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; For Stand-Alone application out of RAM use the ORDER statement below:
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;ORDER  Reset=0x40010000,ProcInit,OsbText,.text,!text,.lit,!lit,.data,!data,msg_data,dbg_dat,.bss,!bss,HeapBase,.comment
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;
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; definitions of link time constants used in code.
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;
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; Definition of the initial value of CPS register.
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; The value below is for an Am29200 processor. It sets TU, SM,DI, DA,IM fields
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; bits in the register. You may modify it to suit your target environment.
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; Like, changing the IM field for instance. IM is 0x11 by default enabling
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; all INTR[0-3] lines.
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;public _init_CPS=0x87F
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public  _init_CPS=0x20813
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;public  _init_CPS=0x2081F
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;public  _init_CPS=0x081F
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; Define the memory map in general values. The code - except for simulators -
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; configures the external RAM at run-time and updates the DMemSize value.
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; DMemStart and DMemSize are the most important values below. DMemStart is
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; used to initialize the vector base address register (VAB). And DMemSize
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; is used to find the highest addressable data memory to place the register
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; and memory stacks. Remember, DMemSize is configured at run-time for hardware
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; targets and updated.
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public  VectorBaseAddress=0x40000000
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public  IMemStart=0x0000000
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public  IMemSize=0xfffff
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public  DMemStart=0x40000000
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#public DMemStart=0x100000
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public  DMemSize=0xfffff
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#public DMemSize=0x17ffff
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#public DMemSize=0x3fffffff
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public  RMemStart=0x0
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public  RMemSize=0xfffff
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public  EnableDRAMSizing=1
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;
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; For the 29K Microcontrollers, you need to define the ROM Control register
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; value (RMCT_VALUE), the ROM Configuration register value (RMCF_VALUE), and
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; the DRAM Control register value (DRCT_VALUE) based on DMemSize specified
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; above. This could be overwritten in software targets such as the simulator.
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; ROM and RAM Control registers. ROM COnfiguration. (not valid for Am2900X,
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; Am29050, and Am2903X processors)
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; The DRAM REFRATE value (in DRCT) must be specified here. To disable
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; DRAM refreshing (on a system with no DRAM), set REFRATE field in DRCT
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; to zero. Otherwise, set it to the desired frequency. The default is 0xFF
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; The default values in this file are for Am2920X processors.
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;public RMCT_VALUE=0x03030303
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;public DRCT_VALUE=0x888800FF
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;public RMCF_VALUE=0x00f8f8f8
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;
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public  RMCT_VALUE=0x4a424300
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public  DRCT_VALUE=0xccc000f0
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public  RMCF_VALUE=0x011121ff
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;
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;
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; Execute trap handlers from ROM? If your trap handlers are in ROM space,
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; then set _TRAPINROM to TWO (0x2). It is used to modify the tarp vector
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; address installed to set the R bit when fetched. If the trap handlers in
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; ROM or if there is no ROM-space (no RE bit in CPS), set _TRAPINROM to ZERO.
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; The default in this file is for SA29200 board and _TRAPINROM is set to ZERO.
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public  _TRAPINROM=0
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;
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; Define the processor clock frequencies. These values are used by the HIF
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; kernel to provide some HIF services.
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public  TicksPerMillisecond=16000
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public  ClockFrequency=16000000
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;
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; There are some C functions which are not leaf functions. However, they are
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; no expected to spill or fill registers. We ensure that by setting up a
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; pseudo register stack before calling those functions. The code generated
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; for those functions however do have the prologue and epilogue which refer
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; to the symbols V_SPILL and V_FILL. The linker does not know about these
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; symbols. So we define it here so that it does not complain.
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; If you use the hc29 compiler driver to link the objects it will warn that
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; the definitions here are already internally defined. You
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; can use hc29 with -nocrt0 option to do the linking for linear memory spaces.
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; public        V_SPILL=64
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; public        V_FILL=65
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;
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; Set the UART debug/monitor port serial communications baud rate.
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;
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public UCLK=32000000
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; INITBAUD defines the cold start baud rate. This is the baud rate
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; the monitor would use when powered up. This can be overridden by
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; defining BAUDRATE on the assembler/compiler command line.
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public INITBAUD=9600
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;
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; Is there a SCC 8530 on the target?
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; If there is an 8530 SC on target, define the symbols below appropriately.
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; The routines in scc8530.s use these values to access the registers of
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; SCC and program it. The default values are for EZ030 target.
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; Baudrate can be specified on the command-line to override the default
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; baud rate defined in scc8530.s.
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; scc channel A control
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;public SCC8530_CHA_CONTROL=0xC0000007
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; scc channel B control
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;public SCC8530_CHB_CONTROL=0xC0000003
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; scc channel A data
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;public SCC8530_CHA_DATA=0xC000000F
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; scc channel B data
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;public SCC8530_CHB_DATA=0xC000000B
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; scc baud clock generator
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;public SCC8530_BAUD_CLK_ENBL=3

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