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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [hppa1.1/] [simhppa/] [shmsupp/] [getcfg.c] - Blame information for rev 173

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1 30 unneback
/*  void Shm_Get_configuration( localnode, &shmcfg )
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 *
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 *  This routine initializes, if necessary, and returns a pointer
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 *  to the Shared Memory Configuration Table for the HP PA-RISC
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 *  simulator.
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 *
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 *  INPUT PARAMETERS:
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 *    localnode - local node number
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 *    shmcfg    - address of pointer to SHM Config Table
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 *
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 *  OUTPUT PARAMETERS:
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 *    *shmcfg   - pointer to SHM Config Table
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 *
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 *  NOTES:  The MP interrupt used is the Runway bus' ability to directly
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 *          address the control registers of up to four CPUs and cause
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 *          interrupts on them.
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 *
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 *          The following table illustrates the configuration limitations:
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 *
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 *                                   BUS     MAX
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 *                          MODE    ENDIAN  NODES
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 *                        ========= ====== =======
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 *                         POLLED    BIG    2+
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 *                        INTERRUPT  BIG    2..4 (on Runway)
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: getcfg.c,v 1.2 2001-09-27 11:59:45 chris Exp $
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 */
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#include <bsp.h>
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#include <shm_driver.h>
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#define INTERRUPT 0        /* can be interrupt or polling */
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#define POLLING   1
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#define HPPA_RUNWAY_PROC_HPA_BASE  ((void *) 0xFFFA0000)
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/* given a processor number, where is its HPA? */
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#define HPPA_RUNWAY_HPA(cpu)   \
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  ((rtems_unsigned32) (HPPA_RUNWAY_PROC_HPA_BASE + ((cpu) * 0x2000)))
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#define HPPA_RUNWAY_REG_IO_EIR_OFFSET   0x000
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shm_config_table BSP_shm_cfgtbl;
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extern void Shm_Cause_interrupt_pxfl( rtems_unsigned32 node );
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void Shm_Get_configuration(
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  rtems_unsigned32   localnode,
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  shm_config_table **shmcfg
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)
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{
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   BSP_shm_cfgtbl.base         = (vol_u32 *) 0x44000000;
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   BSP_shm_cfgtbl.length       = 16 * KILOBYTE;
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   BSP_shm_cfgtbl.format       = SHM_BIG;
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   BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt_pxfl;
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#ifdef NEUTRAL_BIG
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   BSP_shm_cfgtbl.convert      = NULL_CONVERT;
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#else
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   BSP_shm_cfgtbl.convert      = CPU_swap_u32;
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#endif
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#if ( POLLING == 1 )
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   BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
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   BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
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   BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
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   BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
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#else
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   BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
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   BSP_shm_cfgtbl.Intr.address =
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        (vol_u32 *) (HPPA_RUNWAY_HPA( localnode - 1) +
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                     HPPA_RUNWAY_REG_IO_EIR_OFFSET);
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   BSP_shm_cfgtbl.Intr.value   = HPPA_INTERRUPT_EXTERNAL_MPCI;
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   BSP_shm_cfgtbl.Intr.length  = LONG;
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#endif
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   *shmcfg = &BSP_shm_cfgtbl;
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}
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