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/*-------------------------------------------------------------------------+
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| ldsegs.s v1.1 - PC386 BSP - 1997/08/07
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+--------------------------------------------------------------------------+
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| This file assists the board independent startup code by loading the proper
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| segment register values. The values loaded are board dependent. In addition
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| it contains code to enable the A20 line and to reprogram the PIC to relocate
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| the IRQ interrupt vectors to 0x20 -> 0x2f.
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| NOTE: No stack has been established when this routine is invoked.
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| It returns by jumping back to bspentry.
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+--------------------------------------------------------------------------+
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| (C) Copyright 1997 -
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| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
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| http://pandora.ist.utl.pt
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| Instituto Superior Tecnico * Lisboa * PORTUGAL
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+--------------------------------------------------------------------------+
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| Disclaimer:
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| This file is provided "AS IS" without warranty of any kind, either
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| expressed or implied.
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+--------------------------------------------------------------------------+
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| This code is base on:
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| ldsegs.s,v 1.4 1996/04/20 16:48:30 joel Exp - go32 BSP
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| With the following copyright notice:
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| **************************************************************************
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| * COPYRIGHT (c) 1989-1999.
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| * On-Line Applications Research Corporation (OAR).
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| *
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| * The license and distribution terms for this file may be
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| * found in found in the file LICENSE in this distribution or at
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| * http://www.OARcorp.com/rtems/license.html.
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| **************************************************************************
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| $Id: ldsegs.S,v 1.2 2001-09-27 11:59:48 chris Exp $
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+--------------------------------------------------------------------------*/
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#include "asm.h"
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/*----------------------------------------------------------------------------+
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| CODE section
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+----------------------------------------------------------------------------*/
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EXTERN (rtems_i8259_masks)
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BEGIN_CODE
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EXTERN (_establish_stack)
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EXTERN (Timer_exit)
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EXTERN (clockOff)
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/*----------------------------------------------------------------------------+
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| pc386_delay
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+------------------------------------------------------------------------------
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| Delay is needed after doing I/O.
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| The outb version is OK on most machines BUT the loop version ...
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| will delay for 1us on 1Gz machine, it will take a little bit
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| longer on slower machines, however, it does not matter because we
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| are going to call this function only a few times
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+----------------------------------------------------------------------------*/
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#define DELAY_USE_OUTB
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.p2align 4
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.globl _pc386_delay
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.globl pc386_delay
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pc386_delay:
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_pc386_delay:
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#ifdef DELAY_USE_OUTB
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outb al, $0x80 # about 1uS delay on most machines
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#else
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movl $0x200, eax
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pc386_delay1:
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dec eax
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jnz pc386_delay1
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#endif
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ret
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/*-------------------------------------------------------------------------+
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| Function: _load_segments
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| Description: Current environment is standard PC booted by grub.
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| So, there is no value in saving current GDT and IDT
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| settings we have to set it up ourseves. (Naturally
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| it will be not so in case we are booted by some
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| boot monitor, however, then it will be different
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| BSP). After that we have to load board segment registers
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| with apropriate values + reprogram PIC.
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| Global Variables: None.
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| Arguments: None.
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| Returns: Nothing.
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+--------------------------------------------------------------------------*/
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.p2align 4
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PUBLIC (_load_segments)
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SYM (_load_segments):
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lgdt SYM(gdtdesc)
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lidt SYM(idtdesc)
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/* Load CS, flush prefetched queue */
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ljmp $0x8, $next_step
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next_step:
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/* Load segment registers */
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movw $0x10, ax
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movw ax, ss
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movw ax, ds
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movw ax, es
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movw ax, fs
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movw ax, gs
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/*---------------------------------------------------------------------+
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| Now we have to reprogram the interrupts :-(. We put them right after
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| the intel-reserved hardware interrupts, at int 0x20-0x2F. There they
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| won't mess up anything. Sadly IBM really messed this up with the
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| original PC, and they haven't been able to rectify it afterwards. Thus
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| the bios puts interrupts at 0x08-0x0f, which is used for the internal
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| hardware interrupts as well. We just have to reprogram the 8259's, and
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| it isn't fun.
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+---------------------------------------------------------------------*/
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movb $0x11, al /* initialization sequence */
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outb al, $0x20 /* send it to 8259A-1 */
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call SYM(pc386_delay)
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outb al, $0xA0 /* and to 8259A-2 */
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call SYM(pc386_delay)
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movb $0x20, al /* start of hardware int's (0x20) */
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outb al, $0x21
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call SYM(pc386_delay)
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movb $0x28, al /* start of hardware int's 2 (0x28) */
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outb al, $0xA1
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call SYM(pc386_delay)
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movb $0x04, al /* 8259-1 is master */
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outb al, $0x21
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call SYM(pc386_delay)
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movb $0x02, al /* 8259-2 is slave */
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outb al, $0xA1
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call SYM(pc386_delay)
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movb $0x01, al /* 8086 mode for both */
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outb al, $0x21
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call SYM(pc386_delay)
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outb al, $0xA1
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call SYM(pc386_delay)
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movb $0xFF, al /* mask off all interrupts for now */
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outb al, $0xA1
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call SYM(pc386_delay)
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movb $0xFB, al /* mask all irq's but irq2 which */
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outb al, $0x21 /* is cascaded */
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call SYM(pc386_delay)
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movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */
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jmp SYM (_establish_stack) # return to the bsp entry code
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/*-------------------------------------------------------------------------+
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| Function: _return_to_monitor
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| Description: Return to board's monitor (we have none so simply restart).
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| Global Variables: None.
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| Arguments: None.
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| Returns: Nothing.
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+--------------------------------------------------------------------------*/
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.p2align 4
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PUBLIC (_return_to_monitor)
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SYM (_return_to_monitor):
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call SYM (Timer_exit)
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call SYM (Clock_exit)
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jmp SYM (start)
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/*-------------------------------------------------------------------------+
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| Function: _default_int_handler
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| Description: default interrupt handler
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| Global Variables: None.
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| Arguments: None.
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| Returns: Nothing.
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+--------------------------------------------------------------------------*/
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.p2align 4
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/*---------------------------------------------------------------------------+
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| GDT itself
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+--------------------------------------------------------------------------*/
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.p2align 4
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PUBLIC (_Global_descriptor_table)
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SYM (_Global_descriptor_table):
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/* NULL segment */
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.word 0, 0
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.byte 0, 0, 0, 0
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/* code segment */
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.word 0xffff, 0
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.byte 0, 0x9e, 0xcf, 0
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/* data segment */
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.word 0xffff, 0
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.byte 0, 0x92, 0xcf, 0
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/*---------------------------------------------------------------------------+
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| Descriptor of GDT
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+--------------------------------------------------------------------------*/
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SYM (gdtdesc):
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.word (3*8 - 1)
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.long SYM (_Global_descriptor_table)
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/*---------------------------------------------------------------------------+
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| IDT itself
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+---------------------------------------------------------------------------*/
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.p2align 4
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PUBLIC(Interrupt_descriptor_table)
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SYM(Interrupt_descriptor_table):
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.rept 256
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.word 0,0,0,0
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.endr
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/*---------------------------------------------------------------------------+
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| Descriptor of IDT
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+--------------------------------------------------------------------------*/
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SYM(idtdesc):
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.word (256*8 - 1)
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.long SYM (Interrupt_descriptor_table)
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END_CODE
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.section .m_hdr
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.long 0x1BADB002
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.long 0
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.long 0xE4524FFE
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END
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