OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [i386/] [shared/] [irq/] [irq_init.c] - Blame information for rev 173

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/* irq_init.c
2
 *
3
 *  This file contains the implementation of rtems initialization
4
 *  related to interrupt handling.
5
 *
6
 *  CopyRight (C) 1998 valette@crf.canon.fr
7
 *
8
 *  The license and distribution terms for this file may be
9
 *  found in the file LICENSE in this distribution or at
10
 *  http://www.OARcorp.com/rtems/license.html.
11
 *
12
 *  $Id: irq_init.c,v 1.2 2001-09-27 11:59:49 chris Exp $
13
 */
14
 
15
#include <libcpu/cpu.h>
16
#include <irq.h>
17
#include <bsp.h>
18
#include <bspIo.h>
19
 
20
/*
21
 * rtems prologue generated in irq_asm.S
22
 */
23
extern void rtems_irq_prologue_0();
24
extern void rtems_irq_prologue_1();
25
extern void rtems_irq_prologue_2();
26
extern void rtems_irq_prologue_3();
27
extern void rtems_irq_prologue_4();
28
extern void rtems_irq_prologue_5();
29
extern void rtems_irq_prologue_6();
30
extern void rtems_irq_prologue_7();
31
extern void rtems_irq_prologue_8();
32
extern void rtems_irq_prologue_9();
33
extern void rtems_irq_prologue_10();
34
extern void rtems_irq_prologue_11();
35
extern void rtems_irq_prologue_12();
36
extern void rtems_irq_prologue_13();
37
extern void rtems_irq_prologue_14();
38
extern void rtems_irq_prologue_15();
39
/*
40
 * default idt vector
41
 */
42
extern void default_raw_idt_handler();
43
/*
44
 * default on/off function
45
 */
46
static void nop_func(){}
47
/*
48
 * default isOn function
49
 */
50
static int not_connected() {return 0;}
51
 
52
 
53
static rtems_raw_irq_connect_data       idtHdl[IDT_SIZE];
54
 
55
/*
56
 * Table used to store rtems managed interrupt handlers.
57
 * Borrow the table to store raw handler entries at the beginning.
58
 * The table will be reinitialized before the call to BSP_rtems_irq_mngt_set().
59
 */
60
static rtems_irq_connect_data           rtemsIrq[BSP_IRQ_LINES_NUMBER] = {
61
  {0,(rtems_irq_hdl)rtems_irq_prologue_0},
62
  {0,(rtems_irq_hdl)rtems_irq_prologue_1},
63
  {0,(rtems_irq_hdl)rtems_irq_prologue_2},
64
  {0,(rtems_irq_hdl)rtems_irq_prologue_3},
65
  {0,(rtems_irq_hdl)rtems_irq_prologue_4},
66
  {0,(rtems_irq_hdl)rtems_irq_prologue_5},
67
  {0,(rtems_irq_hdl)rtems_irq_prologue_6},
68
  {0,(rtems_irq_hdl)rtems_irq_prologue_7},
69
  {0,(rtems_irq_hdl)rtems_irq_prologue_8},
70
  {0,(rtems_irq_hdl)rtems_irq_prologue_9},
71
  {0,(rtems_irq_hdl)rtems_irq_prologue_10},
72
  {0,(rtems_irq_hdl)rtems_irq_prologue_11},
73
  {0,(rtems_irq_hdl)rtems_irq_prologue_12},
74
  {0,(rtems_irq_hdl)rtems_irq_prologue_13},
75
  {0,(rtems_irq_hdl)rtems_irq_prologue_14},
76
  {0,(rtems_irq_hdl)rtems_irq_prologue_15}
77
};
78
 
79
static rtems_raw_irq_connect_data       defaultRawIrq = {
80
  /* vectorIdex,         hdl                          , on      , off           , isOn */
81
  0,                     default_raw_idt_handler ,nop_func       , nop_func,     not_connected
82
};
83
 
84
static rtems_irq_connect_data           defaultIrq = {
85
  /* vectorIdex,         hdl            , on            , off           , isOn */
86
  0,                      nop_func       , nop_func      , nop_func      , not_connected
87
};
88
 
89
static rtems_irq_prio irqPrioTable[BSP_IRQ_LINES_NUMBER]={
90
  /*
91
   * actual rpiorities for interrupt :
92
   *    0   means that only current interrupt is masked
93
   *    255 means all other interrupts are masked
94
   * The second entry has a priority of 255 because
95
   * it is the slave pic entry and is should always remain
96
   * unmasked.
97
   */
98
  0,0,
99
  255,
100
  0, 0, 0, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0
101
};
102
 
103
 
104
 
105
static interrupt_gate_descriptor        idtEntry;
106
 
107
static rtems_irq_global_settings     initial_config;
108
static rtems_raw_irq_global_settings raw_initial_config;
109
 
110
void raw_idt_notify()
111
{
112
  printk("raw_idt_notify has been called \n");
113
}
114
 
115
void  rtems_irq_mngt_init()
116
{
117
    int                         i;
118
    interrupt_gate_descriptor*  idt_entry_tbl;
119
    unsigned int                limit;
120
    unsigned int                level;
121
 
122
    i386_get_info_from_IDTR(&idt_entry_tbl, &limit);
123
 
124
    /* Convert into number of entries */
125
    limit = (limit + 1)/sizeof(interrupt_gate_descriptor);
126
 
127
    if(limit != IDT_SIZE) {
128
       printk("IDT table size mismatch !!! System locked\n");
129
       while(1);
130
    }
131
 
132
 
133
    _CPU_ISR_Disable(level);
134
 
135
    /*
136
     * Init the complete IDT vector table with defaultRawIrq value
137
     */
138
    for (i = 0; i < IDT_SIZE ; i++) {
139
      idtHdl[i]          = defaultRawIrq;
140
      idtHdl[i].idtIndex = i;
141
    }
142
 
143
    raw_initial_config.idtSize = IDT_SIZE;
144
    raw_initial_config.defaultRawEntry = defaultRawIrq;
145
    raw_initial_config.rawIrqHdlTbl = idtHdl;
146
 
147
    if (!i386_init_idt (&raw_initial_config)) {
148
      /*
149
       * put something here that will show the failure...
150
       */
151
      printk("Unable to initialize IDT!!! System locked\n");
152
      while (1);
153
    }
154
    /*
155
     * Patch the entry that will be used by RTEMS for interrupt management
156
     * with RTEMS prologue.
157
     */
158
    for (i = 0; i < BSP_IRQ_LINES_NUMBER; i++) {
159
      create_interrupt_gate_descriptor(&idtEntry,(rtems_raw_irq_hdl) rtemsIrq[i].hdl);
160
      idt_entry_tbl[i + BSP_ASM_IRQ_VECTOR_BASE] = idtEntry;
161
    }
162
    /*
163
     * At this point we have completed the initialization of IDT
164
     * with raw handlers.  We must now initialize the higher level
165
     * interrupt management.
166
     */
167
    /*
168
     * re-init the rtemsIrq table
169
     */
170
    for (i = 0; i < BSP_IRQ_LINES_NUMBER; i++) {
171
      rtemsIrq[i]      = defaultIrq;
172
      rtemsIrq[i].name = i;
173
    }
174
    /*
175
     * Init initial Interrupt management config
176
     */
177
    initial_config.irqNb        = BSP_IRQ_LINES_NUMBER;
178
    initial_config.defaultEntry = defaultIrq;
179
    initial_config.irqHdlTbl    = rtemsIrq;
180
    initial_config.irqBase      = BSP_ASM_IRQ_VECTOR_BASE;
181
    initial_config.irqPrioTbl   = irqPrioTable;
182
 
183
    if (!BSP_rtems_irq_mngt_set(&initial_config)) {
184
      /*
185
       * put something here that will show the failure...
186
       */
187
      printk("Unable to initialize RTEMS interrupt Management!!! System locked\n");
188
      while (1);
189
    }
190
 
191
    /*
192
     * #define DEBUG
193
     */
194
#ifdef DEBUG
195
    {
196
      /*
197
       * following adresses should be the same
198
       */
199
      unsigned tmp;
200
 
201
      printk("idt_entry_tbl =  %x Interrupt_descriptor_table addr = %x\n",
202
             idt_entry_tbl, &Interrupt_descriptor_table);
203
      tmp = (unsigned) get_hdl_from_vector (BSP_ASM_IRQ_VECTOR_BASE + BSP_PERIODIC_TIMER);
204
      printk("clock isr address from idt = %x should be %x\n",
205
             tmp, (unsigned) rtems_irq_prologue_0);
206
    }
207
    printk("i8259s_cache = %x\n", * (unsigned short*) &i8259s_cache);
208
    BSP_wait_polled_input();
209
#endif    
210
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.