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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [i386/] [ts_386ex/] [include/] [bsp.h] - Blame information for rev 593

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/*
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 *  This include file definitions related to an Intel i386ex board.
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: bsp.h,v 1.2 2001-09-27 11:59:50 chris Exp $
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 */
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#ifndef __TS386_h
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#define __TS386_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rtems.h>
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#include <iosupp.h>
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#include <console.h>
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#include <clockdrv.h>
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#include <bspIo.h>
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#include <irq.h>
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/*
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 *  confdefs.h overrides for this BSP:
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 *   - termios serial ports (defaults to 1)
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 *   - Interrupt stack space is not minimum if defined.
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 */
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/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
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#define CONFIGURE_INTERRUPT_STACK_MEMORY  (8 * 1024)
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/*
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 * Network driver configuration
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 */
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struct rtems_bsdnet_ifconfig;
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extern int rtems_ne_driver_attach (struct rtems_bsdnet_ifconfig *config);
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extern void Wait_X_ms (unsigned);
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#define RTEMS_BSP_NETWORK_DRIVER_NAME         "ne1"
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#define RTEMS_BSP_NETWORK_DRIVER_ATTACH       rtems_ne_driver_attach
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#define NE2000_BYTE_TRANSFERS
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/*
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 * Constants relating to the 8254 (or 8253) programmable interval timers.
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 */
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#define TIMER_CONFIG   0xF834
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#define IO_TIMER1      0xF040
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  /* Port address of the control port and timer channels */
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#define TIMER_CNTR0    (IO_TIMER1 + 0) /* timer 0 counter port           */
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#define TIMER_CNTR1    (IO_TIMER1 + 1) /* timer 1 counter port           */
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#define TIMER_CNTR2    (IO_TIMER1 + 2) /* timer 2 counter port           */
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#define TIMER_MODE     (IO_TIMER1 + 3) /* timer mode port                */
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#define TIMER_SEL0     0x00            /* select counter 0               */
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#define TIMER_SEL1     0x40            /* select counter 1               */
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#define TIMER_SEL2     0x80            /* select counter 2               */
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#define TIMER_INTTC    0x00            /* mode 0, intr on terminal cnt   */
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#define TIMER_ONESHOT  0x02            /* mode 1, one shot               */
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#define TIMER_RATEGEN  0x04            /* mode 2, rate generator         */
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#define TIMER_SQWAVE   0x06            /* mode 3, square wave            */
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#define TIMER_SWSTROBE 0x08            /* mode 4, s/w triggered strobe   */
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#define TIMER_HWSTROBE 0x0a            /* mode 5, h/w triggered strobe   */
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#define TIMER_LATCH    0x00            /* latch counter for reading      */
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#define TIMER_LSB      0x10            /* r/w counter LSB                */
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#define TIMER_MSB      0x20            /* r/w counter MSB                */
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#define TIMER_16BIT    0x30            /* r/w counter 16 bits, LSB first */
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#define TIMER_BCD      0x01            /* count in BCD                   */
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/*
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 *  Define the time limits for RTEMS Test Suite test durations.
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 *  Long test and short test duration limits are provided.  These
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 *  values are in seconds and need to be converted to ticks for the
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 *  application.
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 *
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 */
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#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
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#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
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/*
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 *  Define the interrupt mechanism for Time Test 27
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 *
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 *  NOTE: Use a software interrupt for the i386.
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 */
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#define MUST_WAIT_FOR_INTERRUTPT 0
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#define Install_tm27_vector(handler) \
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{ \
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  rtems_isr_entry dummy; \
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  rtems_interrupt_catch(handler, 0x90, &dummy); \
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}
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#define Cause_tm27_intr()              asm volatile( "int $0x90" : : );
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#define Clear_tm27_intr()
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#define Lower_tm27_intr()
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/*
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 *  Simple spin delay in microsecond units for device drivers.
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 *  This is very dependent on the clock speed of the target.
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 */
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#define delay( _microseconds ) \
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  { \
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    rtems_unsigned32 _counter; \
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    \
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    _counter = (_microseconds); \
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    \
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    asm volatile ( "0: nop;" \
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                   " mov %0,%0 ;" \
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                   " loop 0b" : "=c" (_counter) \
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                              : "0"  (_counter) \
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                 ); \
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    \
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  }
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/* Constants */
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#define RAM_START 0
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/* replaced the earlier EI kludge of 0xfffff */
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#define RAM_END   0x200000
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/* I/O addressing */
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/*
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 *#define Is_tx_ready( _status ) ( (_status) & 0x20 )
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 */
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/* dec 20. try the TE instead of TBE as the check */
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#define Is_tx_ready( _status ) ( (_status) & 0x40 )
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#define Is_rx_ready( _status ) ( (_status) & 0x01 )
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/* Structures */
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#ifdef F386_INIT
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#undef BSP_EXTERN
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#define BSP_EXTERN
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#else
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#undef BSP_EXTERN
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#define BSP_EXTERN extern
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#endif
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/*
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 *  Device Driver Table Entries
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 */
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/*
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 * NOTE: Use the standard Console driver entry
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 */
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/*
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 * NOTE: Use the standard Clock driver entry
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 */
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/* miscellaneous stuff assumed to exist */
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extern rtems_configuration_table BSP_Configuration;
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#define IDT_SIZE 256
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#define GDT_SIZE 3
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extern interrupt_gate_descriptor Interrupt_descriptor_table[IDT_SIZE];
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extern segment_descriptors Global_descriptor_table   [GDT_SIZE];
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BSP_EXTERN unsigned short Idt[3];  /* Interrupt Descriptor Table Address */
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BSP_EXTERN unsigned short Gdt[3];  /* Global Descriptor Table Address */
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BSP_EXTERN unsigned int   Idt_base;
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BSP_EXTERN unsigned int   Gdt_base;
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/* routines */
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#ifdef __cplusplus
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}
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#endif
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#endif
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/* end of include file */

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