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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [i960/] [rxgen960/] [startup/] [cntrltbl.h] - Blame information for rev 173

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1 30 unneback
/*-------------------------------------*/
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/* cntrltbl.h                          */
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/* Last change : 11. 1.95              */
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/*-------------------------------------*/
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/*
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 *  $Id: cntrltbl.h,v 1.2 2001-09-27 11:59:59 chris Exp $
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 */
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#ifndef _CNTRLTBL_H_
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#define _CNTRLTBL_H_
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  /* Control Table Entry.
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   */
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typedef unsigned int ControlTblEntry;
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  /* Control Table itself.
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   */
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extern ControlTblEntry controlTbl[];
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extern ControlTblEntry rom_controlTbl[];
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  /* Interrupt Registers Initial.
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   */
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#define IPB0            0
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#define IPB1            0 
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#define DAB0            0  
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#define DAB1            0  
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#define I_DISABLE       (0x1<<10) 
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#define I_ENABLE        0 
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#define MSK_UNCHNG      0
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#define MSK_CLEAR  (0x1<<11) 
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#define VECTOR_CACHE    (0x1<<13) 
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  /* BreakPoint Control Register Initial.
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   */
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#define BPCON           0  
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  /* Bus Controller Mode Comstants.
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  */
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#define CONF_TBL_VALID  0x1
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#define PROTECT_RAM     0x2  
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#define PROTECT_RAM_SUP 0x4
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#endif   
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/*-------------*/
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/* End of file */
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/*-------------*/
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