OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [i960/] [rxgen960/] [startup/] [nmi.c] - Blame information for rev 562

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*
2
 *  $Id: nmi.c,v 1.2 2001-09-27 11:59:59 chris Exp $
3
 */
4
 
5
int mach_error_expected = 0;
6
void nmi_isr(void)
7
{
8
        if( mach_error_expected)
9
        {
10
                mach_error_expected = 0;
11
        }
12
        else{
13
                kkprintf("NMI Interrupt Occured \n");
14
        }
15
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.