OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [i960/] [rxgen960/] [startup/] [rom.ld] - Blame information for rev 173

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback 
/*------------------------------------*/
2 
/* rom.ld                             */
3 
/* Last change : 19. 4.95             */
4 
/*------------------------------------*
5 
 * To build ROM based i960 image.
6 
 *------------------------------------*/
7 
 
8 
/*
9 
 *  $Id: rom.ld,v 1.2 2001-09-27 11:59:59 chris Exp $
10 
 */
11 
 
12 
 
13 
MEMORY
14 
{
15 
  config : org = 0xFeffFF30, len = 0xd0
16 
  eprom  : org = 0xfef80000, len = 120K
17 
  sram   : org = 0xA0000000, len = 128K
18 
}
19 
 
20 
_rom_ibr_cksum = -(_romStart + _rom_prcb);
21 
 
22 
_bootAddr = 0xa0200000;
23 
_HEAP = 0xA0100000 ;
24 
 
25 
SECTIONS
26 
{
27 
  prcb :
28 
    {
29 
      rom_ibr.o960
30 
    } > config
31 
 
32 
    /* Only monitor start point and fault handler
33 
     * will live in ROM as far as text is concerned.
34 
     * Only fault table will live in ROM as far as data
35 
     * is concerned.
36 
     */
37 
  romCode :
38 
    {
39 
        /* Make sure that the monitor start point
40 
         * is the first location in EPROM.
41 
         */
42 
      rommon.o960(.text)
43 
        /* Procedures to copy code and
44 
         * initialize bss in RAM.
45 
         */
46 
      sctns.o960(.text)
47 
        /* Make Sure Fault Table (and its handler's data)
48 
         * live here so that they wouldn't get destroyed).
49 
         */
50 
      asmfault.o960
51 
      flttbl.o960
52 
        /* 16 byte aligned PRCB.
53 
         */
54 
      . = ALIGN(16);
55 
      rom_prcb.o960(.data)
56 
        /* 16 byte aligned Control Table.
57 
         */
58 
      . = ALIGN(16);
59 
      rom_cntrltbl.o960(.data)
60 
      . = ALIGN(16);
61 
        intrtbl.o960(.data)
62 
      . = ALIGN(16);
63 
        nulsystbl.o960(.data)
64 
      . = ALIGN(16);
65 
        /* I need this symbol to know where code which is
66 
         * to be copied reside in ROM. Align it on a 16
67 
         * boundary.
68 
         */
69 
      . = ALIGN(16);
70 
      _codeRomStart = .;
71 
    } > eprom
72 
 
73 
    /* All the rest of the code will live in RAM.
74 
     * Relocation are created as though code resides
75 
     * in RAM, while code is placed right after romCode.
76 
     * This is responsiblity of the ROM monitor to
77 
     * copy code into ROM.
78 
     */
79 
  ramCode : AT(ADDR(romCode) + SIZEOF(romCode))
80 
    {
81 
        /* RAM-based code section start.
82 
         * I need this symbol to know where to copy code
83 
         * at initialization time .
84 
         */
85 
      _codeRamStart = .;
86 
        /* RAM based fault recovery stuff.
87 
         */
88 
      _faultStart = .;
89 
      fault.o960
90 
      _faultEnd = .;
91 
        /* Check sum to gurantee that
92 
         * the above section wasn't broken.
93 
         */
94 
      . = ALIGN(16);
95 
      _faultCheckSum = .;
96 
      . += 4;
97 
        /* Fault Buffer to keep the state of
98 
         * the fauled procedure.
99 
         */
100 
      _faultBuffer = .;
101 
      . += 256;
102 
        /* All the rest of the text goes here.
103 
         */
104 
      . = ALIGN(16);
105 
      *(.text)
106 
        /* 16 byte aligned PRCB.
107 
         */
108 
      . = ALIGN(16);
109 
      prcb.o960(.data)
110 
        /* 16 byte aligned Control Table.
111 
         */
112 
      . = ALIGN(16);
113 
      cntrltbl.o960(.data)
114 
      . = ALIGN(16);
115 
        systbl.o960(.data)
116 
        /* All the rest of program defined data goes here.
117 
         */
118 
      *(.data)
119 
        /* RAM-based code section end.
120 
         * I need this symbol to know where to copy code
121 
         * at initialization time .
122 
         */
123 
      _codeRamEnd = .;
124 
    } > sram
125 
 
126 
    /* RAM based uninitialized data.
127 
     */
128 
  bss (NOLOAD) :
129 
    {
130 
        /* BSS section start. I need this symbol to
131 
         * zero BSS on initialization.
132 
         */
133 
      _bssStart = .;
134 
        /* Supervisor Stack. Aligned on a 16 boundary.
135 
         */
136 
      . = ALIGN(16);
137 
      _svrStackPtr = .;
138 
      . += 4K;
139 
        /* Interrupt Stack. Aligned on a 16 boundary.
140 
         */
141 
      . = ALIGN(16);
142 
      _intStackPtr = .;
143 
      . += 4K;
144 
        /* Program defined BSS.
145 
         */
146 
      *(.bss)
147 
        /* Program defined COMMON.
148 
         */
149 
      *(COMMON)
150 
        /* BSS section end. I need this symbol to
151 
         * zero BSS on initialization.
152 
         */
153 
      _bssEnd = .;
154 
      _bssStart_1 = .;
155 
      _bssEnd_1 = .;
156 
    } > sram
157 
 
158 
}
159 
 
160 
/*-------------*/
161 
/* End of file */
162 
/*-------------*/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.