OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [i960/] [rxgen960/] [startup/] [sctns.h] - Blame information for rev 562

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*-------------------------------------*/
2
/* sctns.h                             */
3
/* Last change : 10.10.94              */
4
/*-------------------------------------*/
5
/*
6
 *  $Id: sctns.h,v 1.2 2001-09-27 11:59:59 chris Exp $
7
 */
8
 
9
#ifndef _SCTNS_H_
10
#define _SCTNS_H_
11
 
12
  /* Copy all code into SRAM.
13
   * Fault Table and Fault Handler stays in EPROM to not be
14
   * destroyed by a buggy user program. Beyond that only
15
   * monitor Start point and procedures to copy code
16
   * into RAM will be relocated in ROM.
17
   */
18
extern void copyCodeToRam(void);
19
  /* Zero uninitialized section.
20
   */
21
extern void zeroBss(void);
22
 
23
  /* Some relocation symbols. These
24
   * symbols are defined in rom.ld.
25
   */
26
extern unsigned int codeRomStart[];
27
extern unsigned int codeRamStart[];
28
extern unsigned int codeRamEnd[];
29
 
30
extern unsigned int bssStart[];
31
extern unsigned int bssEnd[];
32
 
33
#endif
34
/*-------------*/
35
/* End of file */
36
/*-------------*/
37
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.