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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [dmv152/] [clock/] [ckinit.c] - Blame information for rev 30

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1 30 unneback
/*  Clock_init()
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 *
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 *  This routine initializes the Z80386 1 on the MVME136 board.
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 *  The tick frequency is 1 millisecond.
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 *
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 *  Input parameters:  NONE
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 *
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 *  Output parameters:  NONE
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: ckinit.c,v 1.2 2001-09-27 12:00:00 chris Exp $
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 */
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#include <stdlib.h>
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#include <bsp.h>
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#include <rtems/libio.h>
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rtems_unsigned32 Clock_isrs;        /* ISRs until next tick */
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volatile rtems_unsigned32 Clock_driver_ticks;
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                                    /* ticks since initialization */
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rtems_isr_entry  Old_ticker;
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void Clock_exit( void );
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#define CLOCK_VECTOR  TIMER_VECTOR
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/*
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 * These are set by clock driver during its init
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 */
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rtems_device_major_number rtems_clock_major = ~0;
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rtems_device_minor_number rtems_clock_minor;
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/*
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 *  ISR Handler
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 */
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rtems_isr Clock_isr(
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  rtems_vector_number vector
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)
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{
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  Clock_driver_ticks += 1;
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  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xE2 );
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  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x22 );
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  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 );
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  if ( Clock_isrs == 1 ) {
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    rtems_clock_tick();
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    Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
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  }
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  else
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    Clock_isrs -= 1;
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}
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void Install_clock(
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  rtems_isr_entry clock_isr
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)
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{
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  rtems_unsigned8 data;
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  Clock_driver_ticks = 0;
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  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
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  Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
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  Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 );
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  Z8x36_READ ( TIMER, MASTER_INTR, data );
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  Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) );
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  Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 );
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  Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE );
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  Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 );
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  Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, CLOCK_VECTOR );
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  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 );
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  Z8x36_READ ( TIMER, MASTER_INTR, data );
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  Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 );
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  /*
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   * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6
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   */
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  data = (*(rtems_unsigned8 *)0x0D00000B);
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  (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60;
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  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 );
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  atexit( Clock_exit );
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}
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void Clock_exit( void )
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{
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  rtems_unsigned8 data;
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  Z8x36_READ ( TIMER, MASTER_INTR, data );
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  Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) );
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  /* do not restore old vector */
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}
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rtems_device_driver Clock_initialize(
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  rtems_device_major_number major,
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  rtems_device_minor_number minor,
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  void *pargp
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)
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{
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  Install_clock( Clock_isr );
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  /*
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   * make major/minor avail to others such as shared memory driver
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   */
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  rtems_clock_major = major;
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  rtems_clock_minor = minor;
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  return RTEMS_SUCCESSFUL;
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}
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rtems_device_driver Clock_control(
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  rtems_device_major_number major,
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  rtems_device_minor_number minor,
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  void *pargp
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)
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{
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    rtems_unsigned32 isrlevel;
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    rtems_libio_ioctl_args_t *args = pargp;
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    if (args == 0)
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        goto done;
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    /*
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     * This is hokey, but until we get a defined interface
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     * to do this, it will just be this simple...
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     */
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    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
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    {
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        Clock_isr(CLOCK_VECTOR);
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    }
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    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
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    {
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      rtems_interrupt_disable( isrlevel );
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       (void) set_vector( args->buffer, CLOCK_VECTOR, 1 );
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      rtems_interrupt_enable( isrlevel );
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    }
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done:
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    return RTEMS_SUCCESSFUL;
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}
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