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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [efi68k/] [README] - Blame information for rev 173

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#
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#  $Id: README,v 1.2 2001-09-27 12:00:02 chris Exp $
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#
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Description: efi68k
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============
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CPU: MC68HC000 @16MHz
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RAM: 256k
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ROM: 256k
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   Based upon a 16MHz 68HC000, efi332 is a minimally configured 4x6
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inch single board computer. It includes the following major
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components: (a) 256k SRAM (km681000l), (b) 256 EPROM (27C010),
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(c) DP8570A (clock/timer/calendar), (d) MAX791 (cpu supervisory chip
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with battery backup switch-over and watch dog timer), and
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(e) NS16550DN (UART). The following interrupt functions have also been
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incorporated: UART, TIMER, Watch Dog, and Low Line voltage (trips at
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4.85V; enough time to save the cpu reg before reset is asserted on
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power down).
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   The schematic for efi68k is freely available via e-mail. Send
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"index diy_efi" to majordomo@coulomb.eng.ohio-state.edu. Retrieve the
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files related to 68hc000-1.00 with the "get diy_efi "
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command. efi68k does not have an available printed circuit board, but
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can be wire-wrapped in about four days. Cost is about $100US.
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TODO:
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=====
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- add the "tm27 vector" ... can we use a trap instruction?
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- generate include/coverhd.c to perform the tmtest.
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- the interrupt drive I/O should be integrated into the RTEMS.
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- finish the ROM memory model.
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- add separate interrupt stack (low priority).
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                                       John S Gwynne
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                                          Gwynne.1@osu.edu
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_______________________________________________________________________________
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               T h e   O h i o - S t a t e   U n i v e r s i t y
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    ElectroScience Laboratory, 1320 Kinnear Road, Columbus, Ohio 43212, USA
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                Telephone: (614) 292-7981 * Fax: (614) 292-7297
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-------------------------------------------------------------------------------
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