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/*
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*-------------------------------------------------------------------
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*
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* DP8570A -- header file for National Semiconducor's DP8570A TCP
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*
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* This file has been created by John S. Gwynne for the efi68k
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* project.
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*
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* The license and distribution terms for this file may in
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* the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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*------------------------------------------------------------------
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*
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* $Id: DP8570A.h,v 1.2 2001-09-27 12:00:03 chris Exp $
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*/
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#ifndef _DP8570A_H_
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#define _DP8570A_H_
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/* base address is the physical location of register 0 */
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#define TCP_BASE_ADDRESS 0x0600001
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/* definitions of register addresses and associate bits */
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/* ********************************************************* */
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/* Control Registers */
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/* ********************************************************* */
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/* REMEMBER: if you are in an interrupt routine, you must
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reset RS and PS of MSR to the value they had on entry
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to the ISR before exiting */
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#define MSR (volatile unsigned char * const)(0x00*2+TCP_BASE_ADDRESS)
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/* Main Status Register */
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#define INT 0x01 /* Interrupt Status */
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#define PF 0x02 /* Power Fail Interrupt */
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#define PER 0x04 /* Period Interrupt */
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#define AL 0x08 /* Alarm Interrupt */
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#define T0 0x10 /* Timer 0 Interrupt */
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#define T1 0x20 /* Timer 1 Interrupt */
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#define RS 0x40 /* Register Select Bit */
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#define PS 0x80 /* Page Select Bit */
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#define T0CR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
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/* Timer 0 Control Register */
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#define T1CR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
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/* Timer 1 Control Register */
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#define TSS 0x01 /* Timer Start/!Stop */
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#define M0 0x02 /* Mode Select */
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#define M1 0x04 /* Mode Select */
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#define C0 0x08 /* Input Clock Select */
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#define C1 0x10 /* Input Clock Select */
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#define C2 0x20 /* Input Clock Select */
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#define RD 0x40 /* Timer Read */
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#define CHG 0x80 /* Count Hold/Gate */
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#define PFR (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
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/* Periodic Flag Register */
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#define R_1MIN 0x01 /* Minute Flage */
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#define R_10S 0x02 /* 10 Second Flag */
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#define R_1S 0x04 /* Second Flag */
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#define R_100MS 0x08 /* 100 Millisec Flag */
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#define R_10MS 0x10 /* 10 Millisec Flag */
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#define R_1MS 0x20 /* 1 Millisec Flag */
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#define OSF 0x40 /* Oscillator Failed/Single Supply */
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#define TMODE 0x80 /* Test Mode Enable */
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#define IRR (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
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/* Interrupt Routing Register */
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#define PF_R 0x01 /* Power Fail Route */
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#define PR_R 0x02 /* Periodic Route */
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#define AL_R 0x04 /* Alarm Route */
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#define T0_R 0x08 /* Timer 0 Route */
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#define T1_R 0x10 /* Timer 1 Route */
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#define PFD 0x20 /* PF Delay Enable */
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#define LBF 0x40 /* Low Battery Flag */
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#define TMSE 0x80 /* Time Save Enable */
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#define RTMR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
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/* Real Time Mode Register */
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#define LY0 0x01 /* Leap Year LSB */
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#define LY1 0x02 /* Leap Year MSB */
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#define H12 0x04 /* 12/!24 Hour Mode */
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#define CSS 0x08 /* Clock Start/!Stop */
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#define IPF 0x10 /* Interrupt PF Operation */
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#define TPF 0x20 /* Timer PF Operation */
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#define XT0 0x40 /* Crystal Frequency LSB */
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#define XT1 0x80 /* Crystal Frequency MSB */
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#define OMR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
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/* Output Mode Register */
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#define TH 0x01 /* T1 Active Hi/!Low */
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#define TP 0x02 /* T1 Push Pull/!Open Drain */
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#define IH 0x04 /* INTR Active Hi/!Low */
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#define IP 0x08 /* INTR Push Pull/!Open Drain */
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#define MH 0x10 /* MFO Active Hi/!Low */
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#define MP 0x20 /* MFO Push Pull/!Open Drain */
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#define MT 0x40 /* MFO Pin as Timer 0 */
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#define MO 0x80 /* MFO Pin as Oscillator */
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#define ICR0 (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
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/* Interrupt control Register 0 */
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#define ME 0x01 /* Minutes Enable */
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#define TSE 0x02 /* 10 Second Enable */
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#define SE 0x04 /* Seconds Enable */
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#define HME 0x08 /* 100 Millisec Enable */
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#define TME 0x10 /* 10 Millisec Enable */
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#define OME 0x20 /* Millisec Enable */
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#define T0E 0x40 /* Timer 0 Enable */
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#define T1E 0x80 /* Timer 1 Enable */
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#define ICR1 (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
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/* Interrupt control Register 1 */
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#define SCE 0x01 /* Second Compare Enable */
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#define MNE 0x02 /* Minute Compare Enable */
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#define HRE 0x04 /* Hour Compare Enable */
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#define DOME 0x08 /* Day of Month Compare Enable */
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#define MOE 0x10 /* Month Compare Enable */
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#define DOWE 0x20 /* Day of Week Compare Enable */
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#define ALE 0x40 /* Alarm Interrupt Enable */
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#define PFE 0x80 /* Power Fail Interrupt Enable */
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/* ********************************************************* */
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/* Counters: Clock and Calendar (data is stored in BCD) */
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/* ********************************************************* */
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#define HOFS (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS)
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/* Hundredth of Seconds */
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#define SEC (volatile unsigned char * const)(0x06*2+TCP_BASE_ADDRESS)
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/* Seconds */
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#define MIN (volatile unsigned char * const)(0x07*2+TCP_BASE_ADDRESS)
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/* Minutes */
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#define HRS (volatile unsigned char * const)(0x08*2+TCP_BASE_ADDRESS)
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/* Hours */
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#define DOM (volatile unsigned char * const)(0x09*2+TCP_BASE_ADDRESS)
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/* Day of Month */
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#define MON (volatile unsigned char * const)(0x0a*2+TCP_BASE_ADDRESS)
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/* Month */
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#define YR (volatile unsigned char * const)(0x0b*2+TCP_BASE_ADDRESS)
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/* Year */
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#define JD_LSB (volatile unsigned char * const)(0x0c*2+TCP_BASE_ADDRESS)
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/* Julian Date (LSB) */
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#define JD_MSM (volatile unsigned char * const)(0x0d*2+TCP_BASE_ADDRESS)
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/* Julian Date (MSB) */
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#define DOW (volatile unsigned char * const)(0x0e*2+TCP_BASE_ADDRESS)
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/* Day of week */
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/* ********************************************************* */
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/* Timer Data Registers */
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/* ********************************************************* */
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#define T0_LSB (volatile unsigned char * const)(0x0f*2+TCP_BASE_ADDRESS)
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/* Timer 0 LSB */
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#define T0_MSB (volatile unsigned char * const)(0x10*2+TCP_BASE_ADDRESS)
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/* Timer 0 MSB */
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#define T1_LSB (volatile unsigned char * const)(0x11*2+TCP_BASE_ADDRESS)
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/* Timer 1 LSB */
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#define T1_MSB (volatile unsigned char * const)(0x12*2+TCP_BASE_ADDRESS)
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/* Timer 1 MSB */
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/* ********************************************************* */
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/* Timer Compare RAM */
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/* ********************************************************* */
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#define TC_SEC (volatile unsigned char * const)(0x13*2+TCP_BASE_ADDRESS)
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/* Seconds Compare RAM */
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#define TC_MIN (volatile unsigned char * const)(0x14*2+TCP_BASE_ADDRESS)
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/* Minutes Compare RAM */
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#define TC_HRS (volatile unsigned char * const)(0x15*2+TCP_BASE_ADDRESS)
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/* Hours Compare RAM */
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#define TC_DOM (volatile unsigned char * const)(0x16*2+TCP_BASE_ADDRESS)
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/* Day of Month Compare RAM */
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#define TC_MON (volatile unsigned char * const)(0x17*2+TCP_BASE_ADDRESS)
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/* Month Compare RAM */
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#define TC_DOW (volatile unsigned char * const)(0x18*2+TCP_BASE_ADDRESS)
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/* Day of Week Compare RAM */
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/* ********************************************************* */
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/* Time Save RAM */
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/* ********************************************************* */
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#define S_SEC (volatile unsigned char * const)(0x19*2+TCP_BASE_ADDRESS)
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/* Seconds Save RAM */
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#define S_MIN (volatile unsigned char * const)(0x1a*2+TCP_BASE_ADDRESS)
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/* Minutes Save RAM */
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#define S_HRS (volatile unsigned char * const)(0x1b*2+TCP_BASE_ADDRESS)
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/* Hours Save RAM */
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#define S_DOM (volatile unsigned char * const)(0x1c*2+TCP_BASE_ADDRESS)
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/* Day of Month Save RAM */
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#define S_MON (volatile unsigned char * const)(0x1d*2+TCP_BASE_ADDRESS)
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/* Month Save RAM */
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/* ********************************************************* */
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/* Miscellaneous Registers */
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/* ********************************************************* */
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/* rem: 0x1e is general purpose RAM */
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#define TMR (volatile unsigned char * const)(0x1F*2+TCP_BASE_ADDRESS)
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/* RAM/Test Mode Register */
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/* ********************************************************* */
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/* RAM allocation */
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/* ********************************************************* */
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#define RAM_OSC_FAIL (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
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/* 1: osc. failed time lost */
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#define RAM_POWERUP (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
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/* 1: power was removed and the applied
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before last TCP init */
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#define RAM_LOWBAT (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
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/* 1: battery voltage is low (2.2V) */
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/* not valid in single supply mode */
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#define RAM_SINGLE_SUP (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
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/* 1: single supply mode */
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/* note: single supply mode will be
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selected when no backup battery is
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present and/or the first time the
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system is booted after the loss of
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backup battery voltage. */
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#define RAM_TCP_FAILURE (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS)
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/* 1: TCP failed to start oscillating */
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/* ********************************************************* */
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/* TCP data structures */
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/* ********************************************************* */
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struct clock_counters {
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unsigned char hofs;
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unsigned char d0; /* the dx's are place holders since */
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unsigned char sec; /* the TCP is addressable only on */
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unsigned char d1; /* odd addresses. */
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unsigned char min;
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unsigned char d2;
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unsigned char hrs;
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unsigned char d3;
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unsigned char dom;
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unsigned char d4;
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unsigned char mon;
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unsigned char d5;
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unsigned char yr;
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unsigned char d6;
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unsigned char jd0;
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unsigned char d7;
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unsigned char jd1;
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unsigned char d8;
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unsigned char dow;
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};
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extern struct clock_ram * const tcp_power_up;
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struct clock_ram {
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unsigned char sec;
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unsigned char d0; /* the dx's are place holders since */
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unsigned char min; /* the TCP is addressable only on */
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unsigned char d1; /* odd addresses. */
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unsigned char hrs;
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unsigned char d2;
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unsigned char dom;
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unsigned char d3;
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unsigned char mon;
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};
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extern struct clock_ram * const tcp_power_up;
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extern struct clock_ram * const tcp_power_down;
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extern struct clock_counters * const tcp_clock;
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extern struct clock_ram * const tcp_save_ram;
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void tcp_init(void);
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#endif /* _DP8570A_H_ */
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