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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [gen68302/] [README] - Blame information for rev 173

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#
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#  $Id: README,v 1.2 2001-09-27 12:00:03 chris Exp $
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#
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BSP NAME:           gen68302
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BOARD:              proprietary (see below for relevant information)
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BUS:                none
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CPU FAMILY:         MC68000
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COPROCESSORS:       68302 communications co-processor
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MODE:               not applicable
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DEBUG MONITOR:      none
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PERIPHERALS
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===========
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TIMERS:             two 68302 timers, one 68302 watchdog timer
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  RESOLUTION:         ?
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SERIAL PORTS:       three 68302 SCCs
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REAL-TIME CLOCK:
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DMA:                built-in 68302, not used
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VIDEO:              none
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SCSI:               none
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NETWORKING:         none
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DRIVER INFORMATION
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==================
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CLOCK DRIVER:       68302 (TIMER1)
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IOSUPP DRIVER:      68302 SCC2
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SHMSUPP:            none
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TIMER DRIVER:       68302 TIMER2
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STDIO
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=====
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PORT:               ?
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ELECTRICAL:         EIA-232
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BAUD:               9600
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BITS PER CHARACTER: 8
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PARITY:             None
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STOP BITS:          1
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NOTES
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=====
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Board description
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-----------------
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clock rate:     16 MHz
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bus width:      16 bits
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ROM:            128 kbyte (flash,  0 wait states, chip select 0)
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RAM:            256 kbyte (static, 0 wait states, chip select 1)
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The 68302's built-in DRAM refresh controller circuitry is neither used
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nor configured at startup.
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Host System
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-----------
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HP 9000/715, HP-UX 9.05
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gcc-2.6.3
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binutils-2.5.2
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Verification
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------------
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The 1-ms clock ISR rate was verified with an in-circuit emulator.
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Single processor tests:
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Multi-processort tests:  not applicable
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Timing tests:            see results in c/src/tests/tmtests/times
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Note: The board has 256 kbyte RAM, so the timing tests would not run
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with the standard executive RAM size configuration of 256 K.
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Modifying the conftbl.h files to specify 160 kbyte for workspace
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seemed to work.
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* Porting
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** Mod c/src/tests/tmtests/*/conftbl.h
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Modified to use 160 kbyte for executive RAM size.
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** Add  c/make/custom/gen68302.cfg
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Based on m68k_no_bsp.cfg.  Turned off multiprocessor support.  Had to
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use a BSP-specific compiler configuration file in order to link the
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proper startup file.
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** Mod  c/make/compilers/gcc-m68000.cfg
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Added "-m68000" to the AS macro so that non-68000 instructions are
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neither generated nor allowed (remember that the GNU assembler
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supports pseudo-assembler instructions (e.g. jbsr) that will be
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"intelligently" assembled.)  Added "m68000/" before libgcc.a so that
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non-68000 instructions aren't included.
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** Add  c/make/compilers/gcc-gen68302.cfg
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Based on modified gcc-m68000.cfg.
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Changed make-exe define to produce IEEE-695 output files for loading
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into the emulator.
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The board has no debug monitor, so I had to create a 68302-specific
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startup file (c/src/lib/libbsp/m68k/gen68302/start302/start302.s) to
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override the c/src/lib/start/m68k/start.s.  START_FILE entry was
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modified to causes start302.s to be linked first (in lieu of start.s).
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** Mod  c/src/exec/cpu/m68k/cpu.h
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Turned off software and hardware interrupt stack support.  Added
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support in _CPU_Bitfield_Find_first_bit() and
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_CPU_Priority_Bits_index() to replace the bfffo instruction.
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TODO: add software-maintained interrupt stack.
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TODO: optimize things so that subtracting _priority from 15 isn't
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required in _CPU_Priority_Bits_index().
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** Mod  c/src/exec/cpu/m68k/cpu.c
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Added the log base 2 table (__log2table) that's required by the BFFFO
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replacement in cpu.h.
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** Mod  c/src/exec/cpu/m68k/cpu_asm.s
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Added _ISR_Exit that's currently used in TBD....  Added ifdef wrapper
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around ISR exit code that accessed the format nibble.  Added some code
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to restore the status register and call _Thread_Dispatch.
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TODO: add software-maintained interrupt stack.
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** Mod  c/src/exec/cpu/m68k/m68k.h
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Changed "typedef char signed8" to "typedef signed char signed8".
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** Add  c/src/lib/libbsp/m68k/gen68302/...
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*** clock/
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TODO: Add set_vector support.  Figure out what to do with Clock_exit().
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TODO: Pre-compute (BSP_Configuration.microseconds_per_tick/1000) so that
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it doesn't have to be re-computed on each Clock_isr().
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*** console/
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These files assume SCC2, but it shouldn't be too difficult to re-write
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these to use any of the other SCCs.
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*** include/
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*** start302/
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This contains the start302.s file that does some fairly tricky memory
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re-mapping so that RAM ends up at 0 and ROM ends up at 0xc00000.
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*** startup/
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*** timer/
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*** wrapup/

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