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/*  bsp.h
 *
 *  This include file contains all MVME136 board IO definitions.
 *
 *  COPYRIGHT (c) 1989-1999.
 *  On-Line Applications Research Corporation (OAR).
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id: bsp.h,v 1.2 2001-09-27 12:00:14 chris Exp $
 */
 
#ifndef __MVME136_h
#define __MVME136_h
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <rtems.h>
#include <clockdrv.h>
#include <console.h>
#include <iosupp.h>
 
/*
 *  confdefs.h overrides for this BSP:
 *   - number of termios serial ports (defaults to 1)
 *   - Interrupt stack space is not minimum if defined.
 */
 
/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
 
/*
 *  Define the time limits for RTEMS Test Suite test durations.
 *  Long test and short test duration limits are provided.  These
 *  values are in seconds and need to be converted to ticks for the
 *  application.
 *
 */
 
#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
 
/*
 *  Define the interrupt mechanism for Time Test 27
 *
 *  NOTE: Use the MPCSR vector for the MVME136
 */
 
#define MUST_WAIT_FOR_INTERRUPT 0
 
#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 )
 
#define Cause_tm27_intr()  (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x80
 
#define Clear_tm27_intr()  (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x00
 
#define Lower_tm27_intr()
 
/*
 *  Simple spin delay in microsecond units for device drivers.
 *  This is very dependent on the clock speed of the target.
 */
 
#define delay( microseconds ) \
  { register rtems_unsigned32 _delay=(microseconds); \
    register rtems_unsigned32 _tmp=123; \
    asm volatile( "0: \
                     nbcd      %0 ; \
                     nbcd      %0 ; \
                     dbf       %1,0b" \
                  : "=d" (_tmp), "=d" (_delay) \
                  : "0"  (_tmp), "1"  (_delay) ); \
  }
 
/* Constants */
 
#define RAM_START 0
#define RAM_END   0x100000
 
#define M681ADDR      0xfffb0040         /* address of the M68681 chip */
#define RXRDYB        0x01               /* status reg recv ready mask */
#define TXRDYB        0x04               /* status reg trans ready mask */
#define PARITYERR     0x20               /* status reg parity error mask */
#define FRAMEERR      0x40               /* status reg frame error mask */
 
 
#define FOREVER       1                  /* infinite loop */
 
/* Structures */
 
struct r_m681_info {
  char fill1[ 5 ];                       /* channel A regs ( not used ) */
  char isr;                              /* interrupt status reg */
  char fill2[ 2 ];                       /* counter regs (not used) */
  char mr1mr2b;                          /* MR1B and MR2B regs */
  char srb;                              /* status reg channel B */
  char fill3;                            /* do not access */
  char rbb;                              /* receive buffer channel B */
  char ivr;                              /* interrupt vector register */
};
 
struct w_m681_info {
  char fill1[ 4 ];                       /* channel A regs (not used) */
  char acr;                              /* auxillary control reg */
  char imr;                              /* interrupt mask reg */
  char fill2[ 2 ];                       /* counter regs (not used) */
  char mr1mr2b;                          /* MR1B and MR2B regs */
  char csrb;                             /* clock select reg */
  char crb;                              /* command reg */
  char tbb;                              /* transmit buffer channel B */
  char ivr;                              /* interrupt vector register */
};
 
#ifdef M136_INIT
#undef EXTERN
#define EXTERN
#else
#undef EXTERN
#define EXTERN extern
#endif
 
/* miscellaneous stuff assumed to exist */
 
extern rtems_configuration_table BSP_Configuration;
 
/* M68681 DUART chip register variables */
 
EXTERN volatile struct r_m681_info *_Read_m681;  /* M68681 read registers */
EXTERN volatile struct w_m681_info *_Write_m681; /* M68681 write registers */
 
extern m68k_isr_entry M68Kvec[];   /* vector table address */
 
/*
 *  Device Driver Table Entries
 */
 
/*
 * NOTE: Use the standard Console driver entry
 */
 
/*
 * NOTE: Use the standard Clock driver entry
 */
 
/* functions */
 
void bsp_cleanup( void );
 
m68k_isr_entry set_vector(
  rtems_isr_entry     handler,
  rtems_vector_number vector,
  int                 type
);
 
#ifdef __cplusplus
}
#endif
 
#endif
/* end of include file */

Line No.	Rev	Author	Line
1	30	unneback	`/* bsp.h`
2			`*`
3			`* This include file contains all MVME136 board IO definitions.`
4			`*`
5			`* COPYRIGHT (c) 1989-1999.`
6			`* On-Line Applications Research Corporation (OAR).`
7			`*`
8			`* The license and distribution terms for this file may be`
9			`* found in the file LICENSE in this distribution or at`
10			`* http://www.OARcorp.com/rtems/license.html.`
11			`*`
12			`* $Id: bsp.h,v 1.2 2001-09-27 12:00:14 chris Exp $`
13			`*/`
14
15			`#ifndef __MVME136_h`
16			`#define __MVME136_h`
17
18			`#ifdef __cplusplus`
19			`extern "C" {`
20			`#endif`
21
22			`#include <rtems.h>`
23			`#include <clockdrv.h>`
24			`#include <console.h>`
25			`#include <iosupp.h>`
26
27			`/*`
28			`* confdefs.h overrides for this BSP:`
29			`* - number of termios serial ports (defaults to 1)`
30			`* - Interrupt stack space is not minimum if defined.`
31			`*/`
32
33			`/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */`
34			`#define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024)`
35
36			`/*`
37			`* Define the time limits for RTEMS Test Suite test durations.`
38			`* Long test and short test duration limits are provided. These`
39			`* values are in seconds and need to be converted to ticks for the`
40			`* application.`
41			`*`
42			`*/`
43
44			`#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */`
45			`#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */`
46
47			`/*`
48			`* Define the interrupt mechanism for Time Test 27`
49			`*`
50			`* NOTE: Use the MPCSR vector for the MVME136`
51			`*/`
52
53			`#define MUST_WAIT_FOR_INTERRUPT 0`
54
55			`#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 )`
56
57			`#define Cause_tm27_intr() ((volatile rtems_unsigned8 )0xfffb006b) = 0x80`
58
59			`#define Clear_tm27_intr() ((volatile rtems_unsigned8 )0xfffb006b) = 0x00`
60
61			`#define Lower_tm27_intr()`
62
63			`/*`
64			`* Simple spin delay in microsecond units for device drivers.`
65			`* This is very dependent on the clock speed of the target.`
66			`*/`
67
68			`#define delay( microseconds ) \`
69			`{ register rtems_unsigned32 _delay=(microseconds); \`
70			`register rtems_unsigned32 _tmp=123; \`
71			`asm volatile( "0: \`
72			`nbcd %0 ; \`
73			`nbcd %0 ; \`
74			`dbf %1,0b" \`
75			`: "=d" (_tmp), "=d" (_delay) \`
76			`: "0" (_tmp), "1" (_delay) ); \`
77			`}`
78
79			`/* Constants */`
80
81			`#define RAM_START 0`
82			`#define RAM_END 0x100000`
83
84			`#define M681ADDR 0xfffb0040 /* address of the M68681 chip */`
85			`#define RXRDYB 0x01 /* status reg recv ready mask */`
86			`#define TXRDYB 0x04 /* status reg trans ready mask */`
87			`#define PARITYERR 0x20 /* status reg parity error mask */`
88			`#define FRAMEERR 0x40 /* status reg frame error mask */`
89
90
91			`#define FOREVER 1 /* infinite loop */`
92
93			`/* Structures */`
94
95			`struct r_m681_info {`
96			`char fill1[ 5 ]; /* channel A regs ( not used ) */`
97			`char isr; /* interrupt status reg */`
98			`char fill2[ 2 ]; /* counter regs (not used) */`
99			`char mr1mr2b; /* MR1B and MR2B regs */`
100			`char srb; /* status reg channel B */`
101			`char fill3; /* do not access */`
102			`char rbb; /* receive buffer channel B */`
103			`char ivr; /* interrupt vector register */`
104			`};`
105
106			`struct w_m681_info {`
107			`char fill1[ 4 ]; /* channel A regs (not used) */`
108			`char acr; /* auxillary control reg */`
109			`char imr; /* interrupt mask reg */`
110			`char fill2[ 2 ]; /* counter regs (not used) */`
111			`char mr1mr2b; /* MR1B and MR2B regs */`
112			`char csrb; /* clock select reg */`
113			`char crb; /* command reg */`
114			`char tbb; /* transmit buffer channel B */`
115			`char ivr; /* interrupt vector register */`
116			`};`
117
118			`#ifdef M136_INIT`
119			`#undef EXTERN`
120			`#define EXTERN`
121			`#else`
122			`#undef EXTERN`
123			`#define EXTERN extern`
124			`#endif`
125
126			`/* miscellaneous stuff assumed to exist */`
127
128			`extern rtems_configuration_table BSP_Configuration;`
129
130			`/* M68681 DUART chip register variables */`
131
132			`EXTERN volatile struct r_m681_info _Read_m681; / M68681 read registers */`
133			`EXTERN volatile struct w_m681_info _Write_m681; / M68681 write registers */`
134
135			`extern m68k_isr_entry M68Kvec[]; /* vector table address */`
136
137			`/*`
138			`* Device Driver Table Entries`
139			`*/`
140
141			`/*`
142			`* NOTE: Use the standard Console driver entry`
143			`*/`
144
145			`/*`
146			`* NOTE: Use the standard Clock driver entry`
147			`*/`
148
149			`/* functions */`
150
151			`void bsp_cleanup( void );`
152
153			`m68k_isr_entry set_vector(`
154			`rtems_isr_entry handler,`
155			`rtems_vector_number vector,`
156			`int type`
157			`);`
158
159			`#ifdef __cplusplus`
160			`}`
161			`#endif`
162
163			`#endif`
164			`/* end of include file */`

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [mvme136/] [include/] [bsp.h] - Blame information for rev 173